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STM6600DA55DM6F
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STMicroelectronics Supervisor And Reset ICs, TDFN-12(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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STM6600DA55DM6F
STMicroelectronics · Supervisor And Reset ICs · TDFN-12(2x3)
STM6600DA55DM6F from STMicroelectronics, in a TDFN-12(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply input monitored during startup and normal operation for sufficient voltage (operating voltage 1.6 V to 5.5 V); decouple to ground with a 0.1 µF capacitor placed as close to the device as possible. |
| 2 | SR | input | Smart Reset button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection; it is active low with an optional 100 kΩ pull-up, must be held for tSRD together with PB for a long push, and must not be grounded permanently. |
| 3 | VREF | power_out | Precise 1.5 V voltage reference with 1% accuracy, valid after tREC expires and disabled in standby; a 1 µF capacitor is mandatory on this pin even when VREF is unused. |
| 4 | PSHOLD | input | Power-supply hold input with a factory-trimmed voltage detector that confirms power-up when driven high before the push-button release or tON_BLANK expiry and deasserts the enable output when driven low during normal operation; an internal pull-down is active during startup. |
| 5 | CSRD | passive | Smart Reset delay time input where a capacitor to ground sets the additional tSRD time (charged with ISRD, ending at VSRD); a low-ESR ceramic capacitor is recommended, and the pin is left open if no capacitor is used. |
| 6 | PB | input | Power ON push-button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection; it must be switched to GND, has an internal 100 kΩ pull-up, and requires battery voltage above VTH+ for the whole tDEBOUNCE period to power up. |
| 7 | VCCLO | output | High-threshold detection output that is low when VCC is below VTH+ during power-up and low during normal operation whenever undervoltage is detected; it is active low open drain and requires a pull-up resistor (10 kΩ is sufficient in most applications). |
| 8 | PBOUT | output | PB input status output that goes low during the tDEBOUNCE period and for at least tINT_Min after a valid press, ignores PB during undervoltage, and is active low open drain requiring a pull-up resistor (10 kΩ is sufficient in most applications). |
| 9 | EN or EN | output | Push-pull enable output that controls system power, asserted high (or low for the active-low EN option, which this MPN's ordering code D specifies) after a valid turn-on and released when the push-button is released before PSHOLD confirmation, tON_BLANK expires, PSHOLD is driven low, an undervoltage lasts longer than tSRD + tINT_Min + tDEBOUNCE, or a long push occurs on the deassert-by-long-push option. |
| 10 | RST | output | Active low open drain reset output that pulls low for tREC during startup after a valid PB press and, on options with reset by long push, after a long push held for more than tDEBOUNCE + tSRD; it requires a pull-up resistor (10 kΩ is sufficient in most applications). |
| 11 | INT | output | Active low open drain interrupt output driven low for at least tINT_Min when VCC falls below VTH- or PB is held for tDEBOUNCE or more during normal operation, and held high during power-up; it requires a pull-up resistor (10 kΩ is sufficient in most applications). |
| 12 | GND | power_in | Ground reference for the device. |
| 13 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TDFN-12(2x3) |
| Category | Power Management (PMIC) |
| Pins | 13 |
CAD (KiCad official)
- Symbol:
STM6600DA55DM6F - Footprint:
Package_DFN_QFN:DFN-12-1EP_2x3mm_P0.45mm_EP0.64x2.4mm - 3D model: TDFN-12(2x3) (KiCad packages3D, STEP)
- 3D model files:
stm6600da55dm6f-etched.step/stm6600da55dm6f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm6600da55dm6f.step/stm6600da55dm6f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (52 pp, sha256
24305a688f436ae9, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM6600DA55DM6F
**STMicroelectronics** · Supervisor And Reset ICs · TDFN-12(2x3)
STM6600DA55DM6F from STMicroelectronics, in a TDFN-12(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply input monitored during startup and normal operation for sufficient voltage (operating voltage 1.6 V to 5.5 V); decouple to ground with a 0.1 µF capacitor placed as close to the device as possible. |
| 2 | SR | input | Smart Reset button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection; it is active low with an optional 100 kΩ pull-up, must be held for tSRD together with PB for a long push, and must not be grounded permanently. |
| 3 | VREF | power_out | Precise 1.5 V voltage reference with 1% accuracy, valid after tREC expires and disabled in standby; a 1 µF capacitor is mandatory on this pin even when VREF is unused. |
| 4 | PSHOLD | input | Power-supply hold input with a factory-trimmed voltage detector that confirms power-up when driven high before the push-button release or tON_BLANK expiry and deasserts the enable output when driven low during normal operation; an internal pull-down is active during startup. |
| 5 | CSRD | passive | Smart Reset delay time input where a capacitor to ground sets the additional tSRD time (charged with ISRD, ending at VSRD); a low-ESR ceramic capacitor is recommended, and the pin is left open if no capacitor is used. |
| 6 | PB | input | Power ON push-button input with a factory-trimmed voltage detector and ±8 kV HBM ESD protection; it must be switched to GND, has an internal 100 kΩ pull-up, and requires battery voltage above VTH+ for the whole tDEBOUNCE period to power up. |
| 7 | VCCLO | output | High-threshold detection output that is low when VCC is below VTH+ during power-up and low during normal operation whenever undervoltage is detected; it is active low open drain and requires a pull-up resistor (10 kΩ is sufficient in most applications). |
| 8 | PBOUT | output | PB input status output that goes low during the tDEBOUNCE period and for at least tINT_Min after a valid press, ignores PB during undervoltage, and is active low open drain requiring a pull-up resistor (10 kΩ is sufficient in most applications). |
| 9 | EN or EN | output | Push-pull enable output that controls system power, asserted high (or low for the active-low EN option, which this MPN's ordering code D specifies) after a valid turn-on and released when the push-button is released before PSHOLD confirmation, tON_BLANK expires, PSHOLD is driven low, an undervoltage lasts longer than tSRD + tINT_Min + tDEBOUNCE, or a long push occurs on the deassert-by-long-push option. |
| 10 | RST | output | Active low open drain reset output that pulls low for tREC during startup after a valid PB press and, on options with reset by long push, after a long push held for more than tDEBOUNCE + tSRD; it requires a pull-up resistor (10 kΩ is sufficient in most applications). |
| 11 | INT | output | Active low open drain interrupt output driven low for at least tINT_Min when VCC falls below VTH- or PB is held for tDEBOUNCE or more during normal operation, and held high during power-up; it requires a pull-up resistor (10 kΩ is sufficient in most applications). |
| 12 | GND | power_in | Ground reference for the device. |
| 13 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TDFN-12(2x3) |
| Category | Power Management (PMIC) |
| Pins | 13 |
## CAD (KiCad official)
- Symbol: `STM6600DA55DM6F`
- Footprint: `Package_DFN_QFN:DFN-12-1EP_2x3mm_P0.45mm_EP0.64x2.4mm`
- 3D model: TDFN-12(2x3) (KiCad packages3D, STEP)
- 3D model files: `stm6600da55dm6f-etched.step` / `stm6600da55dm6f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm6600da55dm6f.step` / `stm6600da55dm6f.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588939854046769152) (52 pp, sha256 `24305a688f436ae9`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm6600da55dm6f-datasheet.pdf)