STM6524AHARDL6F

{
  "slug": "stm6524ahardl6f",
  "version": "0.1.0",
  "type": "component",
  "description": "STMicroelectronics Supervisor And Reset ICs, UDFN-6(1.3x1.6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "stm6524ahardl6f",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "stm6524ahardl6f.kicad_sym",
    "stm6524ahardl6f.kicad_mod",
    "stm6524ahardl6f.glb",
    "stm6524ahardl6f.step",
    "stm6524ahardl6f.lbr",
    "docs/hero.png",
    "docs/stm6524ahardl6f-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "stm6524ahardl6f-hero.glb",
    "stm6524ahardl6f-hero.overlay.json"
  ],
  "component": {
    "mpn": "STM6524AHARDL6F",
    "manufacturer": "STMicroelectronics",
    "package": "UDFN-6(1.3x1.6)",
    "pin_count": 6,
    "category": "Power Management (PMIC)",
    "subcategory": "Supervisor And Reset ICs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604428187749265408",
    "parts": {
      "symbol": "stm6524ahardl6f.kicad_sym",
      "footprint": "stm6524ahardl6f.kicad_mod",
      "model_3d": "stm6524ahardl6f-hero.glb",
      "model_3d_plain": "stm6524ahardl6f.glb",
      "model_3d_step": "stm6524ahardl6f-etched.step",
      "model_3d_step_plain": "stm6524ahardl6f.step",
      "lbr": "stm6524ahardl6f.lbr"
    },
    "distributor_links": {
      "lcsc": "C2970489",
      "digikey": "497-12093-2-ND",
      "mouser": "511-STM6524AHARDL6F"
    },
    "distributor_check": {
      "checked_at": "2026-10-10T20:05:53Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "497-12093-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "511-STM6524AHARDL6F",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground pin for the device, serving as the ground reference for all signals."
      },
      {
        "number": "2",
        "name": "SR1",
        "type": "input",
        "description": "Secondary push-button Smart Reset input, active low with optional pull-up resistor; both SR inputs must be asserted simultaneously for at least tSRC to assert RST."
      },
      {
        "number": "3",
        "name": "RST",
        "type": "output",
        "description": "Reset output, active low or active high, push-pull or open drain with optional pull-up resistor; it is deasserted below 1.575 V typ. and its state is guaranteed down to 1 V."
      },
      {
        "number": "4",
        "name": "NC",
        "type": "unconnected",
        "description": "Not connected; not bonded internally and should be connected to VSS."
      },
      {
        "number": "5",
        "name": "SR0",
        "type": "input",
        "description": "Primary push-button Smart Reset input, active low with optional pull-up resistor; applying a voltage of VCC + 0.9 V to VCC + 1.4 V (VTEST) enters test mode."
      },
      {
        "number": "6",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage for the device, 1.65 V to 5.5 V; a 0.1 µF ceramic decoupling capacitor is recommended between VCC and VSS, as close to the device as possible."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers and names are taken from Table 1 (Signal names), which covers all variants of the STM652; Figure 2 (pin connections, top view) is image-only in the extracted text, so physical pin positions ; Per the part-number decode in Table 6, this MPN is open drain, no internal pull-up, active low on RS"
        ],
        "pages_sent": 24,
        "cost_usd": 0.064,
        "at": "2026-10-10T20:05:35"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604428187749265408",
        "pages": 24,
        "sha256": "e1949e7324c53aab",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "stm6524ahardl6f.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          1.62,
          1.3,
          0.55
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "47be8e005074d252401b4afe5ba0cb2bf2cb285e27293f6ce28781bdecc9cfdf",
        "checked": "2026-10-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "stm6524ahardl6f-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          1.62,
          1.3,
          0.55
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "24b93480202d9c58a7e588ee2fa4b65dee9272388c23ca64caddd42cec0c938c",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}