# STM6524AHARDL6F

**STMicroelectronics** · Supervisor And Reset ICs · UDFN-6(1.3x1.6)

STM6524AHARDL6F from STMicroelectronics, in a UDFN-6(1.3x1.6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground pin for the device, serving as the ground reference for all signals. |
| 2 | SR1 | input | Secondary push-button Smart Reset input, active low with optional pull-up resistor; both SR inputs must be asserted simultaneously for at least tSRC to assert RST. |
| 3 | RST | output | Reset output, active low or active high, push-pull or open drain with optional pull-up resistor; it is deasserted below 1.575 V typ. and its state is guaranteed down to 1 V. |
| 4 | NC | unconnected | Not connected; not bonded internally and should be connected to VSS. |
| 5 | SR0 | input | Primary push-button Smart Reset input, active low with optional pull-up resistor; applying a voltage of VCC + 0.9 V to VCC + 1.4 V (VTEST) enters test mode. |
| 6 | VCC | power_in | Positive supply voltage for the device, 1.65 V to 5.5 V; a 0.1 µF ceramic decoupling capacitor is recommended between VCC and VSS, as close to the device as possible. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UDFN-6(1.3x1.6) |
| Category | Power Management (PMIC) |
| Pins | 6 |

## CAD (KiCad official)

- Symbol: `STM6524AHARDL6F`
- Footprint: `Package_DFN_QFN:DFN-6_1.6x1.3mm_P0.4mm`
- 3D model: UDFN-6(1.3x1.6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.55 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `stm6524ahardl6f-etched.step` / `stm6524ahardl6f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm6524ahardl6f.step` / `stm6524ahardl6f.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604428187749265408) (24 pp, sha256 `e1949e7324c53aab`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm6524ahardl6f-datasheet.pdf)