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STM6315SDW13F

STMicroelectronics · Monitors & Reset Circuits · SOT-143-4

STM6315SDW13F from STMicroelectronics, in a SOT-143-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS power_in Ground pin of the device.
2 RST output Active-low open drain reset output that requires an external pull-up resistor to any supply up to 6V and is guaranteed valid down to VCC = 1.0V.
3 MR input Manual reset input where a logic low asserts RST, with an internal 63kΩ (typ) pull-up so it may be left open if unused.
4 VCC power_in Supply voltage input with an operating range of 1.0 to 5.5V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-143-4
Category Power Management ICs
Pins 4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating voltage VCC 1 5.5 V 14
Ambient operating temperature TA -40 125 °C 13
Supply voltage VCC -0.3 7 V 12
Output current IO 20 mA 12
Power dissipation PD 320 mW 12
Storage temperature (VCC off) TSTG -55 150 °C VCC off 12
Lead solder temperature TSLD 260 °C Lead solder temperature for 10 seconds 12
Reset threshold tolerance VRST -1.8 1.8 % VCC falling; TA = 25°C 14
Reset threshold tolerance VRST -2.5 2.5 % VCC falling; TA = -40 to 85°C 14
Reset threshold tolerance VRST -3.5 3.5 % VCC falling; TA = -40 to 125°C 14
RST pulse width (trec), STM6315xDxxxx trec 140 210 280 ms TA = -40 to +85°C 14
RST pulse width (trec), STM6315xDxxxx trec 112 336 ms TA = -40 to +125°C 14
VCC-to-RST delay tRD 35 µs VCC falling from (VRST + 100mV) to (VRST, 200mV) at 1mV/µs 14
VCC supply current ICC 2 12 µA VCC = 5.5V, no load; TA = -40 to +85°C 14
VCC supply current ICC 15 µA VCC = 5.5V, no load; TA = -40 to +125°C 14
VCC supply current ICC 1.5 10 µA VCC = 3.6V, no load; TA = -40 to +85°C 14
VCC supply current ICC 12 µA VCC = 3.6V, no load; TA = -40 to +125°C 14
RST output voltage VOL 0.4 V VCC > 4.25V, ISINK = 3.2mA 14
RST output voltage VOL 0.3 V VCC > 2.5V, ISINK = 1.2mA 14
RST output open drain leakage current 1 µA VCC > VRST, RST not asserted 14
MR pull-up resistance 32 63 100 kΩ 15
MR input pulse width 1 µs 15
MR glitch rejection 100 ns 15
MR-to-RST delay 500 ns 15
Reset threshold temperature coefficient 60 ppm/°C 14
Reset threshold (S variant, 2.93V) VRST 2.93 V 18

CAD (KiCad official)

  • Symbol: STM6315SDW13F
  • Footprint: Package_TO_SOT_SMD:SOT-143
  • 3D model: SOT-143-4 (KiCad packages3D, STEP)
  • 3D model files: stm6315sdw13f-etched.step / stm6315sdw13f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm6315sdw13f.step / stm6315sdw13f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (21 pp, sha256 059408cf2a388c0c, retrieved 2026-11-09, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF