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Contents

README

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STM32U575VGT6Q

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32U575VGT6Q from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch supplied by VDDA; alternate functions include TRACECLK, TIM3_ETR, SAI1_CK1, FMC_A23.
2 PE3 bidirectional 5 V-tolerant I/O (FT_hat) with analog switch supplied by VDDA; alternate functions include TRACED0, TIM3_CH1, FMC_A19; additional function TAMP_IN6/TAMP_OUT3.
3 PE4 bidirectional 5 V-tolerant I/O (FT_hat) with analog switch supplied by VDDA; alternate functions include TRACED1, TIM3_CH2, DCMI_D4/PSSI_D4, FMC_A20; additional functions WKUP1, TAMP_IN7/TAMP_OUT8.
4 PE5 bidirectional 5 V-tolerant I/O (FT_hat) with analog switch supplied by VDDA; alternate functions include TRACED2, TIM3_CH3, DCMI_D6/PSSI_D6, FMC_A21; additional functions WKUP2, TAMP_IN8/TAMP_OUT7.
5 PE6 bidirectional 5 V-tolerant I/O (FT_ht) supporting high-speed low-voltage mode; alternate functions include TRACED3, TIM3_CH4, DCMI_D7/PSSI_D7, FMC_A22; additional functions WKUP3, TAMP_IN3/TAMP_OUT6.
6 VBAT power_in Backup-domain supply for the RTC, 32 x 32-bit backup registers and 2-Kbyte backup SRAM; absolute maximum -0.3 V to 4.0 V (Table 29).
7 PC13 bidirectional FT I/O supplied through the power switch (VSW); output speed is limited to 2 MHz with 30 pF and PC13-PC15 share a 3 mA source limit, so they must not drive LEDs (Table 26 note 2); additional functions WKUP2, RTC_TS/RTC_OUT1, TAMP_IN1/TAMP_OUT2.
8 PC14-OSC32_IN bidirectional FT_o I/O supplied through the power switch (VSW) with OSC32_IN capability; same 2 MHz / 30 pF and 3 mA shared source limits as PC13 (Table 26 note 2).
9 PC15-OSC32_OUT bidirectional FT_o I/O supplied through the power switch (VSW) with OSC32_OUT capability; same 2 MHz / 30 pF and 3 mA shared source limits as PC13 (Table 26 note 2).
10 VSS power_in Ground pin; each VSS pin sinks at most 100 mA and the total ground current is limited to 200 mA (Table 30).
11 VDD power_in Main digital supply, 1.71 V to 3.6 V; VDD pins must not differ by more than 50 mV from each other (Table 29).
12 PH0-OSC_IN bidirectional FT I/O; HSE oscillator input (OSC_IN) function, also available as EVENTOUT.
13 PH1-OSC_OUT bidirectional FT I/O; HSE oscillator output (OSC_OUT) function, also available as EVENTOUT.
14 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor (Table 25 legend).
15 PC0 bidirectional 5 V-tolerant I/O (FT_fha) with analog switch and Fm+ capability; ADC1_IN1/ADC4_IN1 analog input; alternate functions include LPTIM1_IN1, I2C3_SCL, LPUART1_RX, SDMMC1_D5.
16 PC1 bidirectional 5 V-tolerant I/O (FT_fhav) with analog switch and Fm+ capability; ADC1_IN2/ADC4_IN2 analog input; alternate functions include TRACED0, SPI2_MOSI, I2C3_SDA, LPUART1_TX.
17 PC2 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; ADC1_IN3/ADC4_IN3 analog input; alternate functions include LPTIM1_IN2, SPI2_MISO, MDF1_CCK1, OCTOSPIM_P1_IO5.
18 PC3 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; ADC1_IN4/ADC4_IN4 analog input; alternate functions include LPTIM1_ETR, LPTIM3_CH1, SAI1_D1, SPI2_MOSI.
19 VSSA power_in Analog ground; ground pins must stay within 50 mV of each other including VREF- (Table 29).
20 VREF+ power_in Positive reference voltage input for the ADCs/DAC; VREF+ may exceed VDDA by at most 0.4 V (Table 29); additional function VREFBUF_OUT.
21 VDDA power_in Analog supply for ADCs, DACs, OPAMPs, COMPs and VREFBUF; absolute maximum -0.3 V to 4.0 V (Table 29).
22 PA0 bidirectional 5 V-tolerant I/O (FT_hat) with analog switch; OPAMP1_VINP and ADC1_IN5 analog inputs; alternate functions include TIM2_CH1, USART2_CTS, UART4_TX, SDMMC2_CMD; additional function WKUP1.
23 PA1 bidirectional 5 V-tolerant I/O (FT_hat) with analog switch; OPAMP1_VINM and ADC1_IN6 analog inputs; alternate functions include LPTIM1_CH2, TIM2_CH2, SPI1_SCK, USART2_RTS_DE; additional function WKUP3.
24 PA2 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; COMP1_INP3 and ADC1_IN7 analog inputs; alternate functions include TIM2_CH3, USART2_TX, LPUART1_TX, UCPD1_FRSTX1; additional function WKUP4/LSCO.
25 PA3 bidirectional 3.6 V-tolerant I/O (TT_hav) with analog switch; OPAMP1_VOUT and ADC1_IN8 analog functions; alternate functions include TIM2_CH4, SAI1_CK1, USART2_RX, LPUART1_RX; additional function WKUP5.
26 VSS power_in Ground pin; each VSS pin sinks at most 100 mA and the total ground current is limited to 200 mA (Table 30).
27 VDD power_in Main digital supply, 1.71 V to 3.6 V; VDD pins must not differ by more than 50 mV from each other (Table 29).
28 PA4 bidirectional 3.6 V-tolerant I/O (TT_ha) with analog switch; ADC1_IN9, ADC4_IN9, DAC1_OUT1 analog functions; alternate functions include SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B; additional function WKUP2.
29 PA5 bidirectional 3.6 V-tolerant I/O (TT_a) with analog switch; ADC1_IN10, ADC4_IN10, DAC1_OUT2 analog functions; alternate functions include CSLEEP, TIM2_CH1, SPI1_SCK, USART3_RX; additional function WKUP6.
30 PA6 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; OPAMP2_VINP and ADC1_IN11/ADC4_IN11 analog inputs; alternate functions include TIM1_BKIN, TIM3_CH1, SPI1_MISO, USART3_CTS; additional function WKUP7.
31 PA7 bidirectional 5 V-tolerant I/O (FT_fha) with analog switch and Fm+ capability; OPAMP2_VINM and ADC1_IN12 analog functions; alternate functions include TIM1_CH1N, TIM3_CH2, I2C3_SCL, SPI1_MOSI; additional function WKUP8.
32 PB0 bidirectional 3.6 V-tolerant I/O (TT_ha) with analog switch; OPAMP2_VOUT and ADC1_IN15 analog functions; alternate functions include TIM1_CH2N, TIM3_CH3, SPI1_NSS, USART3_CK, COMP1_OUT.
33 PB1 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; COMP1_INM1, ADC1_IN16 and ADC4_IN19 analog functions; alternate functions include TIM1_CH3N, TIM3_CH4, MDF1_SDI0, USART3_RTS_DE; additional function WKUP4.
34 PB2 bidirectional 5 V-tolerant I/O (FT_hat) with analog switch; COMP1_INP2 and ADC1_IN17 analog functions; alternate functions include LPTIM1_CH1, TIM8_CH4N, I2C3_SMBA, SPI1_RDY; additional functions WKUP1, RTC_OUT2.
35 PE7 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include TIM1_ETR, MDF1_SDI2, FMC_D4, SAI1_SD_B; additional function WKUP6.
36 PE8 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include TIM1_CH1N, MDF1_CKI2, FMC_D5, SAI1_SCK_B; additional function WKUP7.
37 PE9 bidirectional 5 V-tolerant I/O (FT_hv) with very high-speed capability; alternate functions include TIM1_CH1, ADF1_CCK0, OCTOSPIM_P1_NCLK, FMC_D6, SAI1_FS_B.
38 PE10 bidirectional 5 V-tolerant I/O (FT_hav) with analog switch and very high-speed capability; alternate functions include TIM1_CH2N, ADF1_SDI0, TSC_G5_IO1, OCTOSPIM_P1_CLK, FMC_D7.
39 PE11 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; alternate functions include TIM1_CH2, SPI1_RDY, MDF1_CKI4, TSC_G5_IO2, OCTOSPIM_P1_NCS, FMC_D8.
40 PE12 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; alternate functions include TIM1_CH3N, SPI1_NSS, MDF1_SDI5, TSC_G5_IO3, OCTOSPIM_P1_IO0, FMC_D9.
41 PE13 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; alternate functions include TIM1_CH3, SPI1_SCK, MDF1_CKI5, TSC_G5_IO4, OCTOSPIM_P1_IO1, FMC_D10.
42 PE14 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, OCTOSPIM_P1_IO2, FMC_D11.
43 PE15 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include TIM1_BKIN, TIM1_CH4N, SPI1_MOSI, OCTOSPIM_P1_IO3, FMC_D12.
44 PB10 bidirectional 5 V-tolerant I/O (FT_fhv) with Fm+ and very high-speed capability; alternate functions include TIM2_CH3, I2C4_SCL, I2C2_SCL(boot), SPI2_SCK, USART3_TX, COMP1_OUT; additional function WKUP8.
45 PB11 bidirectional 5 V-tolerant I/O (FT_fh) with Fm+ capability; alternate functions include TIM2_CH4, I2C4_SDA, I2C2_SDA(boot), SPI2_RDY, USART3_RX, LPUART1_TX, COMP2_OUT.
46 VLXSMPS power_in SMPS switching node; external inductor of 2.2 uH +/-20% (ISAT > 0.5 A, DCR < 200 mOhm) is required between VLXSMPS and VDD11 (Section 5.1.6).
47 VDDSMPS power_in SMPS input supply; requires a 10 uF +/-20% input capacitor with ESR < 10 mOhm and rated voltage >= 10 V (Section 5.1.6); absolute maximum -0.3 V to 4.0 V (Table 29).
48 VSSSMPS power_in SMPS ground pin; must be connected to the external ground (Table 29 note 1).
49 VDD11 power_in SMPS-regulated 1.1 V core supply pin; each VDD11 pin requires COUT of 2 x 2.2 uF +/-20%, ESR < 20 mOhm and rated voltage >= 10 V (Section 5.1.6).
50 VSS power_in Ground pin; each VSS pin sinks at most 100 mA and the total ground current is limited to 200 mA (Table 30).
51 VDD power_in Main digital supply, 1.71 V to 3.6 V; VDD pins must not differ by more than 50 mV from each other (Table 29).
52 PB13 bidirectional 5 V-tolerant I/O (FT_fa) with Fm+ and analog switch capability; alternate functions include TIM1_CH1N, LPTIM3_IN1, I2C2_SCL, SPI2_SCK(boot), USART3_CTS, TIM15_CH1N.
53 PB14 bidirectional 5 V-tolerant I/O (FT_fda) with Fm+ and dead-battery capability; alternate functions include TIM1_CH2N, I2C2_SDA, SPI2_MISO(boot), USART3_RTS_DE, SDMMC2_D0; additional function UCPD1_DBCC2 (Table 26 note 4).
54 PB15 bidirectional 5 V-tolerant USB Type-C PD I/O (FT_c); after reset a 5.1 kOhm UCPD pull-down can be enabled on this pin (Table 26 note 4); alternate functions include RTC_REFIN, TIM1_CH3N, SPI2_MOSI(boot), FMC_NBL1; additional functions UCPD1_CC2, WKUP7.
55 PD8 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include USART3_TX, DCMI_HSYNC/PSSI_DE, FMC_D13.
56 PD9 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include LPTIM2_IN2, USART3_RX, DCMI_PIXCLK/PSSI_PDCK, FMC_D14, SAI2_MCLK_A.
57 PD10 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; alternate functions include LPTIM2_CH2, USART3_CK, TSC_G6_IO1, FMC_D15, SAI2_SCK_A.
58 PD11 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; alternate functions include I2C4_SMBA, USART3_CTS, TSC_G6_IO2, FMC_CLE/FMC_A16, SAI2_SD_A; additional function ADC4_IN15.
59 PD12 bidirectional 5 V-tolerant I/O (FT_fha) with Fm+ and analog switch capability; alternate functions include TIM4_CH1, I2C4_SCL, USART3_RTS_DE, FMC_ALE/FMC_A17; additional function ADC4_IN16.
60 PD13 bidirectional 5 V-tolerant I/O (FT_fha) with Fm+ and analog switch capability; alternate functions include TIM4_CH2, I2C4_SDA, TSC_G6_IO4, FMC_A18, LPTIM4_IN1; additional function ADC4_IN17.
61 PD14 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include TIM4_CH3, FMC_D0, LPTIM3_CH1.
62 PD15 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include TIM4_CH4, FMC_D1, LPTIM3_CH2.
63 PC6 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions include CSLEEP, TIM3_CH1, TIM8_CH1, SDMMC1_D0DIR, DCMI_D0/PSSI_D0, SAI2_MCLK_A.
64 PC7 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions include CDSTOP, TIM3_CH2, TIM8_CH2, MDF1_SDI3, DCMI_D1/PSSI_D1, SAI2_MCLK_B.
65 PC8 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions include SRDSTOP, TIM3_CH3, TIM8_CH3, DCMI_D2/PSSI_D2, SDMMC1_D0, LPTIM3_CH1.
66 PC9 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions include TRACED0, TIM8_BKIN2, TIM3_CH4, TIM8_CH4, DCMI_D3/PSSI_D3, OTG_FS_NOE, SDMMC1_D1.
67 PA8 bidirectional 5 V-tolerant I/O (FT_hv) with very high-speed capability; alternate functions include MCO, TIM1_CH1, SAI1_CK2, USART1_CK, OTG_FS_SOF, TRACECLK, SAI1_SCK_A.
68 PA9 bidirectional USB-capable 5 V-tolerant I/O (FT_u) powered by VDDUSB; alternate functions include TIM1_CH2, SPI2_SCK, DCMI_D0/PSSI_D0, USART1_TX(boot), SAI1_FS_A; additional function OTG_FS_VBUS.
69 PA10 bidirectional USB-capable 5 V-tolerant I/O (FT_u) powered by VDDUSB; alternate functions include CRS_SYNC, TIM1_CH3, LPTIM2_IN2, SAI1_D1, USART1_RX(boot), OTG_FS_ID, TIM17_BKIN.
70 PA11 bidirectional USB-capable 5 V-tolerant I/O (FT_u) powered by VDDUSB; alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS, FDCAN1_RX, OTG_FS_DM(boot).
71 PA12 bidirectional USB-capable 5 V-tolerant I/O (FT_u) powered by VDDUSB; alternate functions include TIM1_ETR, SPI1_MOSI, OCTOSPIM_P2_NCS, USART1_RTS_DE, FDCAN1_TX, OTG_FS_DP(boot).
72 PA13 bidirectional 5 V-tolerant I/O (FT) that after reset is the JTMS/SWDIO function with internal pull-up (Table 26 note 5); alternate functions include IR_OUT, OTG_FS_NOE, SAI1_SD_B.
73 VDDUSB power_in Supply for the USB function and USB Type-C/PD I/Os; absolute maximum -0.3 V to 4.0 V (Table 29).
74 VSS power_in Ground pin; each VSS pin sinks at most 100 mA and the total ground current is limited to 200 mA (Table 30).
75 VDD power_in Main digital supply, 1.71 V to 3.6 V; VDD pins must not differ by more than 50 mV from each other (Table 29).
76 PA14 bidirectional 5 V-tolerant I/O (FT) that after reset is the JTCK/SWCLK function with internal pull-down (Table 26 note 5); alternate functions include LPTIM1_CH1, I2C1_SMBA, OTG_FS_SOF, SAI1_FS_B.
77 PA15 (JTDI) bidirectional 5 V-tolerant USB Type-C PD I/O (FT_c) that after reset is the JTDI function with internal pull-up (Table 26 notes 4-5); alternate functions include TIM2_CH1, USART2_RX, SPI1_NSS, UCPD1_CC1.
78 PC10 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions include TRACED1, LPTIM3_ETR, SPI3_SCK, USART3_TX(boot), UART4_TX, SDMMC1_D2, SAI2_SCK_B.
79 PC11 bidirectional 5 V-tolerant I/O (FT_ha) with analog switch; alternate functions include LPTIM3_IN1, ADF1_SDI0, OCTOSPIM_P1_NCS, SPI3_MISO, USART3_RX(boot), UART4_RX, UCPD1_FRSTX2, SDMMC1_D3.
80 PC12 bidirectional 3.6 V-tolerant I/O (TT_hav) with analog switch; alternate functions include TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, DCMI_D9/PSSI_D9, SDMMC1_CK, SAI2_SD_B.
81 PD0 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include TIM8_CH4N, SPI2_NSS, FDCAN1_RX, FMC_D2.
82 PD1 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include SPI2_SCK, FDCAN1_TX, FMC_D3.
83 PD2 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED2, TIM3_ETR, USART3_RTS_DE, UART5_RX, TSC_SYNC, DCMI_D11/PSSI_D11, SDMMC1_CMD, LPTIM4_ETR.
84 PD3 bidirectional 5 V-tolerant I/O (FT_hv) with very high-speed capability; alternate functions include SPI2_SCK, DCMI_D5/PSSI_D5, SPI2_MISO, MDF1_SDI0, USART2_CTS, OCTOSPIM_P2_NCS, FMC_CLK.
85 PD4 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include SPI2_MOSI, MDF1_CKI0, USART2_RTS_DE, OCTOSPIM_P1_IO4, FMC_NOE.
86 PD5 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include SPI2_RDY, USART2_TX, OCTOSPIM_P1_IO5, FMC_NWE.
87 PD6 bidirectional 5 V-tolerant I/O (FT_hv) with very high-speed capability; alternate functions include SAI1_D1, DCMI_D10/PSSI_D10, SPI3_MOSI, MDF1_SDI1, USART2_RX, SDMMC2_CK, FMC_NWAIT, SAI1_SD_A.
88 PD7 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include MDF1_CKI1, USART2_CK, OCTOSPIM_P1_IO7, SDMMC2_CMD, FMC_NCE/FMC_NE1, LPTIM4_OUT.
89 PB3 bidirectional 5 V-tolerant I/O (FT_fa) with Fm+ and analog switch capability; after reset it is the JTDO/TRACESWO function; alternate functions include TIM2_CH2, LPTIM1_CH1, I2C1_SDA, SPI1_SCK, SPI3_SCK, USART1_RTS_DE; additional function COMP2_INM2.
90 PB4 (NJTRST) bidirectional 5 V-tolerant I/O (FT_fa) with Fm+ and analog switch capability; after reset it is the NJTRST function with internal pull-up (Table 26 note 5); alternate functions include LPTIM1_CH2, TIM3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS; additional function COMP2_INP1.
91 PB5 bidirectional 5 V-tolerant I/O (FT_havd) with high-speed low-voltage, analog switch and dead-battery capability; alternate functions include LPTIM1_IN1, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI(boot), USART1_CK; additional functions UCPD1_DBCC1, WKUP6.
92 PB6 bidirectional 5 V-tolerant I/O (FT_fa) with Fm+ and analog switch capability; alternate functions include LPTIM1_ETR, TIM4_CH1, I2C1_SCL(boot), I2C4_SCL, USART1_TX, DCMI_D5/PSSI_D5, SAI1_FS_B; additional functions COMP2_INP2, WKUP3.
93 PB7 bidirectional 5 V-tolerant I/O (FT_fhav) with Fm+, high-speed low-voltage and analog switch capability; alternate functions include LPTIM1_IN2, TIM4_CH2, I2C1_SDA(boot), I2C4_SDA, USART1_RX, FMC_NL; additional functions COMP2_INM1, PVD_IN, WKUP4.
94 PH3-BOOT0 bidirectional FT I/O that is also the BOOT0 boot-mode selection pin (boot modes defined in Tables 6 and 7); additional function EVENTOUT.
95 PB8 bidirectional 5 V-tolerant I/O (FT_f) with Fm+ capability; alternate functions include TIM4_CH3, SAI1_CK1, I2C1_SCL, SPI3_RDY, SDMMC1_CKIN, FDCAN1_RX(boot), DCMI_D6/PSSI_D6, TIM16_CH1; additional function WKUP5.
96 PB9 bidirectional 5 V-tolerant I/O (FT_f) with Fm+ capability; alternate functions include IR_OUT, TIM4_CH4, SAI1_D2, I2C1_SDA, SPI2_NSS, SDMMC1_CDIR, FDCAN1_TX(boot), DCMI_D7/PSSI_D7, TIM17_CH1.
97 PE0 bidirectional 5 V-tolerant I/O (FT_h) supporting high-speed low-voltage mode; alternate functions include TIM4_ETR, DCMI_D2/PSSI_D2, LPGPIO1_P13, FMC_NBL0, TIM16_CH1.
98 VDD11 power_in Second SMPS-regulated 1.1 V core supply pin; each VDD11 pin requires COUT of 2 x 2.2 uF +/-20%, ESR < 20 mOhm and rated voltage >= 10 V (Section 5.1.6).
99 VSS power_in Ground pin; each VSS pin sinks at most 100 mA and the total ground current is limited to 200 mA (Table 30).
100 VDD power_in Main digital supply, 1.71 V to 3.6 V; VDD pins must not differ by more than 50 mV from each other (Table 29).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32U575VGT6Q
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32u575vgt6q-etched.step / stm32u575vgt6q-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32u575vgt6q.step / stm32u575vgt6q.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (338 pp, sha256 6e54872aba50deff, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF