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STM32L562RET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L562RET6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32L562RET6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply (1.55 V to 3.6 V) for the RTC, the 32 kHz oscillator and backup registers when VDD is not present. |
| 2 | PC13 | bidirectional | 5 V tolerant GPIO supplied through the power switch, which sinks only 3 mA, so output speed must stay at or below 2 MHz with a 30 pF load and the pin must not be used as a current source; also WKUP2, RTC_TS/RTC_OUT1 and TAMP_IN1/TAMP_OUT2. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant GPIO supplied through the power switch with the same 3 mA, 2 MHz / 30 pF and no-current-source limits; alternate function OSC32_IN (32 kHz oscillator input). |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V tolerant GPIO supplied through the power switch with the same 3 mA, 2 MHz / 30 pF and no-current-source limits; alternate function OSC32_OUT (32 kHz oscillator output). |
| 5 | PH0-OSC_IN | bidirectional | 5 V tolerant GPIO (FT) with EVENTOUT, whose additional function is the OSC_IN high-speed oscillator input. |
| 6 | PH1-OSC_OUT | bidirectional | 5 V tolerant GPIO (FT) with EVENTOUT, whose additional function is the OSC_OUT high-speed oscillator output. |
| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |
| 8 | PC0 | bidirectional | 5 V tolerant I/O with Fm+ capability and analog switch supplied by VDDA; alternate functions include LPTIM1_IN1, OCTOSPI1_IO7, I2C3_SCL, LPUART1_RX, SDMMC1_D5, SAI2_FS_A and LPTIM2_IN1; additional function ADC12_IN1. |
| 9 | PC1 | bidirectional | 5 V tolerant I/O with Fm+ capability and analog switch supplied by VDDA; alternate functions include TRACED0, LPTIM1_OUT, SPI2_MOSI, I2C3_SDA, LPUART1_TX, OCTOSPI1_IO4 and SAI1_SD_A; additional function ADC12_IN2. |
| 10 | PC2 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT and OCTOSPI1_IO5; additional function ADC12_IN3. |
| 11 | PC3 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include LPTIM1_ETR, LPTIM3_OUT, SAI1_D1, SPI2_MOSI, OCTOSPI1_IO6, SAI1_SD_A and LPTIM2_ETR; additional function ADC12_IN4. |
| 12 | VSSA/VREF- | power_in | Analog ground for the ADC, DAC, OPAMP, COMP and VREFBUF; VREF- must always be equal to VSSA. |
| 13 | VDDA/VREF+ | power_in | Analog supply (1.62 V for ADC/COMP, 1.8 V for DAC/OPAMP, 2.4 V for VREFBUF, up to 3.6 V) that also serves as the ADC/DAC reference input VREF+, which must equal VDDA when VDDA is below 2 V. |
| 14 | PA0 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS/USART2_NSS and UART4_TX; additional functions OPAMP1_VINP, ADC12_IN5, WKUP1 and TAMP_IN2/TAMP_OUT1. |
| 15 | PA1 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH2, TIM5_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS/USART2_DE and UART4_RX; additional functions OPAMP1_VINM, ADC12_IN6 and TAMP_IN5/TAMP_OUT4. |
| 16 | PA2 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH3, TIM5_CH3, USART2_TX, LPUART1_TX, OCTOSPI1_NCS and UCPD1_FRSTX1; additional functions ADC12_IN7, WKUP4/LSCO and COMP1_INP. |
| 17 | PA3 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH4, TIM5_CH4, SAI1_CK1, USART2_RX, LPUART1_RX and OCTOSPI1_CLK; additional functions OPAMP1_VOUT and ADC12_IN8. |
| 18 | VSS | power_in | Ground pin. |
| 19 | VDD | power_in | Main supply pin, 1.71 V to 3.6 V, for the I/Os, internal regulator and system analog blocks. |
| 20 | PA4 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; alternate functions include OCTOSPI1_NCS, SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B and LPTIM2_OUT; additional functions ADC12_IN9 and DAC1_OUT1. |
| 21 | PA5 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK and LPTIM2_ETR; additional functions ADC12_IN10 and DAC1_OUT2. |
| 22 | PA6 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, USART3_CTS/USART3_NSS, LPUART1_CTS, OCTOSPI1_IO3 and TIM16_CH1; additional functions OPAMP2_VINP and ADC12_IN11. |
| 23 | PA7 | bidirectional | 5 V tolerant I/O with Fm+ capability and analog switch supplied by VDDA; alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, I2C3_SCL, SPI1_MOSI, OCTOSPI1_IO2 and TIM17_CH1; additional functions OPAMP2_VINM and ADC12_IN12. |
| 24 | PC4 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include USART3_TX and OCTOSPI1_IO7; additional functions COMP1_INM and ADC12_IN13. |
| 25 | PC5 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include SAI1_D3 and USART3_RX; additional functions ADC12_IN14, WKUP5, TAMP_IN4/TAMP_OUT5 and COMP1_INP. |
| 26 | PB0 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI1_NSS, USART3_CK, OCTOSPI1_IO1, COMP1_OUT and SAI1_EXTCLK; additional functions OPAMP2_VOUT and ADC12_IN15. |
| 27 | PB1 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN0, USART3_RTS/USART3_DE, LPUART1_RTS/LPUART1_DE, OCTOSPI1_IO0 and LPTIM2_IN1; additional functions COMP1_INM and ADC12_IN16. |
| 28 | PB2 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions include LPTIM1_OUT, I2C3_SMBA, DFSDM1_CKIN0, OCTOSPI1_DQS and UCPD1_FRSTX1; additional functions RTC_OUT2 and COMP1_INP. |
| 29 | PB10 | bidirectional | 5 V tolerant I/O with Fm+ capability; alternate functions include TIM2_CH3, LPTIM3_OUT, I2C4_SCL, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, OCTOSPI1_CLK, COMP1_OUT and SAI1_SCK_A. |
| 30 | PB11 | bidirectional | 5 V tolerant I/O with Fm+ capability; alternate functions include TIM2_CH4, I2C4_SDA, I2C2_SDA, USART3_RX, LPUART1_TX, OCTOSPI1_NCS and COMP2_OUT. |
| 31 | VSS | power_in | Ground pin. |
| 32 | VDD | power_in | Main supply pin, 1.71 V to 3.6 V, for the I/Os, internal regulator and system analog blocks. |
| 33 | PB12 | bidirectional | 5 V tolerant I/O; alternate functions include TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, LPUART1_RTS/LPUART1_DE, TSC_G1_IO1, OCTOSPI1_NCLK, SAI2_FS_A and TIM15_BKIN. |
| 34 | PB13 | bidirectional | 5 V tolerant I/O with Fm+ capability; alternate functions include TIM1_CH1N, LPTIM3_IN1, I2C2_SCL, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS/USART3_NSS, LPUART1_CTS, TSC_G1_IO2, UCPD1_FRSTX2, SAI2_SCK_A and TIM15_CH1N. |
| 35 | PB14 | bidirectional | 5 V tolerant I/O with Fm+ capability and USB Type-C dead-battery function; alternate functions include TIM1_CH2N, LPTIM3_ETR, TIM8_CH2N, I2C2_SDA, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS/USART3_DE, TSC_G1_IO3, SAI2_MCLK_A and TIM15_CH1; additional function UCPD1_DB2. |
| 36 | PB15 | bidirectional | 5 V tolerant I/O with USB Type-C PD capability; alternate functions include RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, DFSDM1_CKIN2, SAI2_SD_A and TIM15_CH2; additional function UCPD1_CC2. |
| 37 | PC6 | bidirectional | 5 V tolerant I/O; alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, SDMMC1_D0DIR, TSC_G4_IO1, SDMMC1_D6 and SAI2_MCLK_A. |
| 38 | PC7 | bidirectional | 5 V tolerant I/O; alternate functions include TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, SDMMC1_D123DIR, TSC_G4_IO2, SDMMC1_D7 and SAI2_MCLK_B. |
| 39 | PC8 | bidirectional | 5 V tolerant I/O; alternate functions include TIM3_CH3, TIM8_CH3, TSC_G4_IO3 and SDMMC1_D0. |
| 40 | PC9 | bidirectional | 5 V tolerant I/O with Fm+ capability; alternate functions include TRACED0, TIM8_BKIN2, TIM3_CH4, TIM8_CH4, TSC_G4_IO4, USB_NOE, SDMMC1_D1 and SAI2_EXTCLK. |
| 41 | PA8 | bidirectional | 5 V tolerant I/O with Fm+ capability; alternate functions include MCO, TIM1_CH1, SAI1_CK2, USART1_CK, SAI1_SCK_A and LPTIM2_OUT. |
| 42 | PA9 | bidirectional | 5 V tolerant I/O with Fm+ capability and USB function supplied by VDDUSB; alternate functions include TIM1_CH2, SPI2_SCK, USART1_TX, SAI1_FS_A and TIM15_BKIN. |
| 43 | PA10 | bidirectional | 5 V tolerant I/O with Fm+ capability and USB function supplied by VDDUSB; alternate functions include TIM1_CH3, SAI1_D1, USART1_RX, CRS_SYNC, SAI1_SD_A and TIM17_BKIN. |
| 44 | PA11 | bidirectional | 5 V tolerant I/O with USB function supplied by VDDUSB; alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS/USART1_NSS, FDCAN1_RX and USB_DM. |
| 45 | PA12 | bidirectional | 5 V tolerant I/O with USB function supplied by VDDUSB; alternate functions include TIM1_ETR, SPI1_MOSI, USART1_RTS/USART1_DE, FDCAN1_TX and USB_DP. |
| 46 | PA13 | bidirectional | 5 V tolerant I/O that after reset is the JTMS/SWDIO debug pin with its internal pull-up enabled; alternate functions include IR_OUT, USB_NOE, SAI1_SD_B and EVENTOUT. |
| 47 | VSS | power_in | Ground pin. |
| 48 | VDDUSB | power_in | USB transceiver supply, 3.0 V to 3.6 V when USB is used; should preferably be connected to VDD if USB is not used. |
| 49 | PA14 | bidirectional | 5 V tolerant I/O that after reset is the JTCK/SWCLK debug pin with its internal pull-down enabled; alternate functions include LPTIM1_OUT, I2C1_SMBA, I2C4_SMBA and SAI1_FS_B. |
| 50 | PA15 (JTDI) | bidirectional | 5 V tolerant USB Type-C PD capable I/O that after reset is the JTDI debug pin with its internal pull-up enabled; alternate functions include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS/USART3_DE, UART4_RTS/UART4_DE and SAI2_FS_B; additional function UCPD1_CC1. |
| 51 | PC10 | bidirectional | 5 V tolerant I/O; alternate functions include TRACED1, LPTIM3_ETR, SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2, SDMMC1_D2 and SAI2_SCK_B. |
| 52 | PC11 | bidirectional | 5 V tolerant I/O; alternate functions include LPTIM3_IN1, OCTOSPI1_NCS, SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3, UCPD1_FRSTX2, SDMMC1_D3 and SAI2_MCLK_B. |
| 53 | PC12 | bidirectional | 5 V tolerant I/O; alternate functions include TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, TSC_G3_IO4, SDMMC1_CK and SAI2_SD_B. |
| 54 | PD2 | bidirectional | 5 V tolerant I/O; alternate functions include TRACED2, TIM3_ETR, USART3_RTS/USART3_DE, UART5_RX, TSC_SYNC and SDMMC1_CMD. |
| 55 | PB3 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; alternate functions include JTDO/TRACESWO, TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS/USART1_DE and SAI1_SCK_B; additional function COMP2_INM. |
| 56 | PB4 | bidirectional | 5 V tolerant I/O with Fm+ capability and analog switch supplied by VDDA that after reset carries the NJTRST debug function with its internal pull-up enabled; alternate functions include TIM3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS/USART1_NSS, UART5_RTS/UART5_DE, TSC_G2_IO1, SAI1_MCLK_B and TIM17_BKIN; additional function COMP2_INP. |
| 57 | PB5 | bidirectional | 5 V tolerant I/O with USB Type-C dead-battery function; alternate functions include LPTIM1_IN1, TIM3_CH2, OCTOSPI1_NCLK, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, UART5_CTS/UART5_NSS, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B and TIM16_BKIN; additional function UCPD1_DB1. |
| 58 | PB6 | bidirectional | 5 V tolerant I/O with Fm+ capability and analog switch supplied by VDDA; alternate functions include LPTIM1_ETR, TIM4_CH1, TIM8_BKIN2, I2C1_SCL, I2C4_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B and TIM16_CH1N; additional function COMP2_INP. |
| 59 | PB7 | bidirectional | 5 V tolerant I/O with Fm+ capability and analog switch supplied by VDDA; alternate functions include LPTIM1_IN2, TIM4_CH2, TIM8_BKIN, I2C1_SDA, I2C4_SDA, USART1_RX, UART4_CTS, TSC_G2_IO4, FMC_NL and TIM17_CH1N; additional functions COMP2_INM and PVD_IN. |
| 60 | PH3-BOOT0 | bidirectional | 5 V tolerant I/O (FT) on the BOOT0 pin, which selects the boot mode; the table lists only EVENTOUT as its function. |
| 61 | PB8 | bidirectional | 5 V tolerant I/O with Fm+ capability; alternate functions include TIM4_CH3, SAI1_CK1, I2C1_SCL, DFSDM1_CKOUT, SDMMC1_CKIN, FDCAN1_RX, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1. |
| 62 | PB9 | bidirectional | 5 V tolerant I/O with Fm+ capability; alternate functions include IR_OUT, TIM4_CH4, SAI1_D2, I2C1_SDA, SPI2_NSS, SDMMC1_CDIR, FDCAN1_TX, SDMMC1_D5, SAI1_FS_A and TIM17_CH1. |
| 63 | VSS | power_in | Ground pin. |
| 64 | VDD | power_in | Main supply pin, 1.71 V to 3.6 V, for the I/Os, internal regulator and system analog blocks. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L562RET6 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32l562ret6-etched.step/stm32l562ret6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l562ret6.step/stm32l562ret6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (342 pp, sha256
22ede73a591c8bb2, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).