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STM32L552ZCT6Q

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STMicroelectronics Microcontroller Units (MCUs/MPUs/SOCs), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32L552ZCT6Q

STMicroelectronics · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-144(20x20)

STM32L552ZCT6Q from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant (FT) I/O; alternate functions include TRACECK, TIM3_ETR, SAI1_CK1, TSC_G7_IO1, FMC_A23 and SAI1_MCLK_A.
2 PE3 bidirectional 5 V-tolerant (FT) I/O; alternate functions include TRACED0, TIM3_CH1, OCTOSPI1_DQS, TSC_G7_IO2, FMC_A19 and SAI1_SD_B.
3 PE4 bidirectional 5 V-tolerant (FT) I/O; alternate functions include TRACED1, TIM3_CH2, SAI1_D2, DFSDM1_DATIN3, TSC_G7_IO3 and FMC_A20.
4 PE5 bidirectional 5 V-tolerant (FT) I/O; alternate functions include TRACED2, TIM3_CH3, SAI1_CK2, DFSDM1_CKIN3, TSC_G7_IO4 and FMC_A21.
5 PE6 bidirectional 5 V-tolerant (FT) I/O; alternate functions include TRACED3, TIM3_CH4, SAI1_D1 and FMC_A22; additional functions WKUP3 and TAMP_IN3/TAMP_OUT6.
6 VBAT power_in Backup domain supply for the RTC, the 32 kHz oscillator and backup registers when VDD is absent, 1.55 V to 3.6 V.
7 PC13 bidirectional 5 V-tolerant (FT) I/O supplied through the VBAT power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not drive current sources such as LEDs; additional functions WKUP2, RTC_TS/RTC_OUT1 and TAMP_IN1/TAMP_OUT2.
8 PC14-OSC32_IN bidirectional 5 V-tolerant (FT) I/O supplied through the VBAT power switch with the same 3 mA and output-speed limits as PC13; additional function OSC32_IN (LSE input).
9 PC15-OSC32_OUT bidirectional 5 V-tolerant (FT) I/O supplied through the VBAT power switch with the same 3 mA and output-speed limits as PC13; additional function OSC32_OUT (LSE output).
10 PF0 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions I2C2_SDA, FMC_A0 and EVENTOUT.
11 PF1 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions I2C2_SCL, FMC_A1 and EVENTOUT.
12 PF2 bidirectional 5 V-tolerant (FT) I/O; alternate functions I2C2_SMBA, FMC_A2 and EVENTOUT.
13 PF3 bidirectional 5 V-tolerant (FT) I/O; alternate functions LPTIM3_IN1, FMC_A3 and EVENTOUT.
14 PF4 bidirectional 5 V-tolerant (FT) I/O; alternate functions LPTIM3_ETR, FMC_A4 and EVENTOUT.
15 PF5 bidirectional 5 V-tolerant (FT) I/O; alternate functions LPTIM3_OUT, FMC_A5 and EVENTOUT.
16 VSS power_in Ground pin for the digital supply domain.
17 VDD power_in Main supply for I/Os, the internal regulator and system analog blocks, 1.71 V to 3.6 V.
18 PF6 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM5_ETR, TIM5_CH1, OCTOSPI1_IO3, SAI1_SD_B and EVENTOUT.
19 PF7 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM5_CH2, OCTOSPI1_IO2, SAI1_MCLK_B and EVENTOUT; additional function TAMP_IN6/TAMP_OUT3.
20 PF8 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM5_CH3, OCTOSPI1_IO0, SAI1_SCK_B and EVENTOUT; additional function TAMP_IN7/TAMP_OUT8.
21 PF9 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM5_CH4, OCTOSPI1_IO1, SAI1_FS_B, TIM15_CH1 and EVENTOUT; additional function TAMP_IN8/TAMP_OUT7.
22 PF10 bidirectional 5 V-tolerant (FT) I/O; alternate functions OCTOSPI1_CLK, DFSDM1_CKOUT, SAI1_D3, TIM15_CH2 and EVENTOUT.
23 PH0-OSC_IN bidirectional 5 V-tolerant (FT) I/O; additional function OSC_IN (HSE oscillator input) and EVENTOUT.
24 PH1-OSC_OUT bidirectional 5 V-tolerant (FT) I/O; additional function OSC_OUT (HSE oscillator output) and EVENTOUT.
25 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
26 PC0 bidirectional 5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa); alternate functions LPTIM1_IN1, OCTOSPI1_IO7, I2C3_SCL, LPUART1_RX, SDMMC1_D5, SAI2_FS_A and LPTIM2_IN1; additional function ADC12_IN1.
27 PC1 bidirectional 5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa); alternate functions TRACED0, LPTIM1_OUT, SPI2_MOSI, I2C3_SDA, LPUART1_TX and OCTOSPI1_IO4; additional function ADC12_IN2.
28 PC2 bidirectional 5 V-tolerant I/O with analog switch (FT_a); alternate functions LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT and OCTOSPI1_IO5; additional function ADC12_IN3.
29 PC3 bidirectional 5 V-tolerant I/O with analog switch (FT_a); alternate functions LPTIM1_ETR, LPTIM3_OUT, SAI1_D1, SPI2_MOSI, OCTOSPI1_IO6 and SAI1_SD_A; additional function ADC12_IN4.
30 VSSA/VREF- power_in Analog ground for ADC, DAC, OPAMP, COMP and VREFBUF; in this package VREF- is bonded to VSSA and must always equal VSSA.
31 VREF+ power_in Positive reference voltage for ADCs and DACs and output of the internal voltage reference buffer when enabled; when VDDA < 2 V it must equal VDDA, and when VDDA >= 2 V it must be between 2 V and VDDA.
32 VDDA power_in Analog supply for ADC/COMP (1.62 V min), DAC/OPAMP (1.8 V min) and VREFBUF (2.4 V min) up to 3.6 V; preferably connected to VDD when these blocks are unused.
33 PA0 bidirectional 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS/USART2_NSS, UART4_TX, SAI1_EXTCLK and TIM2_ETR; additional functions OPAMP1_VINP, ADC12_IN5, WKUP1 and TAMP_IN2/TAMP_OUT1.
34 PA1 bidirectional 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM2_CH2, TIM5_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS/USART2_DE, UART4_RX and OCTOSPI1_DQS; additional functions OPAMP1_VINM, ADC12_IN6 and TAMP_IN5/TAMP_OUT4.
35 PA2 bidirectional 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM2_CH3, TIM5_CH3, USART2_TX, LPUART1_TX, OCTOSPI1_NCS, UCPD1_FRSTX1 and SAI2_EXTCLK; additional functions ADC12_IN7, WKUP4/LSCO and COMP1_INP.
36 PA3 bidirectional 3.6 V-tolerant I/O with analog switch (TT_a); alternate functions TIM2_CH4, TIM5_CH4, SAI1_CK1, USART2_RX, LPUART1_RX, OCTOSPI1_CLK and SAI1_MCLK_A; additional functions OPAMP1_VOUT and ADC12_IN8.
37 VSS power_in Ground pin for the digital supply domain.
38 VDD power_in Main supply for I/Os, the internal regulator and system analog blocks, 1.71 V to 3.6 V.
39 PA4 bidirectional 3.6 V-tolerant I/O with analog switch (TT_a); alternate functions OCTOSPI1_NCS, SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B and LPTIM2_OUT; additional functions ADC12_IN9 and DAC1_OUT1.
40 PA5 bidirectional 3.6 V-tolerant I/O with analog switch (TT_a); alternate functions TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK and LPTIM2_ETR; additional functions ADC12_IN10 and DAC1_OUT2.
41 PA6 bidirectional 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, USART3_CTS/USART3_NSS, LPUART1_CTS, OCTOSPI1_IO3 and TIM16_CH1; additional functions OPAMP2_VINP and ADC12_IN11.
42 PA7 bidirectional 5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa); alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, I2C3_SCL, SPI1_MOSI, OCTOSPI1_IO2 and TIM17_CH1; additional functions OPAMP2_VINM and ADC12_IN12.
43 PB0 bidirectional 3.6 V-tolerant I/O with analog switch (TT_a); alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI1_NSS, USART3_CK, OCTOSPI1_IO1, COMP1_OUT and SAI1_EXTCLK; additional functions OPAMP2_VOUT and ADC12_IN15.
44 PB1 bidirectional 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN0, USART3_RTS/USART3_DE, LPUART1_RTS/LPUART1_DE, OCTOSPI1_IO0 and LPTIM2_IN1; additional functions COMP1_INM and ADC12_IN16.
45 PB2 bidirectional 5 V-tolerant I/O with analog switch (FT_a); alternate functions LPTIM1_OUT, I2C3_SMBA, DFSDM1_CKIN0, OCTOSPI1_DQS and UCPD1_FRSTX1; additional functions RTC_OUT2 and COMP1_INP.
46 PF11 bidirectional 5 V-tolerant (FT) I/O; alternate function OCTOSPI1_NCLK and EVENTOUT.
47 PF12 bidirectional 5 V-tolerant (FT) I/O; alternate function FMC_A6 and EVENTOUT.
48 VSS power_in Ground pin for the digital supply domain.
49 VDD power_in Main supply for I/Os, the internal regulator and system analog blocks, 1.71 V to 3.6 V.
50 PF13 bidirectional 5 V-tolerant (FT) I/O; alternate functions I2C4_SMBA, FMC_A7 and EVENTOUT.
51 PF14 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions I2C4_SCL, TSC_G8_IO1, FMC_A8 and EVENTOUT.
52 PF15 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions I2C4_SDA, TSC_G8_IO2, FMC_A9 and EVENTOUT.
53 PG0 bidirectional 5 V-tolerant (FT) I/O; alternate functions TSC_G8_IO3, FMC_A10 and EVENTOUT.
54 PG1 bidirectional 5 V-tolerant (FT) I/O; alternate functions TSC_G8_IO4, FMC_A11 and EVENTOUT.
55 PE7 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM1_ETR, DFSDM1_DATIN2, FMC_D4, SAI1_SD_B and EVENTOUT.
56 PE8 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM1_CH1N, DFSDM1_CKIN2, FMC_D5, SAI1_SCK_B and EVENTOUT.
57 PE9 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM1_CH1, DFSDM1_CKOUT, OCTOSPI1_NCLK, FMC_D6 and SAI1_FS_B.
58 VSS power_in Ground pin for the digital supply domain.
59 VDD power_in Main supply for I/Os, the internal regulator and system analog blocks, 1.71 V to 3.6 V.
60 PE10 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM1_CH2N, TSC_G5_IO1, OCTOSPI1_CLK, FMC_D7 and SAI1_MCLK_B.
61 PE11 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM1_CH2, TSC_G5_IO2, OCTOSPI1_NCS and FMC_D8.
62 PE12 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM1_CH3N, SPI1_NSS, TSC_G5_IO3, OCTOSPI1_IO0 and FMC_D9.
63 PE13 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM1_CH3, SPI1_SCK, TSC_G5_IO4, OCTOSPI1_IO1 and FMC_D10.
64 PE14 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM1_CH4, TIM1_BKIN2, SPI1_MISO, OCTOSPI1_IO2 and FMC_D11.
65 PE15 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM1_BKIN, SPI1_MOSI, OCTOSPI1_IO3 and FMC_D12.
66 PB10 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions TIM2_CH3, LPTIM3_OUT, I2C4_SCL, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, OCTOSPI1_CLK, COMP1_OUT and SAI1_SCK_A.
67 PB11 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions TIM2_CH4, I2C4_SDA, I2C2_SDA, USART3_RX, LPUART1_TX, OCTOSPI1_NCS, COMP2_OUT and EVENTOUT.
68 VDDSMPS power_in Supply for the internal SMPS step-down converter, 1.71 V to 3.6 V, to be connected to the same supply as VDD.
69 VLXSMPS power_out Switched output of the SMPS step-down converter, connected to the external 4.7 µH (typ.) inductor.
70 VSSSMPS power_in Ground pin for the SMPS step-down converter.
71 VSS power_in Ground pin for the digital supply domain.
72 V15SMPS_1 power_in Power supply for the system regulator, provided externally through the SMPS VLXSMPS output (1.5 V range nominal per Table 29).
73 VDD power_in Main supply for I/Os, the internal regulator and system analog blocks, 1.71 V to 3.6 V.
74 PB13 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions TIM1_CH1N, LPTIM3_IN1, I2C2_SCL, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS/USART3_NSS, LPUART1_CTS, TSC_G1_IO2, UCPD1_FRSTX2, SAI2_SCK_A and TIM15_CH1N.
75 PB14 bidirectional 5 V-tolerant I/O with Fm+ capability and dead-battery function (FT_fd); alternate functions TIM1_CH2N, LPTIM3_ETR, TIM8_CH2N, I2C2_SDA, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS/USART3_DE and TIM15_CH1; additional function UCPD1_DB2.
76 PB15 bidirectional 5 V-tolerant I/O with USB Type-C PD capability (FT_c); alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, DFSDM1_CKIN2, SAI2_SD_A and TIM15_CH2; additional function UCPD1_CC2.
77 PD8 bidirectional 5 V-tolerant (FT) I/O; alternate functions USART3_TX, FMC_D13 and EVENTOUT.
78 PD9 bidirectional 5 V-tolerant (FT) I/O; alternate functions USART3_RX, FMC_D14, SAI2_MCLK_A and EVENTOUT.
79 PD10 bidirectional 5 V-tolerant (FT) I/O; alternate functions USART3_CK, TSC_G6_IO1, FMC_D15, SAI2_SCK_A and EVENTOUT.
80 PD11 bidirectional 5 V-tolerant (FT) I/O; alternate functions I2C4_SMBA, USART3_CTS/USART3_NSS, TSC_G6_IO2, FMC_A16, SAI2_SD_A and LPTIM2_ETR.
81 PD12 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions TIM4_CH1, I2C4_SCL, USART3_RTS/USART3_DE, TSC_G6_IO3, FMC_A17, SAI2_FS_A and LPTIM2_IN1.
82 PD13 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions TIM4_CH2, I2C4_SDA, TSC_G6_IO4, FMC_A18 and LPTIM2_OUT.
83 VSS power_in Ground pin for the digital supply domain.
84 VDD power_in Main supply for I/Os, the internal regulator and system analog blocks, 1.71 V to 3.6 V.
85 PD14 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM4_CH3, FMC_D0 and EVENTOUT.
86 PD15 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM4_CH4, FMC_D1 and EVENTOUT.
87 PG2 bidirectional 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI1_SCK, FMC_A12, SAI2_SCK_B and EVENTOUT.
88 PG3 bidirectional 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI1_MISO, FMC_A13, SAI2_FS_B and EVENTOUT.
89 PG4 bidirectional 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI1_MOSI, FMC_A14, SAI2_MCLK_B and EVENTOUT.
90 PG5 bidirectional 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI1_NSS, LPUART1_CTS, FMC_A15, SAI2_SD_B and EVENTOUT.
91 PG6 bidirectional 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions OCTOSPI1_DQS, I2C3_SMBA, LPUART1_RTS/LPUART1_DE, UCPD1_FRSTX1 and EVENTOUT.
92 PG7 bidirectional 5 V-tolerant I/O with Fm+ capability, supplied only by VDDIO2 (FT_fs); alternate functions SAI1_CK1, I2C3_SCL, DFSDM1_CKOUT, LPUART1_TX, UCPD1_FRSTX2, FMC_INT and SAI1_MCLK_A.
93 PG8 bidirectional 5 V-tolerant I/O with Fm+ capability, supplied only by VDDIO2 (FT_fs); alternate functions I2C3_SDA, LPUART1_RX and EVENTOUT.
94 VSS power_in Ground pin for the digital supply domain.
95 VDDIO2 power_in Supply for the 14 I/Os of port PG[15:2], 1.08 V to 3.6 V when at least one of them is used.
96 PC6 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, SDMMC1_D0DIR, TSC_G4_IO1, SDMMC1_D6 and SAI2_MCLK_A.
97 PC7 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, SDMMC1_D123DIR, TSC_G4_IO2, SDMMC1_D7 and SAI2_MCLK_B.
98 PC8 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM3_CH3, TIM8_CH3, TSC_G4_IO3 and SDMMC1_D0.
99 PC9 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions TRACED0, TIM8_BKIN2, TIM3_CH4, TIM8_CH4, TSC_G4_IO4, USB_NOE, SDMMC1_D1 and SAI2_EXTCLK.
100 PA8 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions MCO, TIM1_CH1, SAI1_CK2, USART1_CK, SAI1_SCK_A and LPTIM2_OUT.
101 PA9 bidirectional 5 V-tolerant I/O with Fm+ capability and USB function supplied by VDDUSB (FT_fu); alternate functions TIM1_CH2, SPI2_SCK, USART1_TX, SAI1_FS_A and TIM15_BKIN.
102 PA10 bidirectional 5 V-tolerant I/O with Fm+ capability and USB function supplied by VDDUSB (FT_fu); alternate functions TIM1_CH3, SAI1_D1, USART1_RX, CRS_SYNC, SAI1_SD_A and TIM17_BKIN.
103 PA11 bidirectional 5 V-tolerant I/O with USB function supplied by VDDUSB (FT_u); alternate functions TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS/USART1_NSS, FDCAN1_RX and USB_DM.
104 PA12 bidirectional 5 V-tolerant I/O with USB function supplied by VDDUSB (FT_u); alternate functions TIM1_ETR, SPI1_MOSI, USART1_RTS/USART1_DE, FDCAN1_TX and USB_DP.
105 PA13 bidirectional 5 V-tolerant (FT) I/O; after reset it is the JTMS/SWDIO debug function with internal pull-up enabled; alternate functions IR_OUT, USB_NOE, SAI1_SD_B and EVENTOUT.
106 VDDUSB power_in Independent supply for the USB transceivers, 3.0 V to 3.6 V when USB is used.
107 VSS power_in Ground pin for the digital supply domain.
108 VDD power_in Main supply for I/Os, the internal regulator and system analog blocks, 1.71 V to 3.6 V.
109 PA14 bidirectional 5 V-tolerant (FT) I/O; after reset it is the JTCK/SWCLK debug function with internal pull-down enabled; alternate functions LPTIM1_OUT, I2C1_SMBA, I2C4_SMBA and SAI1_FS_B.
110 PA15 bidirectional 5 V-tolerant I/O with USB Type-C PD capability (FT_c); after reset it is the JTDI debug function with internal pull-up enabled; alternate functions TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS and SAI2_FS_B; additional function UCPD1_CC1.
111 PC10 bidirectional 5 V-tolerant (FT) I/O; alternate functions TRACED1, LPTIM3_ETR, SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2, SDMMC1_D2 and SAI2_SCK_B.
112 PC11 bidirectional 5 V-tolerant (FT) I/O; alternate functions LPTIM3_IN1, OCTOSPI1_NCS, SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3, UCPD1_FRSTX2, SDMMC1_D3 and SAI2_MCLK_B.
113 PC12 bidirectional 5 V-tolerant (FT) I/O; alternate functions TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, TSC_G3_IO4, SDMMC1_CK and SAI2_SD_B.
114 PD0 bidirectional 5 V-tolerant (FT) I/O; alternate functions SPI2_NSS, FDCAN1_RX, FMC_D2 and EVENTOUT.
115 PD1 bidirectional 5 V-tolerant (FT) I/O; alternate functions SPI2_SCK, FDCAN1_TX, FMC_D3 and EVENTOUT.
116 PD2 bidirectional 5 V-tolerant (FT) I/O; alternate functions TRACED2, TIM3_ETR, USART3_RTS/USART3_DE, UART5_RX, TSC_SYNC, SDMMC1_CMD and EVENTOUT.
117 PD3 bidirectional 5 V-tolerant (FT) I/O; alternate functions SPI2_SCK, SPI2_MISO, DFSDM1_DATIN0, USART2_CTS/USART2_NSS and FMC_CLK.
118 PD4 bidirectional 5 V-tolerant (FT) I/O; alternate functions SPI2_MOSI, DFSDM1_CKIN0, USART2_RTS/USART2_DE, OCTOSPI1_IO4 and FMC_NOE.
119 PD5 bidirectional 5 V-tolerant (FT) I/O; alternate functions USART2_TX, OCTOSPI1_IO5, FMC_NWE and EVENTOUT.
120 VSS power_in Ground pin for the digital supply domain.
121 VDD power_in Main supply for I/Os, the internal regulator and system analog blocks, 1.71 V to 3.6 V.
122 PD6 bidirectional 5 V-tolerant (FT) I/O; alternate functions SAI1_D1, SPI3_MOSI, DFSDM1_DATIN1, USART2_RX, OCTOSPI1_IO6, FMC_NWAIT and SAI1_SD_A.
123 PD7 bidirectional 5 V-tolerant (FT) I/O; alternate functions DFSDM1_CKIN1, USART2_CK, OCTOSPI1_IO7 and FMC_NCE/FMC_NE1.
124 PG9 bidirectional 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI3_SCK, USART1_TX, FMC_NCE/FMC_NE2, SAI2_SCK_A and TIM15_CH1N.
125 PG10 bidirectional 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions LPTIM1_IN1, SPI3_MISO, USART1_RX, FMC_NE3, SAI2_FS_A and TIM15_CH1.
126 PG12 bidirectional 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions LPTIM1_ETR, SPI3_NSS, USART1_RTS/USART1_DE, FMC_NE4 and SAI2_SD_A.
127 PG13 bidirectional 5 V-tolerant I/O with Fm+ capability, supplied only by VDDIO2 (FT_fs); alternate functions I2C1_SDA, USART1_CK and FMC_A24.
128 PG14 bidirectional 5 V-tolerant I/O with Fm+ capability, supplied only by VDDIO2 (FT_fs); alternate functions I2C1_SCL and FMC_A25.
129 VSS power_in Ground pin for the digital supply domain.
130 VDDIO2 power_in Supply for the 14 I/Os of port PG[15:2], 1.08 V to 3.6 V when at least one of them is used.
131 PG15 bidirectional 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions LPTIM1_OUT, I2C1_SMBA and EVENTOUT.
132 PB3 bidirectional 5 V-tolerant I/O with analog switch (FT_a); after reset it is the JTDO/TRACESWO debug function; alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS/USART1_DE, CRS_SYNC and SAI1_SCK_B; additional function COMP2_INM.
133 PB4 bidirectional 5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa); after reset it is the NJTRST debug function with internal pull-up enabled; alternate functions TIM3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS/USART1_NSS, UART5_RTS/UART5_DE, TSC_G2_IO1, SAI1_MCLK_B and TIM17_BKIN; additional function COMP2_INP.
134 PB5 bidirectional 5 V-tolerant I/O with dead-battery function (FT_d); alternate functions LPTIM1_IN1, TIM3_CH2, OCTOSPI1_NCLK, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, UART5_CTS/UART5_NSS, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B and TIM16_BKIN; additional function UCPD1_DB1.
135 PB6 bidirectional 5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa); alternate functions LPTIM1_ETR, TIM4_CH1, TIM8_BKIN2, I2C1_SCL, I2C4_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B and TIM16_CH1N; additional function COMP2_INP.
136 PB7 bidirectional 5 V-tolerant I/O with Fm+ capability and analog switch (FT_fa); alternate functions LPTIM1_IN2, TIM4_CH2, TIM8_BKIN, I2C1_SDA, I2C4_SDA, USART1_RX, UART4_CTS, TSC_G2_IO4, FMC_NL and TIM17_CH1N; additional functions COMP2_INM and PVD_IN.
137 PH3-BOOT0 bidirectional 5 V-tolerant (FT) I/O on the dedicated BOOT0 pin; additional function EVENTOUT per the pin definition table.
138 PB8 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions TIM4_CH3, SAI1_CK1, I2C1_SCL, DFSDM1_CKOUT, SDMMC1_CKIN, FDCAN1_RX, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1.
139 PB9 bidirectional 5 V-tolerant I/O with Fm+ capability (FT_f); alternate functions IR_OUT, TIM4_CH4, SAI1_D2, I2C1_SDA, SPI2_NSS, SDMMC1_CDIR, FDCAN1_TX, SDMMC1_D5, SAI1_FS_A and TIM17_CH1.
140 PE0 bidirectional 5 V-tolerant (FT) I/O; alternate functions TIM4_ETR, FMC_NBL0 and TIM16_CH1.
141 PE1 bidirectional 5 V-tolerant (FT) I/O; alternate functions FMC_NBL1 and TIM17_CH1.
142 VSS power_in Ground pin for the digital supply domain.
143 V15SMPS_2 power_in Second power supply pin for the system regulator, provided externally through the SMPS VLXSMPS output.
144 VDD power_in Main supply for I/Os, the internal regulator and system analog blocks, 1.71 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-144(20x20)
Category Single Chip Microcomputer/Microcontroller
Pins 144

CAD (KiCad official)

  • Symbol: STM32L552ZCT6Q
  • Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
  • 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
  • 3D model files: stm32l552zct6q-etched.step / stm32l552zct6q-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l552zct6q.step / stm32l552zct6q.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (340 pp, sha256 b15b1557a4a6a6d9, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF