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STM32L4R5VIT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32L4R5VIT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32L4R5VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant I/O (FT) with LCD function supplied by VLCD; alternate functions include TRACECK, TIM3_ETR, SAI1_CK1 and FMC_A23.
2 PE3 bidirectional 5 V-tolerant I/O (FT) with LCD function supplied by VLCD; alternate functions include TRACED0, TIM3_CH1, OCTOSPIM_P1_DQS and FMC_A19.
3 PE4 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED1, TIM3_CH2, DFSDM1_DATIN3, DCMI_D4 and FMC_A20.
4 PE5 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED2, TIM3_CH3, SAI1_CK2, DCMI_D6 and FMC_A21.
5 PE6 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED3, TIM3_CH4, SAI1_D1, DCMI_D7 and FMC_A22, with RTC_TAMP3/WKUP3 as additional functions.
6 VBAT power_in Backup supply from 1.55 V to 3.6 V for the RTC, the 32 kHz oscillator and the backup registers when VDD is not present.
7 PC13 bidirectional 5 V-tolerant GPIO (FT) supplied through the power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF maximum load and the pin must not be used as a current source such as an LED driver.
8 PC14-OSC32_IN bidirectional 5 V-tolerant GPIO (FT) supplied through the power switch with the same 3 mA, 2 MHz and 30 pF limits as PC13, also serving as the 32 kHz LSE oscillator input OSC32_IN.
9 PC15-OSC32_OUT bidirectional 5 V-tolerant GPIO (FT) supplied through the power switch with the same 3 mA, 2 MHz and 30 pF limits as PC13, also serving as the 32 kHz LSE oscillator output OSC32_OUT.
10 VSS power_in Ground pin; all main power and ground pins must always be connected to the external supply within the permitted range.
11 VDD power_in Main power supply from 1.71 V to 3.6 V for the I/Os, the internal regulator and the system analog blocks.
12 PH0-OSC_IN bidirectional 5 V-tolerant I/O (FT) that serves as the crystal oscillator input OSC_IN for the 4 to 48 MHz crystal oscillator.
13 PH1-OSC_OUT bidirectional 5 V-tolerant I/O (FT) that serves as the crystal oscillator output OSC_OUT for the 4 to 48 MHz crystal oscillator.
14 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
15 PC0 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD and analog switch function supplied by VDDA; ADC1_IN1 is an additional function.
16 PC1 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD and analog switch function supplied by VDDA; ADC1_IN2 is an additional function.
17 PC2 bidirectional 5 V-tolerant I/O (FT) with LCD function supplied by VLCD and analog switch function supplied by VDDA; ADC1_IN3 is an additional function.
18 PC3 bidirectional 5 V-tolerant I/O (FT) with analog switch function supplied by VDDA; ADC1_IN4 is an additional function.
19 VSSA power_in Analog ground for the ADC, DAC, comparators, operational amplifiers and voltage reference buffer.
20 VREF- power_in Negative reference voltage for the ADCs and DACs; it must always be equal to VSSA.
21 VREF+ power_in Positive reference input for the ADCs and DACs that must equal VDDA when VDDA is below 2 V and lie between 2 V and VDDA when VDDA is 2 V or above; it is also the internal voltage reference buffer output (VREFBUF_OUT) when enabled.
22 VDDA power_in Analog supply from 1.62 V (ADC/COMP), 1.8 V (DAC/OPAMP) or 2.4 V (VREFBUF) up to 3.6 V, independent of VDD and preferably connected to VDD when analog peripherals are unused.
23 PA0 bidirectional 5 V-tolerant I/O (FT) with analog switch function supplied by VDDA; OPAMP1_VINP and ADC1_IN5 are additional functions.
24 PA1 bidirectional 5 V-tolerant I/O (FT) with LCD function supplied by VLCD and analog switch function supplied by VDDA; OPAMP1_VINM and ADC1_IN6 are additional functions.
25 PA2 bidirectional 5 V-tolerant I/O (FT) with LCD function supplied by VLCD and analog switch function supplied by VDDA; ADC1_IN7 and WKUP4/LSCO are additional functions.
26 PA3 bidirectional 3.6 V-tolerant I/O (TT) with analog switch function supplied by VDDA; OPAMP1_VOUT and ADC1_IN8 are additional functions.
27 VSS power_in Ground pin; all main power and ground pins must always be connected to the external supply within the permitted range.
28 VDD power_in Main power supply from 1.71 V to 3.6 V for the I/Os, the internal regulator and the system analog blocks.
29 PA4 bidirectional 3.6 V-tolerant I/O (TT) with analog switch function supplied by VDDA; ADC1_IN9 and DAC1_OUT1 are additional functions.
30 PA5 bidirectional 3.6 V-tolerant I/O (TT) with analog switch function supplied by VDDA; ADC1_IN10 and DAC1_OUT2 are additional functions.
31 PA6 bidirectional 5 V-tolerant I/O (FT) with analog switch function supplied by VDDA; OPAMP2_VINP and ADC1_IN11 are additional functions.
32 PA7 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD and analog switch function supplied by VDDA; OPAMP2_VINM and ADC1_IN12 are additional functions.
33 PC4 bidirectional 5 V-tolerant I/O (FT) with analog switch function supplied by VDDA; COMP1_INM and ADC1_IN13 are additional functions.
34 PC5 bidirectional 5 V-tolerant I/O (FT) with analog switch function supplied by VDDA; COMP1_INP, ADC1_IN14 and WKUP5 are additional functions.
35 PB0 bidirectional 3.6 V-tolerant I/O (TT) with LCD function supplied by VLCD and analog switch function supplied by VDDA; OPAMP2_VOUT and ADC1_IN15 are additional functions.
36 PB1 bidirectional 5 V-tolerant I/O (FT) with analog switch function supplied by VDDA; COMP1_INM and ADC1_IN16 are additional functions.
37 PB2 bidirectional 5 V-tolerant I/O (FT) with analog switch function supplied by VDDA; COMP1_INP is an additional function.
38 PE7 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_ETR, DFSDM1_DATIN2, LCD_B6, FMC_D4 and SAI1_SD_B.
39 PE8 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH1N, DFSDM1_CKIN2, LCD_B7, FMC_D5 and SAI1_SCK_B.
40 PE9 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH1, DFSDM1_CKOUT, LCD_G2, FMC_D6 and SAI1_FS_B.
41 PE10 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH2N, DFSDM1_DATIN4, TSC_G5_IO1, OCTOSPIM_P1_CLK and FMC_D7.
42 PE11 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH2, DFSDM1_CKIN4, TSC_G5_IO2, OCTOSPIM_P1_NCS and FMC_D8.
43 PE12 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH3N, SPI1_NSS, DFSDM1_DATIN5, TSC_G5_IO3 and FMC_D9.
44 PE13 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH3, SPI1_SCK, DFSDM1_CKIN5, TSC_G5_IO4 and FMC_D10.
45 PE14 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, OCTOSPIM_P1_IO2 and FMC_D11.
46 PE15 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_BKIN, SPI1_MOSI, OCTOSPIM_P1_IO3, LCD_R2 and FMC_D12.
47 PB10 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD; alternate functions include TIM2_CH3, I2C4_SCL, I2C2_SCL, SPI2_SCK and USART3_TX.
48 PB11 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD; alternate functions include TIM2_CH4, I2C4_SDA, I2C2_SDA and USART3_RX, with COMP2_OUT as an additional function.
49 VSS power_in Ground pin; all main power and ground pins must always be connected to the external supply within the permitted range.
50 VDD power_in Main power supply from 1.71 V to 3.6 V for the I/Os, the internal regulator and the system analog blocks.
51 PB12 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1 and USART3_CK.
52 PB13 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD; alternate functions include TIM1_CH1N, I2C2_SCL, SPI2_SCK and USART3_CTS_NSS.
53 PB14 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD; alternate functions include TIM1_CH2N, I2C2_SDA, SPI2_MISO and USART3_RTS_DE.
54 PB15 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4 and SAI2_SD_A, with RTC_REFIN as an additional function.
55 PD8 bidirectional 5 V-tolerant I/O (FT); alternate functions include USART3_TX, DCMI_HSYNC, LCD_R3 and FMC_D13.
56 PD9 bidirectional 5 V-tolerant I/O (FT); alternate functions include USART3_RX, DCMI_PIXCLK, LCD_R4, FMC_D14 and SAI2_MCLK_A.
57 PD10 bidirectional 5 V-tolerant I/O (FT); alternate functions include USART3_CK, TSC_G6_IO1, LCD_R5, FMC_D15 and SAI2_SCK_A.
58 PD11 bidirectional 5 V-tolerant I/O (FT); alternate functions include I2C4_SMBA, USART3_CTS_NSS, TSC_G6_IO2, LCD_R6 and FMC_A16.
59 PD12 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD; alternate functions include TIM4_CH1, I2C4_SCL, USART3_RTS_DE and FMC_A17.
60 PD13 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD; alternate functions include TIM4_CH2, I2C4_SDA, TSC_G6_IO4 and FMC_A18.
61 PD14 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM4_CH3, LCD_B2 and FMC_D0.
62 PD15 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM4_CH4, LCD_B3 and FMC_D1.
63 PC6 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, SDMMC1_D0DIR and DCMI_D0.
64 PC7 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, SDMMC1_D123DIR and DCMI_D1.
65 PC8 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM3_CH3, TIM8_CH3, TSC_G4_IO3, DCMI_D2 and SDMMC1_D0.
66 PC9 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD; alternate functions include TRACED0, TIM8_BKIN2, TIM3_CH4, TIM8_CH4 and DCMI_D3.
67 PA8 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable; alternate functions include MCO, TIM1_CH1, SAI1_CK2, USART1_CK and OTG_FS_SOF.
68 PA9 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD and USB function supplied by VDDUSB; alternate functions include TIM1_CH2, SPI2_SCK, DCMI_D0 and USART1_TX, with OTG_FS_VBUS as an additional function.
69 PA10 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD and USB function supplied by VDDUSB; alternate functions include TIM1_CH3, SAI1_D1, DCMI_D1 and USART1_RX, with OTG_FS_ID as an additional function.
70 PA11 bidirectional 5 V-tolerant I/O (FT) with USB function supplied by VDDUSB; alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS_NSS, CAN1_RX and OTG_FS_DM.
71 PA12 bidirectional 5 V-tolerant I/O (FT) with USB function supplied by VDDUSB; alternate functions include TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX and OTG_FS_DP.
72 PA13 (JTMS/SWDIO) bidirectional 5 V-tolerant I/O (FT) that after reset is the JTMS/SWDIO debug function, with the internal pull-up activated.
73 VDDUSB power_in USB transceiver supply from 3.0 V to 3.6 V when USB is used (0 to 3.6 V when USB is not used).
74 VSS power_in Ground pin; all main power and ground pins must always be connected to the external supply within the permitted range.
75 VDD power_in Main power supply from 1.71 V to 3.6 V for the I/Os, the internal regulator and the system analog blocks.
76 PA14 (JTCK/SWCLK) bidirectional 5 V-tolerant I/O (FT) that after reset is the JTCK/SWCLK debug function, with the internal pull-down activated.
77 PA15 (JTDI) bidirectional 5 V-tolerant I/O (FT) that after reset is the JTDI debug function, with the internal pull-up activated.
78 PC10 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED1, SPI3_SCK, USART3_TX, UART4_TX and DCMI_D8.
79 PC11 bidirectional 5 V-tolerant I/O (FT); alternate functions include DCMI_D2, OCTOSPIM_P1_NCS, SPI3_MISO, USART3_RX and UART4_RX.
80 PC12 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED3, SPI3_MOSI, USART3_CK, UART5_TX and DCMI_D9.
81 PD0 bidirectional 5 V-tolerant I/O (FT); alternate functions include SPI2_NSS, DFSDM1_DATIN7, CAN1_RX, LCD_B4 and FMC_D2.
82 PD1 bidirectional 5 V-tolerant I/O (FT); alternate functions include SPI2_SCK, DFSDM1_CKIN7, CAN1_TX, LCD_B5 and FMC_D3.
83 PD2 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED2, TIM3_ETR, USART3_RTS_DE, UART5_RX, DCMI_D11 and SDMMC1_CMD.
84 PD3 bidirectional 5 V-tolerant I/O (FT); alternate functions include SPI2_SCK, DCMI_D5, SPI2_MISO, USART2_CTS_NSS, OCTOSPIM_P2_NCS and FMC_CLK.
85 PD4 bidirectional 5 V-tolerant I/O (FT); alternate functions include SPI2_MOSI, DFSDM1_CKIN0, USART2_RTS_DE, OCTOSPIM_P1_IO4 and FMC_NOE.
86 PD5 bidirectional 5 V-tolerant I/O (FT); alternate functions include USART2_TX, OCTOSPIM_P1_IO5 and FMC_NWE.
87 PD6 bidirectional 5 V-tolerant I/O (FT); alternate functions include SAI1_D1, DCMI_D10, SPI3_MOSI, DFSDM1_DATIN1, USART2_RX, LCD_DE and FMC_NWAIT.
88 PD7 bidirectional 5 V-tolerant I/O (FT); alternate functions include DFSDM1_CKIN1, USART2_CK, OCTOSPIM_P1_IO7 and FMC_NCE/FMC_NE1.
89 PB3 (JTDO/TRACESWO) bidirectional 5 V-tolerant I/O (FT) with LCD function supplied by VLCD and analog switch function supplied by VDDA; after reset it is the JTDO/TRACESWO debug function, with COMP2_INM as an additional function.
90 PB4 (NJTRST) bidirectional 5 V-tolerant I/O (FT) with analog switch function supplied by VDDA; after reset it is the NJTRST debug function with the internal pull-up activated, with COMP2_INP as an additional function.
91 PB5 bidirectional 5 V-tolerant I/O (FT) with LCD function supplied by VLCD and analog switch function supplied by VDDA; alternate functions include LPTIM1_IN1, TIM3_CH2, I2C1_SMBA, SPI1_MOSI and USART1_CK.
92 PB6 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with analog switch function supplied by VDDA; alternate functions include LPTIM1_ETR, TIM4_CH1, I2C1_SCL and USART1_TX, with COMP2_INP as an additional function.
93 PB7 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD and analog switch function supplied by VDDA; alternate functions include LPTIM1_IN2, TIM4_CH2, I2C1_SDA and USART1_RX, with COMP2_INM and PVD_IN as additional functions.
94 PH3-BOOT0 bidirectional Dedicated BOOT0 boot-selection pin whose input voltage may range from VSS to 9.0 V, also usable as a 5 V-tolerant I/O (FT) with EVENTOUT.
95 PB8 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD; alternate functions include TIM4_CH3, SAI1_CK1, I2C1_SCL, DFSDM1_CKOUT and CAN1_RX.
96 PB9 bidirectional 5 V-tolerant I/O (FT) that is Fm+ capable, with LCD function supplied by VLCD; alternate functions include IR_OUT, TIM4_CH4, SAI1_D2, I2C1_SDA, SPI2_NSS and CAN1_TX.
97 PE0 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM4_ETR, DCMI_D2, LCD_HSYNC, FMC_NBL0 and TIM16_CH1.
98 PE1 bidirectional 5 V-tolerant I/O (FT); alternate functions include DCMI_D3, LCD_VSYNC, FMC_NBL1 and TIM17_CH1.
99 VSS power_in Ground pin; all main power and ground pins must always be connected to the external supply within the permitted range.
100 VDD power_in Main power supply from 1.71 V to 3.6 V for the I/Os, the internal regulator and the system analog blocks.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32L4R5VIT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32l4r5vit6-etched.step / stm32l4r5vit6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l4r5vit6.step / stm32l4r5vit6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (307 pp, sha256 049cc34598b1e11a, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF