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STM32L4P5VET6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32L4P5VET6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32L4P5VET6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant I/O (FT_l); alternate functions include TRACECK, TIM3_ETR, SAI1_CK1, TSC_G7_IO1 and FMC_A23.
2 PE3 bidirectional 5 V-tolerant I/O (FT_l); alternate functions include TRACED0, TIM3_CH1, OCTOSPIM_P1_DQS, TSC_G7_IO2 and FMC_A19.
3 PE4 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED1, TIM3_CH2, SAI1_D2, DFSDM1_DATIN3 and FMC_A20.
4 PE5 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED2, TIM3_CH3, SAI1_CK2, DFSDM1_CKIN3 and FMC_A21.
5 PE6 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED3, TIM3_CH4, SAI1_D1, DCMI_D7/PSSI_D7 and FMC_A22.
6 VBAT power_in Backup supply 1.55 V to 3.6 V for the RTC, the 32 kHz oscillator and backup registers when VDD is not present.
7 PC13 bidirectional 5 V-tolerant I/O (FT) supplied through the power switch, which sinks only 3 mA: in output mode the speed must not exceed 2 MHz with a 30 pF maximum load and the pin must not be used as a current source.
8 PC14-OSC32_IN bidirectional 5 V-tolerant I/O (FT) on the power-switch supply with the same 3 mA, 2 MHz / 30 pF output limits as PC13; also the 32 kHz LSE oscillator input (OSC32_IN).
9 PC15-OSC32_OUT bidirectional 5 V-tolerant I/O (FT) on the power-switch supply with the same 3 mA, 2 MHz / 30 pF output limits as PC13; also the 32 kHz LSE oscillator output (OSC32_OUT).
10 VSS power_in Ground reference for the digital supply and I/O ring.
11 VDD power_in Main supply 1.71 V to 3.6 V for the I/Os, the internal regulator and system analog.
12 PH0-OSC_IN bidirectional 5 V-tolerant I/O (FT) with additional function OSC_IN, the HSE oscillator input.
13 PH1-OSC_OUT bidirectional 5 V-tolerant I/O (FT) with additional function OSC_OUT, the HSE oscillator output.
14 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
15 PC0 bidirectional I/O (FT_fla) with ADC12_IN1; alternate functions include LPTIM1_IN1, I2C3_SCL, LPUART1_RX, SDMMC1_CMD and LPTIM2_IN1.
16 PC1 bidirectional I/O (FT_fla) with ADC12_IN2; alternate functions include TRACED0, LPTIM1_OUT, SPI2_MOSI, I2C3_SDA and LPUART1_TX.
17 PC2 bidirectional I/O (FT_la) with ADC12_IN3; alternate functions include LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT, OCTOSPIM_P1_IO5 and LCD_HSYNC.
18 PC3 bidirectional I/O (FT_a) with ADC12_IN4; alternate functions include LPTIM1_ETR, SAI1_D1, SPI2_MOSI, OCTOSPIM_P1_IO6 and LPTIM2_ETR.
19 VSSA power_in Analog ground for the ADC, DAC, OPAMP, COMP and voltage reference buffer.
20 VREF- power_in Negative reference voltage for the ADC/DAC; it must always be equal to VSSA.
21 VREF+ power_in Positive ADC/DAC reference: between 2 V and VDDA when VDDA is 2 V or higher, equal to VDDA when VDDA is below 2 V, and the output of the internal voltage reference buffer when enabled.
22 VDDA power_in Analog supply: 1.62 V minimum for ADC/COMP, 1.8 V for DAC/OPAMP, 2.4 V for VREFBUF, up to 3.6 V.
23 PA0 bidirectional I/O (FT_a) with OPAMP1_VINP, ADC12_IN5, RTC_TAMP2 and WKUP1; alternate functions include TIM2_CH1, TIM8_ETR, USART2_CTS_NSS and UART4_TX.
24 PA1 bidirectional I/O (FT_la) with OPAMP1_VINM and ADC12_IN6; alternate functions include TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE and UART4_RX.
25 PA2 bidirectional I/O (FT_la) with ADC12_IN7 and WKUP4/LSCO; alternate functions include TIM2_CH3, USART2_TX, LPUART1_TX, OCTOSPIM_P1_NCS and TIM15_CH1.
26 PA3 bidirectional 3.6 V-tolerant I/O (TT_a) with OPAMP1_VOUT and ADC12_IN8; alternate functions include TIM2_CH4, SAI1_CK1, USART2_RX, LPUART1_RX and TIM15_CH2.
27 VSS power_in Ground reference for the digital supply and I/O ring.
28 VDD power_in Main supply 1.71 V to 3.6 V for the I/Os, the internal regulator and system analog.
29 PA4 bidirectional 3.6 V-tolerant I/O (TT_a) with ADC12_IN9 and DAC1_OUT1; injected current is limited to -5/0 mA; alternate functions include SPI1_NSS, SPI3_NSS, USART2_CK, LCD_CLK and LPTIM2_OUT.
30 PA5 bidirectional 3.6 V-tolerant I/O (TT_a) with ADC12_IN10 and DAC1_OUT2; injected current is limited to -5/0 mA; alternate functions include TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK and LPTIM2_ETR.
31 PA6 bidirectional 5 V-tolerant I/O (FT_a) with OPAMP2_VINP and ADC12_IN11; alternate functions include TIM1_BKIN, TIM3_CH1, SPI1_MISO, LPUART1_CTS and TIM16_CH1.
32 PA7 bidirectional 5 V-tolerant I/O (FT_fla) with OPAMP2_VINM and ADC12_IN12; alternate functions include TIM1_CH1N, TIM3_CH2, I2C3_SCL, SPI1_MOSI and TIM17_CH1.
33 PC4 bidirectional 5 V-tolerant I/O (FT_a) with COMP1_INM and ADC12_IN13; alternate functions include OCTOSPIM_P2_NCS, USART3_TX and OCTOSPIM_P1_IO7.
34 PC5 bidirectional 5 V-tolerant I/O (FT_a) with COMP1_INP, ADC12_IN14 and WKUP5; alternate functions include SAI1_D3, PSSI_D15, USART3_RX and LCD_CLK.
35 PB0 bidirectional 3.6 V-tolerant I/O (TT_la) with OPAMP2_VOUT and ADC12_IN15; alternate functions include TIM1_CH2N, TIM3_CH3, SPI1_NSS, USART3_CK and COMP1_OUT.
36 PB1 bidirectional 5 V-tolerant I/O (FT_a) with COMP1_INM and ADC12_IN16; alternate functions include TIM1_CH3N, TIM3_CH4, DFSDM1_DATIN0, USART3_RTS_DE and LPTIM2_IN1.
37 PB2 bidirectional 5 V-tolerant I/O (FT_a) with COMP1_INP; alternate functions include RTC_OUT2, LPTIM1_OUT, I2C3_SMBA and DFSDM1_CKIN0.
38 PE7 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_ETR, DFSDM1_DATIN2, LCD_B6, FMC_D4 and SAI1_SD_B.
39 PE8 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH1N, DFSDM1_CKIN2, LCD_B7, FMC_D5 and SAI1_SCK_B.
40 PE9 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH1, DFSDM1_CKOUT, OCTOSPIM_P1_NCLK, LCD_G2, FMC_D6 and SAI1_FS_B.
41 PE10 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH2N, TSC_G5_IO1, OCTOSPIM_P1_CLK, LCD_G3, FMC_D7 and SAI1_MCLK_B.
42 PE11 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH2, TSC_G5_IO2, OCTOSPIM_P1_NCS, LCD_G4 and FMC_D8.
43 PE12 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH3N, SPI1_NSS, TSC_G5_IO3, OCTOSPIM_P1_IO0, LCD_G5 and FMC_D9.
44 PE13 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH3, SPI1_SCK, TSC_G5_IO4, OCTOSPIM_P1_IO1, LCD_G6 and FMC_D10.
45 PE14 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, OCTOSPIM_P1_IO2, LCD_G7 and FMC_D11.
46 PE15 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_BKIN, SPI1_MOSI, OCTOSPIM_P1_IO3, LCD_R2 and FMC_D12.
47 PB10 bidirectional 5 V-tolerant I/O (FT_fl); alternate functions include TIM2_CH3, I2C4_SCL, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX and COMP1_OUT.
48 PB11 bidirectional 5 V-tolerant I/O (FT_fl); alternate functions include TIM2_CH4, I2C4_SDA, I2C2_SDA, USART3_RX, LPUART1_TX and COMP2_OUT.
49 VSS power_in Ground reference for the digital supply and I/O ring.
50 VDD power_in Main supply 1.71 V to 3.6 V for the I/Os, the internal regulator and system analog.
51 PB12 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, LPUART1_RTS_DE and SDMMC2_CK.
52 PB13 bidirectional 5 V-tolerant I/O (FT_fl); alternate functions include TIM1_CH1N, I2C2_SCL, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS_NSS, LPUART1_CTS and TIM15_CH1N.
53 PB14 bidirectional 5 V-tolerant I/O (FT_fl); alternate functions include TIM1_CH2N, TIM8_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, SDMMC2_D0 and TIM15_CH1.
54 PB15 bidirectional 5 V-tolerant I/O (FT); alternate functions include RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, SDMMC2_D1 and TIM15_CH2.
55 PD8 bidirectional 5 V-tolerant I/O (FT); alternate functions include USART3_TX, DCMI_HSYNC/PSSI_DE, LCD_R3 and FMC_D13.
56 PD9 bidirectional 5 V-tolerant I/O (FT); alternate functions include USART3_RX, DCMI_PIXCLK/PSSI_PDCK, LCD_R4, FMC_D14 and SAI2_MCLK_A.
57 PD10 bidirectional 5 V-tolerant I/O (FT); alternate functions include USART3_CK, TSC_G6_IO1, LCD_R5, FMC_D15 and SAI2_SCK_A.
58 PD11 bidirectional 5 V-tolerant I/O (FT); alternate functions include I2C4_SMBA, USART3_CTS_NSS, TSC_G6_IO2, LCD_R6, FMC_A16 and LPTIM2_ETR.
59 PD12 bidirectional 5 V-tolerant I/O (FT_fl); alternate functions include TIM4_CH1, I2C4_SCL, USART3_RTS_DE, TSC_G6_IO3, LCD_R7, FMC_A17 and LPTIM2_IN1.
60 PD13 bidirectional 5 V-tolerant I/O (FT_fl); alternate functions include TIM4_CH2, I2C4_SDA, TSC_G6_IO4, FMC_A18 and LPTIM2_OUT.
61 PD14 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM4_CH3, LCD_B2 and FMC_D0.
62 PD15 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM4_CH4, LCD_B3 and FMC_D1.
63 PC6 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, SDMMC2_D6, TSC_G4_IO1, DCMI_D0/PSSI_D0 and SAI2_MCLK_A.
64 PC7 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, SDMMC2_D7, TSC_G4_IO2, DCMI_D1/PSSI_D1 and SAI2_MCLK_B.
65 PC8 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM3_CH3, TIM8_CH3, TSC_G4_IO3, DCMI_D2/PSSI_D2 and SDMMC1_D0.
66 PC9 bidirectional 5 V-tolerant I/O (FT_fl); alternate functions include TRACED0, TIM8_BKIN2, TIM3_CH4, TIM8_CH4, DCMI_D3/PSSI_D3, I2C3_SDA, OTG_FS_NOE and SDMMC1_D1.
67 PA8 bidirectional 5 V-tolerant I/O (FT_f, Fm+ capable); alternate functions include MCO, TIM1_CH1, SAI1_CK2, USART1_CK, OTG_FS_SOF and LPTIM2_OUT.
68 PA9 bidirectional 5 V-tolerant I/O (FT_flu) with OTG_FS_VBUS; alternate functions include TIM1_CH2, SPI2_SCK, DCMI_D0/PSSI_D0, USART1_TX and TIM15_BKIN.
69 PA10 bidirectional 5 V-tolerant I/O (FT_flu); alternate functions include TIM1_CH3, SAI1_D1, DCMI_D1/PSSI_D1, USART1_RX, OTG_FS_ID and TIM17_BKIN.
70 PA11 bidirectional 5 V-tolerant I/O (FT_u) with USB function supplied by VDDUSB; alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS_NSS, CAN1_RX and OTG_FS_DM.
71 PA12 bidirectional 5 V-tolerant I/O (FT_u) with USB function supplied by VDDUSB; alternate functions include TIM1_ETR, SPI1_MOSI, OCTOSPIM_P2_NCS, USART1_RTS_DE, CAN1_TX and OTG_FS_DP.
72 PA13 bidirectional 5 V-tolerant I/O (FT) that is the JTMS/SWDIO debug pin after reset, with internal pull-up active after reset; alternate functions include IR_OUT, OTG_FS_NOE and SAI1_SD_B.
73 VDDUSB power_in USB transceiver supply 3.0 V to 3.6 V when USB is used; should preferably be connected to VDD when USB is not used.
74 VSS power_in Ground reference for the digital supply and I/O ring.
75 VDD power_in Main supply 1.71 V to 3.6 V for the I/Os, the internal regulator and system analog.
76 PA14 bidirectional 5 V-tolerant I/O (FT) that is the JTCK/SWCLK debug pin after reset, with internal pull-down active after reset; alternate functions include LPTIM1_OUT, I2C1_SMBA, OTG_FS_SOF and SAI1_FS_B.
77 PA15 bidirectional 5 V-tolerant I/O (FT) that is the JTDI debug pin after reset, with internal pull-up active after reset; alternate functions include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS and SAI2_FS_B.
78 PC10 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED1, DCMI_VSYNC/PSSI_RDY, SPI3_SCK, USART3_TX, UART4_TX and SDMMC1_D2.
79 PC11 bidirectional 5 V-tolerant I/O (FT); alternate functions include DCMI_D2/PSSI_D2, OCTOSPIM_P1_NCS, SPI3_MISO, USART3_RX, UART4_RX and SDMMC1_D3.
80 PC12 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, LCD_R6 and SDMMC1_CK.
81 PD0 bidirectional 5 V-tolerant I/O (FT); alternate functions include SPI2_NSS, CAN1_RX, LCD_B4 and FMC_D2.
82 PD1 bidirectional 5 V-tolerant I/O (FT); alternate functions include SPI2_SCK, CAN1_TX, LCD_B5 and FMC_D3.
83 PD2 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED2, TIM3_ETR, USART3_RTS_DE, UART5_RX, TSC_SYNC, DCMI_D11/PSSI_D11 and SDMMC1_CMD.
84 PD3 bidirectional 5 V-tolerant I/O (FT); alternate functions include SPI2_SCK, DCMI_D5/PSSI_D5, SPI2_MISO, DFSDM1_DATIN0, USART2_CTS_NSS, OCTOSPIM_P2_NCS and FMC_CLK.
85 PD4 bidirectional 5 V-tolerant I/O (FT); alternate functions include SPI2_MOSI, DFSDM1_CKIN0, USART2_RTS_DE, SDMMC2_CKIN, OCTOSPIM_P1_IO4 and FMC_NOE.
86 PD5 bidirectional 5 V-tolerant I/O (FT); alternate functions include USART2_TX, OCTOSPIM_P1_IO5, FMC_NWE and EVENTOUT.
87 PD6 bidirectional 5 V-tolerant I/O (FT); alternate functions include SAI1_D1, DCMI_D10/PSSI_D10, SPI3_MOSI, DFSDM1_DATIN1, USART2_RX, SDMMC2_CK and FMC_NWAIT.
88 PD7 bidirectional 5 V-tolerant I/O (FT); alternate functions include DFSDM1_CKIN1, USART2_CK, SDMMC2_CMD, OCTOSPIM_P1_IO7 and FMC_NCE/FMC_NE1.
89 PB3 bidirectional 5 V-tolerant I/O (FT_la) that is the JTDO/TRACESWO pin after reset; alternate functions include TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE and SAI1_SCK_B, with additional function COMP2_INM.
90 PB4 bidirectional 5 V-tolerant I/O (FT_fa) that is the NJTRST pin after reset, with internal pull-up active after reset; alternate functions include TIM3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO and TIM17_BKIN, with additional function COMP2_INP.
91 PB5 bidirectional 5 V-tolerant I/O (FT_la); alternate functions include LPTIM1_IN1, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI and TIM16_BKIN, with additional function COMP2_OUT.
92 PB6 bidirectional 5 V-tolerant I/O (FT_fa); alternate functions include LPTIM1_ETR, TIM4_CH1, TIM8_BKIN2, I2C1_SCL, I2C4_SCL, USART1_TX and TIM16_CH1N, with additional function COMP2_INP.
93 PB7 bidirectional 5 V-tolerant I/O (FT_fla); alternate functions include LPTIM1_IN2, TIM4_CH2, TIM8_BKIN, I2C1_SDA, I2C4_SDA, USART1_RX and TIM17_CH1N, with additional functions COMP2_INM and PVD_IN.
94 PH3-BOOT0 bidirectional 5 V-tolerant I/O (FT) used as the BOOT0 boot-selection pin; the BOOT0 value may come from this pin or from an option bit depending on a user option bit.
95 PB8 bidirectional 5 V-tolerant I/O (FT_fl); alternate functions include TIM4_CH3, SAI1_CK1, I2C1_SCL, SDMMC2_D4, CAN1_RX, DCMI_D6/PSSI_D6 and TIM16_CH1.
96 PB9 bidirectional 5 V-tolerant I/O (FT_fl); alternate functions include IR_OUT, TIM4_CH4, SAI1_D2, I2C1_SDA, SPI2_NSS, CAN1_TX and TIM17_CH1.
97 PE0 bidirectional 5 V-tolerant I/O (FT); alternate functions include TIM4_ETR, DCMI_D2/PSSI_D2, LCD_HSYNC, FMC_NBL0 and TIM16_CH1.
98 PE1 bidirectional 5 V-tolerant I/O (FT); alternate functions include DCMI_D3/PSSI_D3, LCD_VSYNC, FMC_NBL1 and TIM17_CH1.
99 VSS power_in Ground reference for the digital supply and I/O ring.
100 VDD power_in Main supply 1.71 V to 3.6 V for the I/Os, the internal regulator and system analog.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32L4P5VET6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32l4p5vet6-etched.step / stm32l4p5vet6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l4p5vet6.step / stm32l4p5vet6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (311 pp, sha256 f999422d9e126142, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF