# STM32L4A6RGT7

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L4A6RGT7 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply for the RTC and 32x32-bit backup registers, with a backup operating voltage of 1.55 V to 3.6 V. |
| 2 | PC13 | bidirectional | 5 V-tolerant I/O supplied through the power switch, which sinks only 3 mA, so in output mode it must not exceed 2 MHz with a 30 pF maximum load and must not be used as a current source such as an LED driver; also RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V-tolerant I/O on the power-switch supply with the same 3 mA, 2 MHz / 30 pF output limits as PC13, and serves as OSC32_IN for the 32 kHz LSE crystal oscillator. |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant I/O on the power-switch supply with the same 3 mA, 2 MHz / 30 pF output limits as PC13, and serves as OSC32_OUT for the 32 kHz LSE crystal oscillator. |
| 5 | PH0-OSC_IN | bidirectional | 5 V-tolerant GPIO that also serves as OSC_IN for the external high-speed oscillator (alternate function EVENTOUT). |
| 6 | PH1-OSC_OUT | bidirectional | 5 V-tolerant GPIO that also serves as OSC_OUT for the external high-speed oscillator (alternate function EVENTOUT). |
| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |
| 8 | PC0 | bidirectional | 5 V-tolerant I/O (FT_fla) that can be ADC123_IN1; alternate functions include LPTIM1_IN1, I2C4_SCL, I2C3_SCL, DFSDM1_DATIN4, LPUART1_RX, LCD_SEG18, LPTIM2_IN1 and EVENTOUT, and once used as an ADC input it must not exceed VDDA or VREF+. |
| 9 | PC1 | bidirectional | 5 V-tolerant I/O (FT_fla) that can be ADC123_IN2; alternate functions include TRACED0, LPTIM1_OUT, I2C4_SDA, SPI2_MOSI, I2C3_SDA, DFSDM1_CKIN4, LPUART1_TX, QUADSPI_BK2_IO0, LCD_SEG19 and SAI1_SD_A, and once used as an ADC input it must not exceed VDDA or VREF+. |
| 10 | PC2 | bidirectional | 5 V-tolerant I/O (FT_la) that can be ADC123_IN3; alternate functions include LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT, QUADSPI_BK2_IO1 and LCD_SEG20, and once used as an ADC input it must not exceed VDDA or VREF+. |
| 11 | PC3 | bidirectional | 5 V-tolerant I/O (FT_la) that can be ADC123_IN4; alternate functions include LPTIM1_ETR, SPI2_MOSI, QUADSPI_BK2_IO2, LCD_VLCD, SAI1_SD_A and LPTIM2_ETR, and once used as an ADC input it must not exceed VDDA or VREF+. |
| 12 | VSSA/VREF- | power_in | Analog ground, which is also the negative ADC reference voltage VREF- (referenced to VSSA). |
| 13 | VDDA/VREF+ | power_in | Analog supply, 1.62 V to 3.6 V when the ADC or COMP is used, which is also the positive reference VREF+; VREF+ may exceed VDDA by no more than 0.4 V. |
| 14 | PA0 | bidirectional | 5 V-tolerant I/O (FT_a) that can be OPAMP1_VINP, ADC12_IN5 and RTC_TAMP2/WKUP1; alternate functions include TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, SAI1_EXTCLK, TIM2_ETR and EVENTOUT. |
| 15 | PA1 | bidirectional | 5 V-tolerant I/O (FT_la) that can be OPAMP1_VINM and ADC12_IN6; alternate functions include TIM2_CH2, TIM5_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, UART4_RX, LCD_SEG0, TIM15_CH1N and EVENTOUT. |
| 16 | PA2 | bidirectional | 5 V-tolerant I/O (FT_la) that can be ADC12_IN7 and WKUP4/LSCO; alternate functions include TIM2_CH3, TIM5_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG1, SAI2_EXTCLK, TIM15_CH1 and EVENTOUT. |
| 17 | PA3 | bidirectional | 3.6 V-tolerant I/O (TT_la) that can be OPAMP1_VOUT and ADC12_IN8; alternate functions include TIM2_CH4, TIM5_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, LCD_SEG2, SAI1_MCLK_A, TIM15_CH2 and EVENTOUT. |
| 18 | VSS | power_in | Ground pin; all VSS pins must be connected to the ground plane, with ground-to-ground variation not exceeding 50 mV. |
| 19 | VDD | power_in | Main supply pin, 1.71 V to 3.6 V (standard operating voltage), which must be connected to the external supply. |
| 20 | PA4 | bidirectional | 3.6 V-tolerant I/O (TT_a) that can be ADC12_IN9 and DAC1_OUT1; alternate functions include SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, SAI1_FS_B, LPTIM2_OUT and EVENTOUT. |
| 21 | PA5 | bidirectional | 3.6 V-tolerant I/O (TT_a) that can be ADC12_IN10 and DAC1_OUT2; alternate functions include TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK, LPTIM2_ETR and EVENTOUT. |
| 22 | PA6 | bidirectional | 5 V-tolerant I/O (FT_la) that can be OPAMP2_VINP and ADC12_IN11; alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, DCMI_PIXCLK, SPI1_MISO, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3, LCD_SEG3, TIM16_CH1 and EVENTOUT. |
| 23 | PA7 | bidirectional | 5 V-tolerant I/O (FT_fla) that can be OPAMP2_VINM and ADC12_IN12; alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, LCD_SEG4, TIM17_CH1 and EVENTOUT. |
| 24 | PC4 | bidirectional | 5 V-tolerant I/O (FT_la) that can be COMP1_INM and ADC12_IN13; alternate functions include USART3_TX, QUADSPI_BK2_IO3, LCD_SEG22 and EVENTOUT. |
| 25 | PC5 | bidirectional | 5 V-tolerant I/O (FT_la) that can be COMP1_INP, ADC12_IN14 and WKUP5; alternate functions include USART3_RX, LCD_SEG23 and EVENTOUT. This pin is not present on the external SMPS variant. |
| 26 | PB0 | bidirectional | 3.6 V-tolerant I/O (TT_la) that can be OPAMP2_VOUT and ADC12_IN15; alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, LCD_SEG5, COMP1_OUT, SAI1_EXTCLK and EVENTOUT. |
| 27 | PB1 | bidirectional | 5 V-tolerant I/O (FT_la) that can be COMP1_INM and ADC12_IN16; alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN0, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LCD_SEG6, LPTIM2_IN1 and EVENTOUT. |
| 28 | PB2 | bidirectional | 5 V-tolerant I/O (FT_la) that can be COMP1_INP; alternate functions include RTC_OUT, LPTIM1_OUT, I2C3_SMBA, DFSDM1_CKIN0, LCD_VLCD and EVENTOUT. |
| 29 | PB10 | bidirectional | 5 V-tolerant I/O (FT_fl) with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM2_CH3, I2C4_SCL, I2C2_SCL, SPI2_SCK, DFSDM1_DATIN7, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, LCD_SEG10, COMP1_OUT, SAI1_SCK_A and EVENTOUT. |
| 30 | PB11 | bidirectional | 5 V-tolerant I/O (FT_fl) with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM2_CH4, I2C4_SDA, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG11, COMP2_OUT and EVENTOUT. |
| 31 | VSS | power_in | Ground pin; all VSS pins must be connected to the ground plane, with ground-to-ground variation not exceeding 50 mV. |
| 32 | VDD | power_in | Main supply pin, 1.71 V to 3.6 V (standard operating voltage), which must be connected to the external supply. |
| 33 | PB12 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, CAN2_RX, LCD_SEG12, SWPMI1_IO, SAI2_FS_A, TIM15_BKIN and EVENTOUT. |
| 34 | PB13 | bidirectional | 5 V-tolerant I/O (FT_fl) with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH1N, I2C2_SCL, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, CAN2_TX, LCD_SEG13, SWPMI1_TX, SAI2_SCK_A, TIM15_CH1N and EVENTOUT. |
| 35 | PB14 | bidirectional | 5 V-tolerant I/O (FT_fl) with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH2N, TIM8_CH2N, I2C2_SDA, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS_DE, TSC_G1_IO3, LCD_SEG14, SWPMI1_RX, SAI2_MCLK_A, TIM15_CH1 and EVENTOUT. |
| 36 | PB15 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, DFSDM1_CKIN2, TSC_G1_IO4, LCD_SEG15, SWPMI1_SUSPEND, SAI2_SD_A, TIM15_CH2 and EVENTOUT. |
| 37 | PC6 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, TSC_G4_IO1, DCMI_D0, LCD_SEG24, SDMMC1_D6, SAI2_MCLK_A and EVENTOUT. |
| 38 | PC7 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, TSC_G4_IO2, DCMI_D1, LCD_SEG25, SDMMC1_D7, SAI2_MCLK_B and EVENTOUT. |
| 39 | PC8 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include TIM3_CH3, TIM8_CH3, TSC_G4_IO3, DCMI_D2, LCD_SEG26, SDMMC1_D0 and EVENTOUT. |
| 40 | PC9 | bidirectional | 5 V-tolerant I/O (FT_fl) with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM8_BKIN2, TIM3_CH4, TIM8_CH4, DCMI_D3, I2C3_SDA, TSC_G4_IO4, OTG_FS_NOE, LCD_SEG27, SDMMC1_D1, SAI2_EXTCLK, TIM8_BKIN2_COMP1 and EVENTOUT. |
| 41 | PA8 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include MCO, TIM1_CH1, USART1_CK, OTG_FS_SOF, LCD_COM0, SWPMI1_IO, SAI1_SCK_A, LPTIM2_OUT and EVENTOUT. |
| 42 | PA9 | bidirectional | 5 V-tolerant I/O (FT_lu) with LCD function supplied by VLCD and USB function supplied by VDDUSB; alternate functions include TIM1_CH2, SPI2_SCK, DCMI_D0, USART1_TX, LCD_COM1, SAI1_FS_A, TIM15_BKIN, EVENTOUT and OTG_FS_VBUS. |
| 43 | PA10 | bidirectional | 5 V-tolerant I/O (FT_lu) with LCD function supplied by VLCD and USB function supplied by VDDUSB; alternate functions include TIM1_CH3, DCMI_D1, USART1_RX, OTG_FS_ID, LCD_COM2, SAI1_SD_A, TIM17_BKIN and EVENTOUT. |
| 44 | PA11 | bidirectional | 5 V-tolerant I/O (FT_u) with USB function supplied by VDDUSB; alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS, CAN1_RX, OTG_FS_DM, TIM1_BKIN2_COMP1 and EVENTOUT. |
| 45 | PA12 | bidirectional | 5 V-tolerant I/O (FT_u) with USB function supplied by VDDUSB; alternate functions include TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX, OTG_FS_DP and EVENTOUT. |
| 46 | PA13 | bidirectional | 5 V-tolerant I/O that after reset is the JTMS/SWDIO debug function with an internal pull-up enabled; alternate functions include IR_OUT, OTG_FS_NOE, SWPMI1_TX, SAI1_SD_B and EVENTOUT. |
| 47 | VSS | power_in | Ground pin; all VSS pins must be connected to the ground plane, with ground-to-ground variation not exceeding 50 mV. |
| 48 | VDDUSB | power_in | USB supply, 3.0 V to 3.6 V when USB is used (may be 0 V to 3.6 V if USB is not used). |
| 49 | PA14 | bidirectional | 5 V-tolerant I/O that after reset is the JTCK/SWCLK debug function with an internal pull-down enabled; alternate functions include LPTIM1_OUT, I2C1_SMBA, I2C4_SMBA, OTG_FS_SOF, SWPMI1_RX, SAI1_FS_B and EVENTOUT. |
| 50 | PA15 | bidirectional | 5 V-tolerant I/O (FT_l) that after reset is the JTDI debug function with an internal pull-up enabled; alternate functions include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS_DE, UART4_RTS_DE, TSC_G3_IO1, LCD_SEG17, SWPMI1_SUSPEND, SAI2_FS_B and EVENTOUT. |
| 51 | PC10 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include TRACED1, SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2, DCMI_D8, LCD_COM4/LCD_SEG28/LCD_SEG40, SDMMC1_D2, SAI2_SCK_B and EVENTOUT. |
| 52 | PC11 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include QUADSPI_BK2_NCS, SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3, DCMI_D4, LCD_COM5/LCD_SEG29/LCD_SEG41, SDMMC1_D3, SAI2_MCLK_B and EVENTOUT. |
| 53 | PC12 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, TSC_G3_IO4, DCMI_D9, LCD_COM6/LCD_SEG30/LCD_SEG42, SDMMC1_CK, SAI2_SD_B and EVENTOUT. |
| 54 | PD2 | bidirectional | 5 V-tolerant I/O (FT_l) with LCD function supplied by VLCD; alternate functions include TRACED2, TIM3_ETR, USART3_RTS_DE, UART5_RX, TSC_SYNC, DCMI_D11, LCD_COM7/LCD_SEG31/LCD_SEG43, SDMMC1_CMD and EVENTOUT. |
| 55 | PB3 | bidirectional | 5 V-tolerant I/O (FT_la) that after reset is the JTDO/TRACESWO debug function, with an internal pull-up enabled on the JTAG pins; alternate functions include TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, OTG_FS_CRS_SYNC, LCD_SEG7, SAI1_SCK_B, EVENTOUT and COMP2_INM. |
| 56 | PB4 | bidirectional | 5 V-tolerant I/O (FT_fla) that after reset is the NJTRST debug function with an internal pull-up enabled; alternate functions include TIM3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, UART5_RTS_DE, TSC_G2_IO1, DCMI_D12, LCD_SEG8, SAI1_MCLK_B, TIM17_BKIN and EVENTOUT, and COMP2_INP is an analog input. |
| 57 | PB5 | bidirectional | 5 V-tolerant I/O (FT_la) with COMP2 output function; alternate functions include LPTIM1_IN1, TIM3_CH2, CAN2_RX, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, UART5_CTS, TSC_G2_IO2, DCMI_D10, LCD_SEG9, COMP2_OUT, SAI1_SD_B, TIM16_BKIN and EVENTOUT. |
| 58 | PB6 | bidirectional | 5 V-tolerant I/O (FT_fa) with Fm+ capability; alternate functions include LPTIM1_ETR, TIM4_CH1, TIM8_BKIN2, I2C1_SCL, I2C4_SCL, DFSDM1_DATIN5, USART1_TX, CAN2_TX, TSC_G2_IO3, DCMI_D5, SAI1_FS_B, TIM16_CH1N and EVENTOUT, and COMP2_INP is an analog input. |
| 59 | PB7 | bidirectional | 5 V-tolerant I/O (FT_fla) with Fm+ capability; alternate functions include LPTIM1_IN2, TIM4_CH2, TIM8_BKIN, I2C1_SDA, I2C4_SDA, DFSDM1_CKIN5, USART1_RX, UART4_CTS, TSC_G2_IO4, DCMI_VSYNC, LCD_SEG21, FMC_NL, TIM17_CH1N and EVENTOUT, and it also carries COMP2_INM and PVD_IN. |
| 60 | PH3-BOOT0 | bidirectional | 5 V-tolerant I/O (FT) that is also the BOOT0 boot-mode selection pin, with its input voltage limited to 9 V on the BOOT0 pin. |
| 61 | PB8 | bidirectional | 5 V-tolerant I/O (FT_fl) with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM4_CH3, I2C1_SCL, DFSDM1_DATIN6, CAN1_RX, DCMI_D6, LCD_SEG16, SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1 and EVENTOUT. |
| 62 | PB9 | bidirectional | 5 V-tolerant I/O (FT_fl) with Fm+ capability and LCD function supplied by VLCD; alternate functions include IR_OUT, TIM4_CH4, I2C1_SDA, SPI2_NSS, DFSDM1_CKIN6, CAN1_TX, DCMI_D7, LCD_COM3, SDMMC1_D5, SAI1_FS_A, TIM17_CH1 and EVENTOUT. |
| 63 | VSS | power_in | Ground pin; all VSS pins must be connected to the ground plane, with ground-to-ground variation not exceeding 50 mV. |
| 64 | VDD | power_in | Main supply pin, 1.71 V to 3.6 V (standard operating voltage), which must be connected to the external supply. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `STM32L4A6RGT7`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `stm32l4a6rgt7-etched.step` / `stm32l4a6rgt7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l4a6rgt7.step` / `stm32l4a6rgt7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922752204222464) (277 pp, sha256 `0b60780084121e63`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32l4a6rgt7-datasheet.pdf)