Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

STM32L476ZGT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32L476ZGT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional FT_l I/O; AF: TRACECK, TIM3_ETR, TSC_G7_IO1, LCD_SEG38, FMC_A23, SAI1_MCLK_A, EVENTOUT.
2 PE3 bidirectional FT_l I/O; AF: TRACED0, TIM3_CH1, TSC_G7_IO2, LCD_SEG39, FMC_A19, SAI1_SD_B, EVENTOUT.
3 PE4 bidirectional FT I/O; AF: TRACED1, TIM3_CH2, DFSDM1_DATIN3, TSC_G7_IO3, FMC_A20, SAI1_FS_A, EVENTOUT.
4 PE5 bidirectional FT I/O; AF: TRACED2, TIM3_CH3, DFSDM1_CKIN3, TSC_G7_IO4, FMC_A21, SAI1_SCK_A, EVENTOUT.
5 PE6 bidirectional FT I/O; AF: TRACED3, TIM3_CH4, FMC_A22, SAI1_SD_A, EVENTOUT; additional function RTC_TAMP3/WKUP3.
6 VBAT power_in Backup domain supply for RTC and backup registers, 1.55 V to 3.6 V.
7 PC13 bidirectional FT I/O supplied through the power switch (max 3 mA sink, output speed ≤2 MHz with 30 pF max load, not a current source); additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2.
8 PC14-OSC32_IN (PC14) bidirectional FT I/O supplied through the power switch (limited output, ≤2 MHz, 30 pF); LSE 32 kHz oscillator input OSC32_IN.
9 PC15-OSC32_OUT (PC15) bidirectional FT I/O supplied through the power switch (limited output, ≤2 MHz, 30 pF); LSE 32 kHz oscillator output OSC32_OUT.
10 PF0 bidirectional FT_f I/O (Fm+ capable); AF: I2C2_SDA, FMC_A0, EVENTOUT.
11 PF1 bidirectional FT_f I/O (Fm+ capable); AF: I2C2_SCL, FMC_A1, EVENTOUT.
12 PF2 bidirectional FT I/O; AF: I2C2_SMBA, FMC_A2, EVENTOUT.
13 PF3 bidirectional FT_a I/O; AF: FMC_A3, EVENTOUT; additional function ADC3_IN6.
14 PF4 bidirectional FT_a I/O; AF: FMC_A4, EVENTOUT; additional function ADC3_IN7.
15 PF5 bidirectional FT_a I/O; AF: FMC_A5, EVENTOUT; additional function ADC3_IN8.
16 VSS power_in Digital ground supply pin.
17 VDD power_in Main digital supply pin, 1.71 V to 3.6 V.
18 PF6 bidirectional FT_a I/O; AF: TIM5_ETR, TIM5_CH1, SAI1_SD_B, EVENTOUT; additional function ADC3_IN9.
19 PF7 bidirectional FT_a I/O; AF: TIM5_CH2, SAI1_MCLK_B, EVENTOUT; additional function ADC3_IN10.
20 PF8 bidirectional FT_a I/O; AF: TIM5_CH3, SAI1_SCK_B, EVENTOUT; additional function ADC3_IN11.
21 PF9 bidirectional FT_a I/O; AF: TIM5_CH4, SAI1_FS_B, TIM15_CH1, EVENTOUT; additional function ADC3_IN12.
22 PF10 bidirectional FT_a I/O; AF: TIM15_CH2, EVENTOUT; additional function ADC3_IN13.
23 PH0-OSC_IN (PH0) bidirectional FT I/O; HSE oscillator input OSC_IN (4 to 48 MHz crystal), EVENTOUT.
24 PH1-OSC_OUT (PH1) bidirectional FT I/O; HSE oscillator output OSC_OUT, EVENTOUT.
25 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
26 PC0 bidirectional FT_fla I/O; AF: LPTIM1_IN1, I2C3_SCL, DFSDM1_DATIN4, LPUART1_RX, LCD_SEG18, LPTIM2_IN1, EVENTOUT; additional function ADC123_IN1.
27 PC1 bidirectional FT_fla I/O; AF: LPTIM1_OUT, I2C3_SDA, DFSDM1_CKIN4, LPUART1_TX, LCD_SEG19, EVENTOUT; additional function ADC123_IN2.
28 PC2 bidirectional FT_la I/O; AF: LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT, LCD_SEG20, EVENTOUT; additional function ADC123_IN3.
29 PC3 bidirectional FT_a I/O; AF: LPTIM1_ETR, SPI2_MOSI, LCD_VLCD, SAI1_SD_A, LPTIM2_ETR, EVENTOUT; additional function ADC123_IN4.
30 VSSA power_in Analog ground supply pin.
31 VREF- power_in Negative ADC/DAC reference voltage input.
32 VREF+ power_in Positive reference voltage supply; also VREFBUF_OUT additional function (VREFBUF requires VDDA ≥ 2.4 V).
33 VDDA power_in Analog supply, 1.62 V min with ADC/COMP, 1.8 V min with DAC/OPAMP, 2.4 V min with VREFBUF, up to 3.6 V.
34 PA0 bidirectional FT_a I/O; AF: TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, SAI1_EXTCLK, TIM2_ETR, EVENTOUT; additional: OPAMP1_VINP, ADC12_IN5, RTC_TAMP2/WKUP1.
35 PA1 bidirectional FT_la I/O; AF: TIM2_CH2, TIM5_CH2, USART2_RTS_DE, UART4_RX, LCD_SEG0, TIM15_CH1N, EVENTOUT; additional: OPAMP1_VINM, ADC12_IN6.
36 PA2 bidirectional FT_la I/O; AF: TIM2_CH3, TIM5_CH3, USART2_TX, LCD_SEG1, SAI2_EXTCLK, TIM15_CH1, EVENTOUT; additional: ADC12_IN7, WKUP4/LSCO.
37 PA3 bidirectional TT_la I/O; AF: TIM2_CH4, TIM5_CH4, USART2_RX, LCD_SEG2, TIM15_CH2, EVENTOUT; additional: OPAMP1_VOUT, ADC12_IN8.
38 VSS power_in Digital ground supply pin.
39 VDD power_in Main digital supply pin, 1.71 V to 3.6 V.
40 PA4 bidirectional TT_a I/O; AF: SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B, LPTIM2_OUT, EVENTOUT; additional: ADC12_IN9, DAC1_OUT1.
41 PA5 bidirectional TT_a I/O; AF: TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK, LPTIM2_ETR, EVENTOUT; additional: ADC12_IN10, DAC1_OUT2.
42 PA6 bidirectional FT_la I/O; AF: TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, USART3_CTS, QUADSPI_BK1_IO3, LCD_SEG3, TIM16_CH1, EVENTOUT; additional: OPAMP2_VINP, ADC12_IN11.
43 PA7 bidirectional FT_la I/O; AF: TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, QUADSPI_BK1_IO2, LCD_SEG4, TIM17_CH1, EVENTOUT; additional: OPAMP2_VINM, ADC12_IN12.
44 PC4 bidirectional FT_la I/O; AF: USART3_TX, LCD_SEG22, EVENTOUT; additional: COMP1_INM, ADC12_IN13.
45 PC5 bidirectional FT_la I/O; AF: USART3_RX, LCD_SEG23, EVENTOUT; additional: COMP1_INP, ADC12_IN14, WKUP5.
46 PB0 bidirectional TT_la I/O; AF: TIM1_CH2N, TIM3_CH3, TIM8_CH2N, USART3_CK, QUADSPI_BK1_IO1, LCD_SEG5, COMP1_OUT, EVENTOUT; additional: OPAMP2_VOUT, ADC12_IN15.
47 PB1 bidirectional FT_la I/O; AF: TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN0, USART3_RTS_DE, QUADSPI_BK1_IO0, LCD_SEG6, LPTIM2_IN1, EVENTOUT; additional: COMP1_INM, ADC12_IN16.
48 PB2 bidirectional FT_a I/O; AF: RTC_OUT, LPTIM1_OUT, I2C3_SMBA, DFSDM1_CKIN0, EVENTOUT; additional: COMP1_INP.
49 PF11 bidirectional FT I/O; AF: EVENTOUT.
50 PF12 bidirectional FT I/O; AF: FMC_A6, EVENTOUT.
51 VSS power_in Digital ground supply pin.
52 VDD power_in Main digital supply pin, 1.71 V to 3.6 V.
53 PF13 bidirectional FT I/O; AF: DFSDM1_DATIN6, FMC_A7, EVENTOUT.
54 PF14 bidirectional FT I/O; AF: DFSDM1_CKIN6, TSC_G8_IO1, FMC_A8, EVENTOUT.
55 PF15 bidirectional FT I/O; AF: TSC_G8_IO2, FMC_A9, EVENTOUT.
56 PG0 bidirectional FT I/O; AF: TSC_G8_IO3, FMC_A10, EVENTOUT.
57 PG1 bidirectional FT I/O; AF: TSC_G8_IO4, FMC_A11, EVENTOUT.
58 PE7 bidirectional FT I/O; AF: TIM1_ETR, DFSDM1_DATIN2, FMC_D4, SAI1_SD_B, EVENTOUT.
59 PE8 bidirectional FT I/O; AF: TIM1_CH1N, DFSDM1_CKIN2, FMC_D5, SAI1_SCK_B, EVENTOUT.
60 PE9 bidirectional FT I/O; AF: TIM1_CH1, DFSDM1_CKOUT, FMC_D6, SAI1_FS_B, EVENTOUT.
61 VSS power_in Digital ground supply pin.
62 VDD power_in Main digital supply pin, 1.71 V to 3.6 V.
63 PE10 bidirectional FT I/O; AF: TIM1_CH2N, DFSDM1_DATIN4, TSC_G5_IO1, QUADSPI_CLK, FMC_D7, SAI1_MCLK_B, EVENTOUT.
64 PE11 bidirectional FT I/O; AF: TIM1_CH2, DFSDM1_CKIN4, TSC_G5_IO2, QUADSPI_NCS, FMC_D8, EVENTOUT.
65 PE12 bidirectional FT I/O; AF: TIM1_CH3N, SPI1_NSS, DFSDM1_DATIN5, TSC_G5_IO3, QUADSPI_BK1_IO0, FMC_D9, EVENTOUT.
66 PE13 bidirectional FT I/O; AF: TIM1_CH3, SPI1_SCK, DFSDM1_CKIN5, TSC_G5_IO4, QUADSPI_BK1_IO1, FMC_D10, EVENTOUT.
67 PE14 bidirectional FT I/O; AF: TIM1_CH4, TIM1_BKIN2, TIM1_BKIN2_COMP2, SPI1_MISO, QUADSPI_BK1_IO2, FMC_D11, EVENTOUT.
68 PE15 bidirectional FT I/O; AF: TIM1_BKIN, TIM1_BKIN_COMP1, SPI1_MOSI, QUADSPI_BK1_IO3, FMC_D12, EVENTOUT.
69 PB10 bidirectional FT_fl I/O (Fm+); AF: TIM2_CH3, I2C2_SCL, SPI2_SCK, DFSDM1_DATIN7, USART3_TX, LPUART1_RX, QUADSPI_CLK, LCD_SEG10, COMP1_OUT, SAI1_SCK_A, EVENTOUT.
70 PB11 bidirectional FT_fl I/O (Fm+); AF: TIM2_CH4, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, LPUART1_TX, QUADSPI_NCS, LCD_SEG11, COMP2_OUT, EVENTOUT.
71 VSS power_in Digital ground supply pin.
72 VDD power_in Main digital supply pin, 1.71 V to 3.6 V.
73 PB12 bidirectional FT_l I/O; AF: TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, LCD_SEG12, SWPMI1_IO, SAI2_FS_A, TIM15_BKIN, EVENTOUT.
74 PB13 bidirectional FT_fl I/O (Fm+); AF: TIM1_CH1N, I2C2_SCL, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, LCD_SEG13, SWPMI1_TX, SAI2_SCK_A, TIM15_CH1N, EVENTOUT.
75 PB14 bidirectional FT_fl I/O (Fm+); AF: TIM1_CH2N, TIM8_CH2N, I2C2_SDA, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS_DE, TSC_G1_IO3, LCD_SEG14, SWPMI1_RX, SAI2_MCLK_A, TIM15_CH1, EVENTOUT.
76 PB15 bidirectional FT_l I/O; AF: RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, DFSDM1_CKIN2, TSC_G1_IO4, LCD_SEG15, SWPMI1_SUSPEND, SAI2_SD_A, TIM15_CH2, EVENTOUT.
77 PD8 bidirectional FT_l I/O; AF: USART3_TX, LCD_SEG28, FMC_D13, EVENTOUT.
78 PD9 bidirectional FT_l I/O; AF: USART3_RX, LCD_SEG29, FMC_D14, SAI2_MCLK_A, EVENTOUT.
79 PD10 bidirectional FT_l I/O; AF: USART3_CK, TSC_G6_IO1, LCD_SEG30, FMC_D15, SAI2_SCK_A, EVENTOUT.
80 PD11 bidirectional FT_l I/O; AF: USART3_CTS, TSC_G6_IO2, LCD_SEG31, FMC_A16, SAI2_SD_A, LPTIM2_ETR, EVENTOUT.
81 PD12 bidirectional FT_l I/O; AF: TIM4_CH1, USART3_RTS_DE, TSC_G6_IO3, LCD_SEG32, FMC_A17, SAI2_FS_A, LPTIM2_IN1, EVENTOUT.
82 PD13 bidirectional FT_l I/O; AF: TIM4_CH2, TSC_G6_IO4, LCD_SEG33, FMC_A18, LPTIM2_OUT, EVENTOUT.
83 VSS power_in Digital ground supply pin.
84 VDD power_in Main digital supply pin, 1.71 V to 3.6 V.
85 PD14 bidirectional FT_l I/O; AF: TIM4_CH3, LCD_SEG34, FMC_D0, EVENTOUT.
86 PD15 bidirectional FT_l I/O; AF: TIM4_CH4, LCD_SEG35, FMC_D1, EVENTOUT.
87 PG2 bidirectional FT_s I/O supplied by VDDIO2; AF: SPI1_SCK, FMC_A12, SAI2_SCK_B, EVENTOUT.
88 PG3 bidirectional FT_s I/O supplied by VDDIO2; AF: SPI1_MISO, FMC_A13, SAI2_FS_B, EVENTOUT.
89 PG4 bidirectional FT_s I/O supplied by VDDIO2; AF: SPI1_MOSI, FMC_A14, SAI2_MCLK_B, EVENTOUT.
90 PG5 bidirectional FT_s I/O supplied by VDDIO2; AF: SPI1_NSS, LPUART1_CTS, FMC_A15, SAI2_SD_B, EVENTOUT.
91 PG6 bidirectional FT_s I/O supplied by VDDIO2; AF: I2C3_SMBA, LPUART1_RTS_DE, EVENTOUT.
92 PG7 bidirectional FT_fs I/O (Fm+) supplied by VDDIO2; AF: I2C3_SCL, LPUART1_TX, FMC_INT, EVENTOUT.
93 PG8 bidirectional FT_fs I/O (Fm+) supplied by VDDIO2; AF: I2C3_SDA, LPUART1_RX, EVENTOUT.
94 VSS power_in Digital ground supply pin.
95 VDDIO2 power_in Supply for PG[15:2] I/Os, 1.08 V to 3.6 V when at least one is used, 0 to 3.6 V when unused.
96 PC6 bidirectional FT_l I/O; AF: TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, TSC_G4_IO1, LCD_SEG24, SDMMC1_D6, SAI2_MCLK_A, EVENTOUT.
97 PC7 bidirectional FT_l I/O; AF: TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, TSC_G4_IO2, LCD_SEG25, SDMMC1_D7, SAI2_MCLK_B, EVENTOUT.
98 PC8 bidirectional FT_l I/O; AF: TIM3_CH3, TIM8_CH3, TSC_G4_IO3, LCD_SEG26, SDMMC1_D0, EVENTOUT.
99 PC9 bidirectional FT_l I/O; AF: TIM8_BKIN2, TIM3_CH4, TIM8_CH4, TSC_G4_IO4, OTG_FS_NOE, LCD_SEG27, SDMMC1_D1, SAI2_EXTCLK, TIM8_BKIN2_COMP1, EVENTOUT.
100 PA8 bidirectional FT_l I/O; AF: MCO, TIM1_CH1, USART1_CK, OTG_FS_SOF, LCD_COM0, LPTIM2_OUT, EVENTOUT.
101 PA9 bidirectional FT_lu I/O; AF: TIM1_CH2, USART1_TX, LCD_COM1, TIM15_BKIN, EVENTOUT; additional function OTG_FS_VBUS.
102 PA10 bidirectional FT_lu I/O; AF: TIM1_CH3, USART1_RX, OTG_FS_ID, LCD_COM2, TIM17_BKIN, EVENTOUT.
103 PA11 bidirectional FT_u I/O; AF: TIM1_CH4, TIM1_BKIN2, USART1_CTS, CAN1_RX, OTG_FS_DM, TIM1_BKIN2_COMP1, EVENTOUT.
104 PA12 bidirectional FT_u I/O; AF: TIM1_ETR, USART1_RTS_DE, CAN1_TX, OTG_FS_DP, EVENTOUT.
105 PA13 (JTMS-SWDIO) bidirectional FT I/O; JTMS-SWDIO after reset with internal pull-up active; AF: IR_OUT, OTG_FS_NOE, EVENTOUT.
106 VDDUSB power_in USB supply, 3.0 V to 3.6 V when USB is used, 0 to 3.6 V when unused.
107 VSS power_in Digital ground supply pin.
108 VDD power_in Main digital supply pin, 1.71 V to 3.6 V.
109 PA14 (JTCK-SWCLK) bidirectional FT I/O; JTCK-SWCLK after reset with internal pull-down active; AF: EVENTOUT.
110 PA15 (JTDI) bidirectional FT_l I/O; JTDI after reset with internal pull-up active; AF: TIM2_CH1, TIM2_ETR, SPI1_NSS, SPI3_NSS, UART4_RTS_DE, TSC_G3_IO1, LCD_SEG17, SAI2_FS_B, EVENTOUT.
111 PC10 bidirectional FT_l I/O; AF: SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2, LCD_COM4/LCD_SEG28/LCD_SEG40, SDMMC1_D2, SAI2_SCK_B, EVENTOUT.
112 PC11 bidirectional FT_l I/O; AF: SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3, LCD_COM5/LCD_SEG29/LCD_SEG41, SDMMC1_D3, SAI2_MCLK_B, EVENTOUT.
113 PC12 bidirectional FT_l I/O; AF: SPI3_MOSI, USART3_CK, UART5_TX, TSC_G3_IO4, LCD_COM6/LCD_SEG30/LCD_SEG42, SDMMC1_CK, SAI2_SD_B, EVENTOUT.
114 PD0 bidirectional FT I/O; AF: SPI2_NSS, DFSDM1_DATIN7, CAN1_RX, FMC_D2, EVENTOUT.
115 PD1 bidirectional FT I/O; AF: SPI2_SCK, DFSDM1_CKIN7, CAN1_TX, FMC_D3, EVENTOUT.
116 PD2 bidirectional FT_l I/O; AF: TIM3_ETR, USART3_RTS_DE, UART5_RX, TSC_SYNC, LCD_COM7/LCD_SEG31/LCD_SEG43, SDMMC1_CMD, EVENTOUT.
117 PD3 bidirectional FT I/O; AF: SPI2_MISO, DFSDM1_DATIN0, USART2_CTS, FMC_CLK, EVENTOUT.
118 PD4 bidirectional FT I/O; AF: SPI2_MOSI, DFSDM1_CKIN0, USART2_RTS_DE, FMC_NOE, EVENTOUT.
119 PD5 bidirectional FT I/O; AF: USART2_TX, FMC_NWE, EVENTOUT.
120 VSS power_in Digital ground supply pin.
121 VDD power_in Main digital supply pin, 1.71 V to 3.6 V.
122 PD6 bidirectional FT I/O; AF: DFSDM1_DATIN1, USART2_RX, FMC_NWAIT, SAI1_SD_A, EVENTOUT.
123 PD7 bidirectional FT I/O; AF: DFSDM1_CKIN1, USART2_CK, FMC_NE1, EVENTOUT.
124 PG9 bidirectional FT_s I/O supplied by VDDIO2; AF: SPI3_SCK, USART1_TX, FMC_NCE/FMC_NE2, SAI2_SCK_A, TIM15_CH1N, EVENTOUT.
125 PG10 bidirectional FT_s I/O supplied by VDDIO2; AF: LPTIM1_IN1, SPI3_MISO, USART1_RX, FMC_NE3, SAI2_FS_A, TIM15_CH1, EVENTOUT.
126 PG11 bidirectional FT_s I/O supplied by VDDIO2; AF: LPTIM1_IN2, SPI3_MOSI, USART1_CTS, SAI2_MCLK_A, TIM15_CH2, EVENTOUT.
127 PG12 bidirectional FT_s I/O supplied by VDDIO2; AF: LPTIM1_ETR, SPI3_NSS, USART1_RTS_DE, FMC_NE4, SAI2_SD_A, EVENTOUT.
128 PG13 bidirectional FT_fs I/O (Fm+) supplied by VDDIO2; AF: I2C1_SDA, USART1_CK, FMC_A24, EVENTOUT.
129 PG14 bidirectional FT_fs I/O (Fm+) supplied by VDDIO2; AF: I2C1_SCL, FMC_A25, EVENTOUT.
130 VSS power_in Digital ground supply pin.
131 VDDIO2 power_in Supply for PG[15:2] I/Os, 1.08 V to 3.6 V when at least one is used, 0 to 3.6 V when unused.
132 PG15 bidirectional FT_s I/O supplied by VDDIO2; AF: LPTIM1_OUT, I2C1_SMBA, EVENTOUT.
133 PB3 (JTDO-TRACESWO) bidirectional FT_la I/O; JTDO-TRACESWO after reset; AF: TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, LCD_SEG7, SAI1_SCK_B, EVENTOUT; additional: COMP2_INM.
134 PB4 (NJTRST) bidirectional FT_la I/O; NJTRST after reset with internal pull-up active; AF: TIM3_CH1, SPI1_MISO, SPI3_MISO, USART1_CTS, UART5_RTS_DE, TSC_G2_IO1, LCD_SEG8, SAI1_MCLK_B, TIM17_BKIN, EVENTOUT; additional: COMP2_INP.
135 PB5 bidirectional FT_la I/O; AF: LPTIM1_IN1, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, UART5_CTS, TSC_G2_IO2, LCD_SEG9, COMP2_OUT, SAI1_SD_B, TIM16_BKIN, EVENTOUT.
136 PB6 bidirectional FT_fa I/O (Fm+); AF: LPTIM1_ETR, TIM4_CH1, TIM8_BKIN2, I2C1_SCL, DFSDM1_DATIN5, USART1_TX, TSC_G2_IO3, TIM8_BKIN2_COMP2, SAI1_FS_B, TIM16_CH1N, EVENTOUT; additional: COMP2_INP.
137 PB7 bidirectional FT_fla I/O (Fm+); AF: LPTIM1_IN2, TIM4_CH2, TIM8_BKIN, I2C1_SDA, DFSDM1_CKIN5, USART1_RX, UART4_CTS, TSC_G2_IO4, LCD_SEG21, FMC_NL, TIM17_CH1N, EVENTOUT; additional: COMP2_INM, PVD_IN.
138 BOOT0 input Dedicated boot mode selection input; input voltage 0 to 9 V.
139 PB8 bidirectional FT_fl I/O (Fm+); AF: TIM4_CH3, I2C1_SCL, DFSDM1_DATIN6, CAN1_RX, LCD_SEG16, SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1, EVENTOUT.
140 PB9 bidirectional FT_fl I/O (Fm+); AF: IR_OUT, TIM4_CH4, I2C1_SDA, SPI2_NSS, DFSDM1_CKIN6, CAN1_TX, LCD_COM3, SDMMC1_D5, SAI1_FS_A, TIM17_CH1, EVENTOUT.
141 PE0 bidirectional FT_l I/O; AF: TIM4_ETR, LCD_SEG36, FMC_NBL0, TIM16_CH1, EVENTOUT.
142 PE1 bidirectional FT_l I/O; AF: LCD_SEG37, FMC_NBL1, TIM17_CH1, EVENTOUT.
143 VSS power_in Digital ground supply pin.
144 VDD power_in Main digital supply pin, 1.71 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-144(20x20)
Category Embedded Processors & Controllers
Pins 144

CAD (KiCad official)

  • Symbol: STM32L476ZGT6
  • Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
  • 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
  • 3D model files: stm32l476zgt6-etched.step / stm32l476zgt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l476zgt6.step / stm32l476zgt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (270 pp, sha256 241f8f908b7f839d, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF