Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

STM32L476RET6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L476RET6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup battery supply voltage (1.55-3.6V) powering RTC and 32x32-bit backup registers
2 PC13 bidirectional GPIO port C pin 13, 5V tolerant, supports RTC tamper/timestamp/wakeup alternate functions
3 PC14 bidirectional GPIO port C pin 14 (32 kHz oscillator input), 5V tolerant, analog input in reset state
4 PC15 bidirectional GPIO port C pin 15 (32 kHz oscillator output), 5V tolerant, analog input in reset state
5 PH0 bidirectional GPIO port H pin 0 (main oscillator input), 5V tolerant, analog input in reset state
6 PH1 bidirectional GPIO port H pin 1 (main oscillator output), 5V tolerant, analog input in reset state
7 NRST bidirectional System reset pin (active low) with embedded weak pull-up resistor (25-55 kΩ)
8 PC0 bidirectional GPIO port C pin 0, 5V tolerant, supports LPTIM1/I2C3/DFSDM/LPUART1/LCD, ADC123_IN1 input
9 PC1 bidirectional GPIO port C pin 1, 5V tolerant, supports LPTIM1/I2C3/DFSDM/LPUART1/LCD, ADC123_IN2 input
10 PC2 bidirectional GPIO port C pin 2, 5V tolerant, supports LPTIM1/SPI2/DFSDM/LCD, ADC123_IN3 input
11 PC3 bidirectional GPIO port C pin 3, 5V tolerant, supports LPTIM1/SPI2/LCD_VLCD/SAI1/LPTIM2, ADC123_IN4 input
12 VSSA power_in Analog ground reference for ADC/DAC/OPAMP/COMP, must be connected to VSS
13 VDDA power_in Analog supply voltage (1.62-3.6V minimum 1.8V for DAC/OPAMP, 2.4V for VREFBUF)
14 PA0 bidirectional GPIO port A pin 0, 5V tolerant, supports TIM2/TIM5/TIM8/USART2/UART4/SAI1, OPAMP1_VINP, ADC12_IN5, RTC_TAMP2/WKUP1
15 PA1 bidirectional GPIO port A pin 1, 5V tolerant, supports TIM2/TIM5/USART2/UART4/LCD/TIM15, OPAMP1_VINM, ADC12_IN6
16 PA2 bidirectional GPIO port A pin 2, 5V tolerant, supports TIM2/TIM5/USART2/LCD/SAI2/TIM15, ADC12_IN7, WKUP4/LSCO
17 PA3 bidirectional GPIO port A pin 3, 3.6V tolerant, supports TIM2/TIM5/USART2/LCD/TIM15, OPAMP1_VOUT, ADC12_IN8
18 VSS power_in Digital ground connection for power supply domain
19 VDD power_in Main supply voltage (1.71-3.6V) for MCU core operation
20 PA4 bidirectional GPIO port A pin 4, 3.6V tolerant, supports SPI1/SPI3/USART2/SAI1/LPTIM2, ADC12_IN9, DAC1_OUT1
21 PA5 bidirectional GPIO port A pin 5, 3.6V tolerant, supports TIM2/TIM8/SPI1/LPTIM2, ADC12_IN10, DAC1_OUT2
22 PA6 bidirectional GPIO port A pin 6, 5V tolerant, supports TIM1/TIM3/TIM8/SPI1/USART3/QUADSPI/LCD/TIM16, OPAMP2_VINP, ADC12_IN11, COMP2_BKIN
23 PA7 bidirectional GPIO port A pin 7, 5V tolerant, supports TIM1/TIM3/TIM8/SPI1/QUADSPI/LCD/TIM17, OPAMP2_VINM, ADC12_IN12
24 PC4 bidirectional GPIO port C pin 4, 5V tolerant, supports USART3/LCD, COMP1_INM, ADC12_IN13
25 PC5 bidirectional GPIO port C pin 5, 5V tolerant, supports USART3/LCD, COMP1_INP, ADC12_IN14, WKUP5
26 PB0 bidirectional GPIO port B pin 0, 3.6V tolerant, supports TIM1/TIM3/TIM8/USART3/QUADSPI/LCD/COMP1, OPAMP2_VOUT, ADC12_IN15
27 PB1 bidirectional GPIO port B pin 1, 5V tolerant, supports TIM1/TIM3/TIM8/DFSDM/USART3/QUADSPI/LCD/LPTIM2, COMP1_INM, ADC12_IN16
28 PB2 bidirectional GPIO port B pin 2, 5V tolerant, supports RTC_OUT/LPTIM1/I2C3/DFSDM, COMP1_INP
29 PB10 bidirectional GPIO port B pin 10, 5V tolerant, supports TIM2/I2C2/SPI2/DFSDM/USART3/LPUART1/QUADSPI/LCD/COMP1/SAI1
30 PB11 bidirectional GPIO port B pin 11, 5V tolerant, supports TIM2/I2C2/DFSDM/USART3/LPUART1/QUADSPI/LCD/COMP2
31 VSS power_in Digital ground connection for power supply domain
32 VDD power_in Main supply voltage (1.71-3.6V) for MCU core operation
33 PB12 bidirectional GPIO port B pin 12, 5V tolerant, supports TIM1/TIM15/I2C2/SPI2/DFSDM/USART3/LPUART1/TSC/LCD/SWPMI1/SAI2
34 PB13 bidirectional GPIO port B pin 13, 5V tolerant, supports TIM1/TIM15/I2C2/SPI2/DFSDM/USART3/LPUART1/TSC/LCD/SWPMI1/SAI2
35 PB14 bidirectional GPIO port B pin 14, 5V tolerant, supports TIM1/TIM8/TIM15/I2C2/SPI2/DFSDM/USART3/TSC/LCD/SWPMI1/SAI2
36 PB15 bidirectional GPIO port B pin 15, 5V tolerant, supports RTC_REFIN/TIM1/TIM8/TIM15/SPI2/DFSDM/TSC/LCD/SWPMI1/SAI2
37 PC6 bidirectional GPIO port C pin 6, 5V tolerant, supports TIM3/TIM8/DFSDM/TSC/LCD/SDMMC1/SAI2
38 PC7 bidirectional GPIO port C pin 7, 5V tolerant, supports TIM3/TIM8/DFSDM/TSC/LCD/SDMMC1/SAI2
39 PC8 bidirectional GPIO port C pin 8, 5V tolerant, supports TIM3/TIM8/TSC/LCD/SDMMC1
40 PC9 bidirectional GPIO port C pin 9, 5V tolerant, supports TIM3/TIM8/OTG_FS_NOE/LCD/SDMMC1/SAI2, TIM8_BKIN2_COMP1
41 PA8 bidirectional GPIO port A pin 8, 5V tolerant, supports MCO/TIM1/USART1/OTG_FS_SOF/LCD/LPTIM2
42 PA9 bidirectional GPIO port A pin 9, 5V tolerant with USB supply, supports TIM1/USART1/LCD/TIM15, OTG_FS_VBUS monitoring
43 PA10 bidirectional GPIO port A pin 10, 5V tolerant with USB supply, supports TIM1/USART1/OTG_FS_ID/LCD/TIM17
44 PA11 bidirectional GPIO port A pin 11, USB supply (3.0-3.6V), supports TIM1/USART1/CAN1_RX/OTG_FS_DM, TIM1_BKIN2_COMP1
45 PA12 bidirectional GPIO port A pin 12, USB supply (3.0-3.6V), supports TIM1/USART1/CAN1_TX/OTG_FS_DP
46 PA13 bidirectional JTAG/SWD debug pin (JTMS-SWDIO), 5V tolerant, internal pull-up activated after reset
47 VSS power_in Digital ground connection for power supply domain
48 VDDUSB power_in USB supply voltage (3.0-3.6V) for OTG_FS module operation
49 PA14 bidirectional JTAG/SWD debug clock pin (JTCK-SWCLK), 5V tolerant, internal pull-down activated after reset
50 PA15 bidirectional JTAG debug input pin (JTDI), 5V tolerant, supports TIM2/SPI1/SPI3/UART4/TSC/LCD/SAI2, internal pull-up after reset
51 PC10 bidirectional GPIO port C pin 10, 5V tolerant, supports SPI3/USART3/UART4/TSC/LCD/SDMMC1/SAI2
52 PC11 bidirectional GPIO port C pin 11, 5V tolerant, supports SPI3/USART3/UART4/TSC/LCD/SDMMC1/SAI2
53 PC12 bidirectional GPIO port C pin 12, 5V tolerant, supports SPI3/USART3/UART5/TSC/LCD/SDMMC1/SAI2
54 PD2 bidirectional GPIO port D pin 2, 5V tolerant, supports TIM3/USART3/UART5/TSC/LCD/SDMMC1
55 PB3 bidirectional JTAG debug output pin (JTDO-TRACESWO), 5V tolerant, supports TIM2/SPI1/SPI3/USART1/LCD/SAI1, COMP2_INM, internal pull-up after reset
56 PB4 bidirectional JTAG reset pin (NJTRST), 5V tolerant, supports TIM3/SPI1/SPI3/USART1/UART5/TSC/LCD/SAI1/TIM17, COMP2_INP, internal pull-up after reset
57 PB5 bidirectional GPIO port B pin 5, 5V tolerant, supports LPTIM1/TIM3/I2C1/SPI1/SPI3/USART1/UART5/TSC/LCD/COMP2/SAI1/TIM16
58 PB6 bidirectional GPIO port B pin 6, 5V tolerant, supports LPTIM1/TIM4/TIM8/I2C1/DFSDM/USART1/TSC/SAI1/TIM16, COMP2_INP, TIM8_BKIN2_COMP2
59 PB7 bidirectional GPIO port B pin 7, 5V tolerant, supports LPTIM1/TIM4/TIM8/I2C1/DFSDM/USART1/UART4/TSC/LCD/FMC/SAI1/TIM17, COMP2_INM, PVD_IN
60 BOOT0 input Boot configuration input pin (active high, 0-9V), selects between main Flash (low) or system bootloader (high)
61 PB8 bidirectional GPIO port B pin 8, 5V tolerant, supports TIM4/I2C1/DFSDM/CAN1_RX/LCD/SDMMC1/SAI1/TIM16
62 PB9 bidirectional GPIO port B pin 9, 5V tolerant, supports IR_OUT/TIM4/I2C1/SPI2/DFSDM/CAN1_TX/LCD/SDMMC1/SAI1/TIM17
63 VSS power_in Digital ground connection for power supply domain
64 VDD power_in Main supply voltage (1.71-3.6V) for MCU core operation

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32L476RET6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32l476ret6-etched.step / stm32l476ret6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l476ret6.step / stm32l476ret6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (232 pp, sha256 9cc18092f1a2d4f2, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF