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STM32L476QGI3
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-132. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L476QGI3
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFBGA-132
STM32L476QGI3 from STMicroelectronics, in a UFBGA-132. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | PE3 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TRACED0, TIM3_CH1, LCD_SEG39, FMC_A19 and SAI1_SD_B. |
| A2 | PE1 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions LCD_SEG37, FMC_NBL1 and TIM17_CH1. |
| A3 | PB8 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_fl) with alternate functions I2C1_SCL, CAN1_RX, LCD_SEG16, SDMMC1_D4 and TIM16_CH1. |
| A4 | BOOT0 | input | Dedicated boot-mode selection input whose allowed input voltage range is VSS to 9 V. |
| A5 | PD7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions DFSDM1_CKIN1, USART2_CK and FMC_NE1. |
| A6 | PD5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART2_TX and FMC_NWE. |
| A7 | PB4 (NJTRST) | bidirectional | 3.6 V-tolerant I/O (FT_la, analog switch supplied by VDDA) that after reset is the NJTRST debug pin with internal pull-up active; also COMP2_INP. |
| A8 | PB3 (JTDO-TRACESWO) | bidirectional | 5 V-tolerant I/O (FT_la) that after reset is the JTDO/TRACESWO debug pin; also COMP2_INM. |
| A9 | PA15 (JTDI) | bidirectional | 5 V-tolerant I/O (FT_l) that after reset is the JTDI debug pin with internal pull-up active; also TIM2_CH1, SPI1_NSS and SAI2_FS_B. |
| A10 | PA14 (JTCK-SWCLK) | bidirectional | 5 V-tolerant I/O (FT) that after reset is the JTCK/SWCLK debug pin with internal pull-down active. |
| A11 | PA13 (JTMS-SWDIO) | bidirectional | 5 V-tolerant I/O (FT) that after reset is the JTMS/SWDIO debug pin with internal pull-up active; also IR_OUT and OTG_FS_NOE. |
| A12 | PA12 | bidirectional | 5 V-tolerant I/O (FT_u, USB function supplied by VDDUSB) with alternate functions TIM1_ETR, USART1_RTS_DE, CAN1_TX and OTG_FS_DP. |
| B1 | PE4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED1, TIM3_CH2, DFSDM1_DATIN3, FMC_A20 and SAI1_FS_A. |
| B2 | PE2 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TRACECK, TIM3_ETR, LCD_SEG38, FMC_A23 and SAI1_MCLK_A. |
| B3 | PB9 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_fl) with alternate functions IR_OUT, I2C1_SDA, CAN1_TX, LCD_COM3, SDMMC1_D5 and TIM17_CH1. |
| B4 | PB7 | bidirectional | 5 V-tolerant I/O (FT_fla) with alternate functions LPTIM1_IN2, I2C1_SDA, USART1_RX, LCD_SEG21 and FMC_NL; also COMP2_INM and PVD_IN. |
| B5 | PB6 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_fa, analog switch supplied by VDDA) with alternate functions LPTIM1_ETR, I2C1_SCL, USART1_TX and TIM16_CH1N; also COMP2_INP. |
| B6 | PD6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions DFSDM1_DATIN1, USART2_RX, FMC_NWAIT and SAI1_SD_A. |
| B7 | PD4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI2_MOSI, DFSDM1_CKIN0, USART2_RTS_DE and FMC_NOE. |
| B8 | PD3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI2_MISO, DFSDM1_DATIN0, USART2_CTS and FMC_CLK. |
| B9 | PD1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI2_SCK, DFSDM1_CKIN7, CAN1_TX and FMC_D3. |
| B10 | PC12 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions SPI3_MOSI, USART3_CK, UART5_TX, SDMMC1_CK and SAI2_SD_B. |
| B11 | PC10 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions SPI3_SCK, USART3_TX, UART4_TX, SDMMC1_D2 and SAI2_SCK_B. |
| B12 | PA11 | bidirectional | 5 V-tolerant I/O (FT_u, USB function supplied by VDDUSB) with alternate functions TIM1_CH4, USART1_CTS, CAN1_RX and OTG_FS_DM. |
| C1 | PC13 | bidirectional | Fast I/O (FT) on the backup domain supplied through the power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not source LEDs; also RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2. |
| C2 | PE5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED2, TIM3_CH3, DFSDM1_CKIN3, FMC_A21 and SAI1_SCK_A. |
| C3 | PE0 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM4_ETR, LCD_SEG36, FMC_NBL0 and TIM16_CH1. |
| C4 | VDD | power_in | Main supply pin; standard operating voltage 1.71 V to 3.6 V. |
| C5 | PB5 | bidirectional | 5 V-tolerant I/O (FT_la) with alternate functions LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, USART1_CK, LCD_SEG9 and SAI1_SD_B; also COMP2_OUT. |
| C6 | PG14 | bidirectional | 5 V-tolerant I/O (FT_fs) supplied only by VDDIO2, with alternate functions I2C1_SCL and FMC_A25. |
| C7 | PG13 | bidirectional | 5 V-tolerant I/O (FT_fs) supplied only by VDDIO2, with alternate functions I2C1_SDA, USART1_CK and FMC_A24. |
| C8 | PD2 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM3_ETR, USART3_RTS_DE, UART5_RX, TSC_SYNC and SDMMC1_CMD. |
| C9 | PD0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI2_NSS, DFSDM1_DATIN7, CAN1_RX and FMC_D2. |
| C10 | PC11 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions SPI3_MISO, USART3_RX, UART4_RX, SDMMC1_D3 and SAI2_MCLK_B. |
| C11 | VDDUSB | power_in | USB supply pin; must be 3.0 V to 3.6 V when USB is used, and may be 0 V to 3.6 V when USB is not used. |
| C12 | PA10 | bidirectional | 5 V-tolerant I/O (FT_lu, USB function supplied by VDDUSB) with alternate functions TIM1_CH3, USART1_RX, OTG_FS_ID and TIM17_BKIN. |
| D1 | PC14-OSC32_IN (PC14) | bidirectional | Fast I/O (FT) on the backup domain with the 32.768 kHz LSE oscillator input OSC32_IN; same 3 mA power-switch limit as PC13. |
| D2 | PE6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED3, TIM3_CH4, FMC_A22 and SAI1_SD_A; also RTC_TAMP3/WKUP3. |
| D3 | VSS | power_in | Ground pin, to be connected to the external ground. |
| D4 | PF2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions I2C2_SMBA and FMC_A2. |
| D5 | PF1 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f) with alternate functions I2C2_SCL and FMC_A1. |
| D6 | PF0 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f) with alternate functions I2C2_SDA and FMC_A0. |
| D7 | PG12 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions LPTIM1_ETR, SPI3_NSS, USART1_RTS_DE, FMC_NE4 and SAI2_SD_A. |
| D8 | PG10 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions LPTIM1_IN1, SPI3_MISO, USART1_RX, FMC_NE3 and TIM15_CH1. |
| D9 | PG9 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions SPI3_SCK, USART1_TX, FMC_NCE/FMC_NE2 and SAI2_SCK_A. |
| D10 | PA9 | bidirectional | 5 V-tolerant I/O (FT_lu, USB function supplied by VDDUSB) with alternate functions TIM1_CH2, USART1_TX, LCD_COM1 and TIM15_BKIN; also OTG_FS_VBUS. |
| D11 | PA8 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions MCO, TIM1_CH1, USART1_CK, OTG_FS_SOF and LCD_COM0. |
| D12 | PC9 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM8_BKIN2, TIM3_CH4, TIM8_CH4, OTG_FS_NOE, SDMMC1_D1 and SAI2_EXTCLK. |
| E1 | PC15-OSC32_OUT (PC15) | bidirectional | Fast I/O (FT) on the backup domain with the 32.768 kHz LSE oscillator output OSC32_OUT; same 3 mA power-switch limit as PC13. |
| E2 | VBAT | power_in | Backup-domain supply for RTC and backup registers; operating voltage 1.55 V to 3.6 V. |
| E3 | VSS | power_in | Ground pin, to be connected to the external ground. |
| E4 | PF3 | bidirectional | 5 V-tolerant analog-capable I/O (FT_a, analog switch supplied by VDDA) with alternate function FMC_A3 and ADC3_IN6. |
| E9 | PG5 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions SPI1_NSS, LPUART1_CTS, FMC_A15 and SAI2_SD_B. |
| E10 | PC8 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM3_CH3, TIM8_CH3, TSC_G4_IO3, LCD_SEG26 and SDMMC1_D0. |
| E11 | PC7 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, LCD_SEG25, SDMMC1_D7 and SAI2_MCLK_B. |
| E12 | PC6 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, LCD_SEG24, SDMMC1_D6 and SAI2_MCLK_A. |
| F1 | PH0-OSC_IN (PH0) | bidirectional | 5 V-tolerant I/O (FT) that is also the high-speed external oscillator input OSC_IN. |
| F2 | VSS | power_in | Ground pin, to be connected to the external ground. |
| F3 | PF4 | bidirectional | 5 V-tolerant analog-capable I/O (FT_a) with alternate function FMC_A4 and ADC3_IN7. |
| F4 | PF5 | bidirectional | 5 V-tolerant analog-capable I/O (FT_a) with alternate function FMC_A5 and ADC3_IN8. |
| F6 | VSS | power_in | Ground pin, to be connected to the external ground. |
| F7 | VSS | power_in | Ground pin, to be connected to the external ground. |
| F9 | PG3 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions SPI1_MISO, FMC_A13, SAI2_FS_B and EVENTOUT. |
| F10 | PG4 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions SPI1_MOSI, FMC_A14 and SAI2_MCLK_B. |
| F11 | VSS | power_in | Ground pin, to be connected to the external ground. |
| F12 | VSS | power_in | Ground pin, to be connected to the external ground. |
| G1 | PH1-OSC_OUT (PH1) | bidirectional | 5 V-tolerant I/O (FT) that is also the high-speed external oscillator output OSC_OUT. |
| G2 | VDD | power_in | Main supply pin; standard operating voltage 1.71 V to 3.6 V. |
| G3 | PG11 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions LPTIM1_IN2, SPI3_MOSI, USART1_CTS, SAI2_MCLK_A and TIM15_CH2. |
| G4 | PG6 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions I2C3_SMBA and LPUART1_RTS_DE. |
| G6 | VDD | power_in | Main supply pin; standard operating voltage 1.71 V to 3.6 V. |
| G7 | VDDIO2 | power_in | Supply for the PG[15:2] I/Os; 1.08 V to 3.6 V when at least one I/O in PG[15:2] is used, and 0 V to 3.6 V when not used. |
| G9 | PG1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TSC_G8_IO4, FMC_A11 and EVENTOUT. |
| G10 | PG2 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions SPI1_SCK, FMC_A12 and SAI2_SCK_B. |
| G11 | VDD | power_in | Main supply pin; standard operating voltage 1.71 V to 3.6 V. |
| G12 | VDD | power_in | Main supply pin; standard operating voltage 1.71 V to 3.6 V. |
| H1 | PC0 | bidirectional | 5 V-tolerant analog-capable I/O (FT_fla) with alternate functions LPTIM1_IN1, I2C3_SCL, DFSDM1_DATIN4, LPUART1_RX and LCD_SEG18; also ADC123_IN1. |
| H2 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| H3 | VDD | power_in | Main supply pin; standard operating voltage 1.71 V to 3.6 V. |
| H4 | PG7 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_fs) supplied only by VDDIO2, with alternate functions I2C3_SCL, LPUART1_TX and FMC_INT. |
| H9 | PG0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TSC_G8_IO3, FMC_A10 and EVENTOUT. |
| H10 | PD15 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM4_CH4, LCD_SEG35 and FMC_D1. |
| H11 | PD14 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM4_CH3, LCD_SEG34 and FMC_D0. |
| H12 | PD13 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM4_CH2, TSC_G6_IO4, LCD_SEG33, FMC_A18 and LPTIM2_OUT. |
| J1 | VSSA/VREF- | power_in | Combined analog ground and negative reference voltage pin on this package; it must be at the same potential as VSS. |
| J2 | PC1 | bidirectional | 5 V-tolerant analog-capable I/O (FT_fla) with alternate functions LPTIM1_OUT, I2C3_SDA, DFSDM1_CKIN4, LPUART1_TX and LCD_SEG19; also ADC123_IN2. |
| J3 | PC2 | bidirectional | 5 V-tolerant analog-capable I/O (FT_la) with alternate functions LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT and LCD_SEG20; also ADC123_IN3. |
| J4 | PA4 | bidirectional | 3.6 V-tolerant I/O (TT_a, analog switch supplied by VDDA) with alternate functions SPI1_NSS, SPI3_NSS, USART2_CK and LPTIM2_OUT; also ADC12_IN9 and DAC1_OUT1. |
| J5 | PA7 | bidirectional | 5 V-tolerant analog-capable I/O (FT_la) with alternate functions TIM1_CH1N, TIM3_CH2, SPI1_MOSI, QUADSPI_BK1_IO2 and TIM17_CH1; also OPAMP2_VINM and ADC12_IN12. |
| J6 | PG8 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_fs) supplied only by VDDIO2, with alternate functions I2C3_SDA and LPUART1_RX. |
| J7 | PF12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A6 and EVENTOUT. |
| J8 | PF14 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions DFSDM1_CKIN6, TSC_G8_IO1 and FMC_A8. |
| J9 | PF15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TSC_G8_IO2 and FMC_A9. |
| J10 | PD12 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM4_CH1, USART3_RTS_DE, TSC_G6_IO3, LCD_SEG32 and FMC_A17. |
| J11 | PD11 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions USART3_CTS, TSC_G6_IO2, LCD_SEG31, FMC_A16 and LPTIM2_ETR. |
| J12 | PD10 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions USART3_CK, TSC_G6_IO1, LCD_SEG30, FMC_D15 and SAI2_SCK_A. |
| K1 | PG15 | bidirectional | 5 V-tolerant I/O (FT_s) supplied only by VDDIO2, with alternate functions LPTIM1_OUT and I2C1_SMBA. |
| K2 | PC3 | bidirectional | 5 V-tolerant analog-capable I/O (FT_a) with alternate functions LPTIM1_ETR, SPI2_MOSI, LCD_VLCD, SAI1_SD_A and LPTIM2_ETR; also ADC123_IN4. |
| K3 | PA2 | bidirectional | 5 V-tolerant analog-capable I/O (FT_la) with alternate functions TIM2_CH3, TIM5_CH3, USART2_TX, LCD_SEG1 and TIM15_CH1; also ADC12_IN7 and WKUP4/LSCO. |
| K4 | PA5 | bidirectional | 3.6 V-tolerant I/O (TT_a, analog switch supplied by VDDA) with alternate functions TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK and LPTIM2_ETR; also ADC12_IN10 and DAC1_OUT2. |
| K5 | PC4 | bidirectional | 5 V-tolerant analog-capable I/O (FT_la) with alternate functions USART3_TX and LCD_SEG22; also COMP1_INM and ADC12_IN13. |
| K6 | PF11 | bidirectional | 5 V-tolerant I/O (FT) with alternate function EVENTOUT only. |
| K7 | PF13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions DFSDM1_DATIN6 and FMC_A7. |
| K8 | PD9 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions USART3_RX, LCD_SEG29, FMC_D14 and SAI2_MCLK_A. |
| K9 | PD8 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions USART3_TX, LCD_SEG28 and FMC_D13. |
| K10 | PB15 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, DFSDM1_CKIN2, LCD_SEG15 and SAI2_SD_A. |
| K11 | PB14 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_fl, LCD function supplied by VLCD) with alternate functions TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE and LCD_SEG14. |
| K12 | PB13 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_fl, LCD function supplied by VLCD) with alternate functions TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS and LPUART1_CTS. |
| L1 | VREF+ | power_in | Positive reference voltage for the ADC, DAC and VREFBUF; it can be connected internally to VDDA depending on the package. |
| L2 | PA0 | bidirectional | 5 V-tolerant analog-capable I/O (FT_a) with alternate functions TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS and UART4_TX; also OPAMP1_VINP, ADC12_IN5 and RTC_TAMP2/WKUP1. |
| L3 | PA3 | bidirectional | 3.6 V-tolerant I/O (TT_la, analog switch supplied by VDDA) with alternate functions TIM2_CH4, TIM5_CH4, USART2_RX, LCD_SEG2 and TIM15_CH2; also OPAMP1_VOUT and ADC12_IN8. |
| L4 | PA6 | bidirectional | 5 V-tolerant analog-capable I/O (FT_la) with alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, USART3_CTS, QUADSPI_BK1_IO3 and TIM16_CH1; also OPAMP2_VINP and ADC12_IN11. |
| L5 | PC5 | bidirectional | 5 V-tolerant analog-capable I/O (FT_la) with alternate functions USART3_RX and LCD_SEG23; also COMP1_INP, ADC12_IN14 and WKUP5. |
| L6 | PB2 | bidirectional | 5 V-tolerant analog-capable I/O (FT_a) with alternate functions RTC_OUT, LPTIM1_OUT, I2C3_SMBA and DFSDM1_CKIN0; also COMP1_INP. |
| L7 | PE8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH1N, DFSDM1_CKIN2, FMC_D5 and SAI1_SCK_B. |
| L8 | PE10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2N, DFSDM1_DATIN4, TSC_G5_IO1, QUADSPI_CLK, FMC_D7 and SAI1_MCLK_B. |
| L9 | PE12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH3N, SPI1_NSS, DFSDM1_DATIN5, TSC_G5_IO3, QUADSPI_BK1_IO0 and FMC_D9. |
| L10 | PB10 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_fl, LCD function supplied by VLCD) with alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX and QUADSPI_CLK. |
| L11 | PB11 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_fl, LCD function supplied by VLCD) with alternate functions TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX and QUADSPI_NCS. |
| L12 | PB12 | bidirectional | 5 V-tolerant I/O (FT_l, LCD function supplied by VLCD) with alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE and SAI2_FS_A. |
| M1 | VDDA | power_in | Analog supply: ADC or COMP used requires 1.62 V to 3.6 V, DAC or OPAMP used requires 1.8 V to 3.6 V, VREFBUF used requires 2.4 V to 3.6 V. |
| M2 | PA1 | bidirectional | 5 V-tolerant analog-capable I/O (FT_la) with alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS_DE, UART4_RX, LCD_SEG0 and TIM15_CH1N; also OPAMP1_VINM and ADC12_IN6. |
| M3 | OPAMP1_VINM | input | Dedicated inverting input of OPAMP1; a 3.6 V-tolerant (TT) pin on UFBGA packages, used instead of PA1 or PA7. |
| M4 | OPAMP2_VINM | input | Dedicated inverting input of OPAMP2; a 3.6 V-tolerant (TT) pin on UFBGA packages, used instead of PA7. |
| M5 | PB0 | bidirectional | 3.6 V-tolerant I/O (TT_la, analog switch supplied by VDDA) with alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, USART3_CK, QUADSPI_BK1_IO1 and COMP1_OUT; also OPAMP2_VOUT and ADC12_IN15. |
| M6 | PB1 | bidirectional | 5 V-tolerant analog-capable I/O (FT_la) with alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN0, USART3_RTS_DE, QUADSPI_BK1_IO0 and LPTIM2_IN1; also COMP1_INM and ADC12_IN16. |
| M7 | PE7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_ETR, DFSDM1_DATIN2, FMC_D4 and SAI1_SD_B. |
| M8 | PE9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH1, DFSDM1_CKOUT, FMC_D6 and SAI1_FS_B. |
| M9 | PE11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2, DFSDM1_CKIN4, TSC_G5_IO2, QUADSPI_NCS and FMC_D8. |
| M10 | PE13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH3, SPI1_SCK, DFSDM1_CKIN5, TSC_G5_IO4, QUADSPI_BK1_IO1 and FMC_D10. |
| M11 | PE14 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH4, TIM1_BKIN2, SPI1_MISO, QUADSPI_BK1_IO2 and FMC_D11. |
| M12 | PE15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_BKIN, TIM1_BKIN_COMP1, SPI1_MOSI, QUADSPI_BK1_IO3 and FMC_D12. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFBGA-132 |
| Category | Embedded Processors & Controllers |
| Pins | 132 |
CAD (KiCad official)
- Symbol:
STM32L476QGI3 - Footprint:
Package_BGA:UFBGA-132_7x7mm_P0.5mm - 3D model: UFBGA-132 (KiCad packages3D, STEP)
- 3D model files:
stm32l476qgi3-etched.step/stm32l476qgi3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l476qgi3.step/stm32l476qgi3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (270 pp, sha256
241f8f908b7f839d, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).