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STM32L471VGT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32L471VGT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32L471VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V tolerant I/O with alternate functions TRACECK, TIM3_ETR, TSC_G7_IO1, FMC_A23, SAI1_MCLK_A, EVENTOUT.
2 PE3 bidirectional 5 V tolerant I/O with alternate functions TRACED0, TIM3_CH1, TSC_G7_IO2, FMC_A19, SAI1_SD_B, EVENTOUT.
3 PE4 bidirectional 5 V tolerant I/O with alternate functions TRACED1, TIM3_CH2, DFSDM1_DATIN3, TSC_G7_IO3, FMC_A20, SAI1_FS_A, EVENTOUT.
4 PE5 bidirectional 5 V tolerant I/O with alternate functions TRACED2, TIM3_CH3, DFSDM1_CKIN3, TSC_G7_IO4, FMC_A21, SAI1_SCK_A, EVENTOUT.
5 PE6 bidirectional 5 V tolerant I/O with alternate functions TRACED3, TIM3_CH4, FMC_A22, SAI1_SD_A, EVENTOUT; additional function RTC_TAMP3/WKUP3.
6 VBAT power_in Backup domain supply for RTC and backup registers, operating range 1.55 V to 3.6 V.
7 PC13 bidirectional 5 V tolerant I/O supplied through the power switch (3 mA max sink, max 2 MHz with 30 pF load, not a current source); additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2.
8 PC14-OSC32_IN bidirectional 5 V tolerant I/O supplied through the power switch (limited to 2 MHz, 30 pF, 3 mA), also the LSE oscillator input OSC32_IN.
9 PC15-OSC32_OUT bidirectional 5 V tolerant I/O supplied through the power switch (limited to 2 MHz, 30 pF, 3 mA), also the LSE oscillator output OSC32_OUT.
10 VSS power_in Digital ground supply pin.
11 VDD power_in Digital supply pin, standard operating range 1.71 V to 3.6 V.
12 PH0-OSC_IN bidirectional 5 V tolerant I/O, also the HSE oscillator input OSC_IN (4 to 48 MHz crystal); alternate function EVENTOUT.
13 PH1-OSC_OUT bidirectional 5 V tolerant I/O, also the HSE oscillator output OSC_OUT; alternate function EVENTOUT.
14 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
15 PC0 bidirectional 5 V tolerant Fm+ capable I/O with analog switch, alternate functions LPTIM1_IN1, I2C3_SCL, DFSDM1_DATIN4, LPUART1_RX, LPTIM2_IN1; analog ADC123_IN1.
16 PC1 bidirectional 5 V tolerant Fm+ capable I/O with analog switch, alternate functions LPTIM1_OUT, I2C3_SDA, DFSDM1_CKIN4, LPUART1_TX; analog ADC123_IN2.
17 PC2 bidirectional 5 V tolerant I/O with analog switch, alternate functions LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT; analog ADC123_IN3.
18 PC3 bidirectional 5 V tolerant I/O with analog switch, alternate functions LPTIM1_ETR, SPI2_MOSI, SAI1_SD_A, LPTIM2_ETR; analog ADC123_IN4.
19 VSSA power_in Analog ground supply pin.
20 VREF- power_in Negative reference voltage supply pin for the analog peripherals.
21 VREF+ power_in Positive reference voltage supply pin, also the VREFBUF_OUT additional function.
22 VDDA power_in Analog supply, 1.62 V min with ADC or COMP, 1.8 V min with DAC or OPAMP, 2.4 V min with VREFBUF, up to 3.6 V.
23 PA0 bidirectional 5 V tolerant I/O with analog switch, alternate functions TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, SAI1_EXTCLK; analog OPAMP1_VINP, ADC12_IN5, RTC_TAMP2/WKUP1.
24 PA1 bidirectional 5 V tolerant I/O with analog switch, alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS_DE, UART4_RX, TIM15_CH1N; analog OPAMP1_VINM, ADC12_IN6.
25 PA2 bidirectional 5 V tolerant I/O with analog switch, alternate functions TIM2_CH3, TIM5_CH3, USART2_TX, SAI2_EXTCLK, TIM15_CH1; analog ADC12_IN7, WKUP4/LSCO.
26 PA3 bidirectional 3.6 V tolerant I/O with analog switch, alternate functions TIM2_CH4, TIM5_CH4, USART2_RX, TIM15_CH2; analog OPAMP1_VOUT, ADC12_IN8.
27 VSS power_in Digital ground supply pin.
28 VDD power_in Digital supply pin, standard operating range 1.71 V to 3.6 V.
29 PA4 bidirectional 3.6 V tolerant I/O with analog switch, alternate functions SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B, LPTIM2_OUT; analog ADC12_IN9, DAC1_OUT1.
30 PA5 bidirectional 3.6 V tolerant I/O with analog switch, alternate functions TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK, LPTIM2_ETR; analog ADC12_IN10, DAC1_OUT2.
31 PA6 bidirectional 5 V tolerant I/O with analog switch, alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, USART3_CTS, QUADSPI_BK1_IO3, TIM16_CH1; analog OPAMP2_VINP, ADC12_IN11.
32 PA7 bidirectional 5 V tolerant I/O with analog switch, alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, QUADSPI_BK1_IO2, TIM17_CH1; analog OPAMP2_VINM, ADC12_IN12.
33 PC4 bidirectional 5 V tolerant I/O with analog switch, alternate function USART3_TX; analog COMP1_INM, ADC12_IN13.
34 PC5 bidirectional 5 V tolerant I/O with analog switch, alternate function USART3_RX; analog COMP1_INP, ADC12_IN14, WKUP5.
35 PB0 bidirectional 3.6 V tolerant I/O with analog switch, alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, USART3_CK, QUADSPI_BK1_IO1, COMP1_OUT; analog OPAMP2_VOUT, ADC12_IN15.
36 PB1 bidirectional 5 V tolerant I/O with analog switch, alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN0, USART3_RTS_DE, QUADSPI_BK1_IO0, LPTIM2_IN1; analog COMP1_INM, ADC12_IN16.
37 PB2 bidirectional 5 V tolerant I/O with analog switch, alternate functions RTC_OUT, LPTIM1_OUT, I2C3_SMBA, DFSDM1_CKIN0; analog COMP1_INP.
38 PE7 bidirectional 5 V tolerant I/O with alternate functions TIM1_ETR, DFSDM1_DATIN2, FMC_D4, SAI1_SD_B, EVENTOUT.
39 PE8 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH1N, DFSDM1_CKIN2, FMC_D5, SAI1_SCK_B, EVENTOUT.
40 PE9 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH1, DFSDM1_CKOUT, FMC_D6, SAI1_FS_B, EVENTOUT.
41 PE10 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH2N, DFSDM1_DATIN4, TSC_G5_IO1, QUADSPI_CLK, FMC_D7, SAI1_MCLK_B.
42 PE11 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH2, DFSDM1_CKIN4, TSC_G5_IO2, QUADSPI_NCS, FMC_D8, EVENTOUT.
43 PE12 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH3N, SPI1_NSS, DFSDM1_DATIN5, TSC_G5_IO3, QUADSPI_BK1_IO0, FMC_D9.
44 PE13 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH3, SPI1_SCK, DFSDM1_CKIN5, TSC_G5_IO4, QUADSPI_BK1_IO1, FMC_D10.
45 PE14 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH4, TIM1_BKIN2, TIM1_BKIN2_COMP2, SPI1_MISO, QUADSPI_BK1_IO2, FMC_D11.
46 PE15 bidirectional 5 V tolerant I/O with alternate functions TIM1_BKIN, TIM1_BKIN_COMP1, SPI1_MOSI, QUADSPI_BK1_IO3, FMC_D12.
47 PB10 bidirectional 5 V tolerant Fm+ capable I/O with alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK, DFSDM1_DATIN7, USART3_TX, LPUART1_RX, QUADSPI_CLK, COMP1_OUT, SAI1_SCK_A.
48 PB11 bidirectional 5 V tolerant Fm+ capable I/O with alternate functions TIM2_CH4, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, LPUART1_TX, QUADSPI_NCS, COMP2_OUT.
49 VSS power_in Digital ground supply pin.
50 VDD power_in Digital supply pin, standard operating range 1.71 V to 3.6 V.
51 PB12 bidirectional 5 V tolerant I/O with alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, SWPMI1_IO, SAI2_FS_A, TIM15_BKIN.
52 PB13 bidirectional 5 V tolerant Fm+ capable I/O with alternate functions TIM1_CH1N, I2C2_SCL, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, SWPMI1_TX, SAI2_SCK_A.
53 PB14 bidirectional 5 V tolerant Fm+ capable I/O with alternate functions TIM1_CH2N, TIM8_CH2N, I2C2_SDA, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS_DE, TSC_G1_IO3, SWPMI1_RX, SAI2_MCLK_A.
54 PB15 bidirectional 5 V tolerant I/O with alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, DFSDM1_CKIN2, TSC_G1_IO4, SWPMI1_SUSPEND, SAI2_SD_A, TIM15_CH2.
55 PD8 bidirectional 5 V tolerant I/O with alternate functions USART3_TX, FMC_D13, EVENTOUT.
56 PD9 bidirectional 5 V tolerant I/O with alternate functions USART3_RX, FMC_D14, SAI2_MCLK_A, EVENTOUT.
57 PD10 bidirectional 5 V tolerant I/O with alternate functions USART3_CK, TSC_G6_IO1, FMC_D15, SAI2_SCK_A, EVENTOUT.
58 PD11 bidirectional 5 V tolerant I/O with alternate functions USART3_CTS, TSC_G6_IO2, FMC_A16, SAI2_SD_A, LPTIM2_ETR, EVENTOUT.
59 PD12 bidirectional 5 V tolerant I/O with alternate functions TIM4_CH1, USART3_RTS_DE, TSC_G6_IO3, FMC_A17, SAI2_FS_A, LPTIM2_IN1.
60 PD13 bidirectional 5 V tolerant I/O with alternate functions TIM4_CH2, TSC_G6_IO4, FMC_A18, LPTIM2_OUT, EVENTOUT.
61 PD14 bidirectional 5 V tolerant I/O with alternate functions TIM4_CH3, FMC_D0, EVENTOUT.
62 PD15 bidirectional 5 V tolerant I/O with alternate functions TIM4_CH4, FMC_D1, EVENTOUT.
63 PC6 bidirectional 5 V tolerant I/O with alternate functions TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, TSC_G4_IO1, SDMMC1_D6, SAI2_MCLK_A.
64 PC7 bidirectional 5 V tolerant I/O with alternate functions TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, TSC_G4_IO2, SDMMC1_D7, SAI2_MCLK_B.
65 PC8 bidirectional 5 V tolerant I/O with alternate functions TIM3_CH3, TIM8_CH3, TSC_G4_IO3, SDMMC1_D0, EVENTOUT.
66 PC9 bidirectional 5 V tolerant I/O with alternate functions TIM8_BKIN2, TIM3_CH4, TIM8_CH4, TSC_G4_IO4, SDMMC1_D1, SAI2_EXTCLK, TIM8_BKIN2_COMP1.
67 PA8 bidirectional 5 V tolerant I/O with alternate functions MCO, TIM1_CH1, USART1_CK, LPTIM2_OUT, EVENTOUT.
68 PA9 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH2, USART1_TX, TIM15_BKIN, EVENTOUT.
69 PA10 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH3, USART1_RX, TIM17_BKIN, EVENTOUT.
70 PA11 bidirectional 5 V tolerant I/O with alternate functions TIM1_CH4, TIM1_BKIN2, USART1_CTS, CAN1_RX, TIM1_BKIN2_COMP1, EVENTOUT.
71 PA12 bidirectional 5 V tolerant I/O with alternate functions TIM1_ETR, USART1_RTS_DE, CAN1_TX, EVENTOUT.
72 PA13 bidirectional 5 V tolerant I/O, JTMS-SWDIO after reset with internal pull-up active; alternate functions IR_OUT, EVENTOUT.
73 VDD power_in Digital supply pin, standard operating range 1.71 V to 3.6 V.
74 VSS power_in Digital ground supply pin.
75 VDD power_in Digital supply pin, standard operating range 1.71 V to 3.6 V.
76 PA14 bidirectional 5 V tolerant I/O, JTCK-SWCLK after reset with internal pull-down active; alternate function EVENTOUT.
77 PA15 bidirectional 5 V tolerant I/O, JTDI after reset with internal pull-up active; alternate functions TIM2_CH1, TIM2_ETR, SPI1_NSS, SPI3_NSS, UART4_RTS_DE, TSC_G3_IO1, SAI2_FS_B.
78 PC10 bidirectional 5 V tolerant I/O with alternate functions SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2, SDMMC1_D2, SAI2_SCK_B.
79 PC11 bidirectional 5 V tolerant I/O with alternate functions SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3, SDMMC1_D3, SAI2_MCLK_B.
80 PC12 bidirectional 5 V tolerant I/O with alternate functions SPI3_MOSI, USART3_CK, UART5_TX, TSC_G3_IO4, SDMMC1_CK, SAI2_SD_B.
81 PD0 bidirectional 5 V tolerant I/O with alternate functions SPI2_NSS, DFSDM1_DATIN7, CAN1_RX, FMC_D2, EVENTOUT.
82 PD1 bidirectional 5 V tolerant I/O with alternate functions SPI2_SCK, DFSDM1_CKIN7, CAN1_TX, FMC_D3, EVENTOUT.
83 PD2 bidirectional 5 V tolerant I/O with alternate functions TIM3_ETR, USART3_RTS_DE, UART5_RX, TSC_SYNC, SDMMC1_CMD, EVENTOUT.
84 PD3 bidirectional 5 V tolerant I/O with alternate functions SPI2_MISO, DFSDM1_DATIN0, USART2_CTS, FMC_CLK, EVENTOUT.
85 PD4 bidirectional 5 V tolerant I/O with alternate functions SPI2_MOSI, DFSDM1_CKIN0, USART2_RTS_DE, FMC_NOE, EVENTOUT.
86 PD5 bidirectional 5 V tolerant I/O with alternate functions USART2_TX, FMC_NWE, EVENTOUT.
87 PD6 bidirectional 5 V tolerant I/O with alternate functions DFSDM1_DATIN1, USART2_RX, FMC_NWAIT, SAI1_SD_A, EVENTOUT.
88 PD7 bidirectional 5 V tolerant I/O with alternate functions DFSDM1_CKIN1, USART2_CK, FMC_NE1, EVENTOUT.
89 PB3 bidirectional 5 V tolerant I/O with analog switch, JTDO-TRACESWO after reset; alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, SAI1_SCK_B; analog COMP2_INM.
90 PB4 bidirectional 5 V tolerant I/O with analog switch, NJTRST after reset with internal pull-up active; alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO, USART1_CTS, UART5_RTS_DE, TSC_G2_IO1, SAI1_MCLK_B, TIM17_BKIN; analog COMP2_INP.
91 PB5 bidirectional 5 V tolerant I/O with analog switch, alternate functions LPTIM1_IN1, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, UART5_CTS, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B, TIM16_BKIN.
92 PB6 bidirectional 5 V tolerant Fm+ capable I/O with analog switch, alternate functions LPTIM1_ETR, TIM4_CH1, TIM8_BKIN2, I2C1_SCL, DFSDM1_DATIN5, USART1_TX, TSC_G2_IO3, SAI1_FS_B, TIM16_CH1N; analog COMP2_INP.
93 PB7 bidirectional 5 V tolerant Fm+ capable I/O with analog switch, alternate functions LPTIM1_IN2, TIM4_CH2, TIM8_BKIN, I2C1_SDA, DFSDM1_CKIN5, USART1_RX, UART4_CTS, TSC_G2_IO4, FMC_NL, TIM17_CH1N; analog COMP2_INM, PVD_IN.
94 BOOT0 input Dedicated boot mode selection input pin; input voltage up to 9 V permitted.
95 PB8 bidirectional 5 V tolerant Fm+ capable I/O with alternate functions TIM4_CH3, I2C1_SCL, DFSDM1_DATIN6, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1.
96 PB9 bidirectional 5 V tolerant Fm+ capable I/O with alternate functions IR_OUT, TIM4_CH4, I2C1_SDA, SPI2_NSS, DFSDM1_CKIN6, CAN1_TX, SDMMC1_D5, SAI1_FS_A, TIM17_CH1.
97 PE0 bidirectional 5 V tolerant I/O with alternate functions TIM4_ETR, FMC_NBL0, TIM16_CH1, EVENTOUT.
98 PE1 bidirectional 5 V tolerant I/O with alternate functions FMC_NBL1, TIM17_CH1, EVENTOUT.
99 VSS power_in Digital ground supply pin.
100 VDD power_in Digital supply pin, standard operating range 1.71 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32L471VGT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32l471vgt6-etched.step / stm32l471vgt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l471vgt6.step / stm32l471vgt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (229 pp, sha256 2a91fd04e0793619, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF