component
STM32L471VGT3
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSTM32L471VGT3
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
STM32L471VGT3 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TRACECK, TIM3_ETR, TSC_G7_IO1, FMC_A23 and SAI1_MCLK_A. |
| 2 | PE3 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TRACED0, TIM3_CH1, TSC_G7_IO2, FMC_A19 and SAI1_SD_B. |
| 3 | PE4 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TRACED1, TIM3_CH2, DFSDM1_DATIN3, FMC_A20 and SAI1_FS_A. |
| 4 | PE5 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TRACED2, TIM3_CH3, DFSDM1_CKIN3, FMC_A21 and SAI1_SCK_A. |
| 5 | PE6 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TRACED3, TIM3_CH4, FMC_A22 and SAI1_SD_A; additional function RTC_TAMP3/WKUP3. |
| 6 | VBAT | power_in | Backup domain supply for RTC and backup registers, 1.55 V to 3.6 V. |
| 7 | PC13 | bidirectional | I/O, 5 V tolerant (FT), supplied through the power switch which sinks at most 3 mA, so output use is limited to 2 MHz with 30 pF and it must not drive LEDs as a current source; additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2. |
| 8 | PC14-OSC32_IN | bidirectional | I/O, 5 V tolerant (FT), power-switch supplied with the same 3 mA and 2 MHz / 30 pF output limits as PC13; also the LSE oscillator input OSC32_IN. |
| 9 | PC15-OSC32_OUT | bidirectional | I/O, 5 V tolerant (FT), power-switch supplied with the same 3 mA and 2 MHz / 30 pF output limits as PC13; also the LSE oscillator output OSC32_OUT. |
| 10 | VSS | power_in | Ground pin for the digital supply domain. |
| 11 | VDD | power_in | Standard digital supply, 1.71 V to 3.6 V. |
| 12 | PH0-OSC_IN | bidirectional | I/O, 5 V tolerant (FT); also the HSE oscillator input OSC_IN. |
| 13 | PH1-OSC_OUT | bidirectional | I/O, 5 V tolerant (FT); also the HSE oscillator output OSC_OUT. |
| 14 | NRST | bidirectional | Bidirectional active-low reset pin with embedded weak pull-up resistor. |
| 15 | PC0 | bidirectional | I/O, 5 V tolerant with Fm+ capability and analog switch supplied by VDDA (FT_fa); alternate functions include LPTIM1_IN1, I2C3_SCL, LPUART1_RX and ADC123_IN1. |
| 16 | PC1 | bidirectional | I/O, 5 V tolerant with Fm+ capability and analog switch supplied by VDDA (FT_fa); alternate functions include LPTIM1_OUT, I2C3_SDA, LPUART1_TX and ADC123_IN2. |
| 17 | PC2 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT and ADC123_IN3. |
| 18 | PC3 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include LPTIM1_ETR, SPI2_MOSI, SAI1_SD_A, LPTIM2_ETR and ADC123_IN4. |
| 19 | VSSA | power_in | Ground pin for the analog supply domain (ADC, DAC, OPAMP, COMP, VREF). |
| 20 | VREF- | power_in | Negative reference voltage for the ADC, tied to VSSA. |
| 21 | VREF+ | power_in | Positive ADC reference voltage input; datasheet requires VDDA ≥ 2 V when VREF+ is at its maximum, otherwise VREF+ may be at most VDDA; also available as VREFBUF_OUT. |
| 22 | VDDA | power_in | Analog supply, 1.62 V to 3.6 V for ADC or COMP and 1.8 V minimum for DAC or OPAMP; must be decoupled to VSSA. |
| 23 | PA0 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include TIM2_CH1, TIM8_ETR, USART2_CTS and UART4_TX, additional functions OPAMP1_VINP, ADC12_IN5 and RTC_TAMP2/WKUP1. |
| 24 | PA1 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include TIM2_CH2, USART2_RTS_DE and UART4_RX, additional functions OPAMP1_VINM and ADC12_IN6. |
| 25 | PA2 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include TIM2_CH3, USART2_TX and SAI2_EXTCLK, additional functions ADC12_IN7 and WKUP4/LSCO. |
| 26 | PA3 | bidirectional | I/O, 3.6 V tolerant (TT_a) with analog switch supplied by VDDA; alternate functions include TIM2_CH4, TIM5_CH4, USART2_RX and TIM15_CH2, additional functions OPAMP1_VOUT and ADC12_IN8. |
| 27 | VSS | power_in | Ground pin for the digital supply domain. |
| 28 | VDD | power_in | Standard digital supply, 1.71 V to 3.6 V. |
| 29 | PA4 | bidirectional | I/O, 3.6 V tolerant (TT_a) with analog switch supplied by VDDA; alternate functions include SPI1_NSS, SPI3_NSS, USART2_CK and LPTIM2_OUT, additional functions ADC12_IN9 and DAC1_OUT1. |
| 30 | PA5 | bidirectional | I/O, 3.6 V tolerant (TT_a) with analog switch supplied by VDDA; alternate functions include TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK and LPTIM2_ETR, additional functions ADC12_IN10 and DAC1_OUT2. |
| 31 | PA6 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include TIM1_BKIN, TIM3_CH1, SPI1_MISO, USART3_CTS and QUADSPI_BK1_IO3, additional functions OPAMP2_VINP and ADC12_IN11. |
| 32 | PA7 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include TIM1_CH1N, TIM3_CH2, SPI1_MOSI, QUADSPI_BK1_IO2 and TIM17_CH1, additional functions OPAMP2_VINM and ADC12_IN12. |
| 33 | PC4 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate function USART3_TX, additional functions COMP1_INM and ADC12_IN13. |
| 34 | PC5 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate function USART3_RX, additional functions COMP1_INP, ADC12_IN14 and WKUP5. |
| 35 | PB0 | bidirectional | I/O, 3.6 V tolerant (TT_a) with analog switch supplied by VDDA; alternate functions include TIM1_CH2N, TIM3_CH3, USART3_CK, QUADSPI_BK1_IO1 and COMP1_OUT, additional functions OPAMP2_VOUT and ADC12_IN15. |
| 36 | PB1 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include TIM1_CH3N, TIM3_CH4, DFSDM1_DATIN0, USART3_RTS_DE and LPTIM2_IN1, additional functions COMP1_INM and ADC12_IN16. |
| 37 | PB2 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include RTC_OUT, LPTIM1_OUT, I2C3_SMBA and DFSDM1_CKIN0, additional function COMP1_INP. |
| 38 | PE7 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_ETR, DFSDM1_DATIN2, FMC_D4 and SAI1_SD_B. |
| 39 | PE8 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH1N, DFSDM1_CKIN2, FMC_D5 and SAI1_SCK_B. |
| 40 | PE9 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH1, DFSDM1_CKOUT, FMC_D6 and SAI1_FS_B. |
| 41 | PE10 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH2N, DFSDM1_DATIN4, TSC_G5_IO1, QUADSPI_CLK, FMC_D7 and SAI1_MCLK_B. |
| 42 | PE11 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH2, DFSDM1_CKIN4, TSC_G5_IO2, QUADSPI_NCS and FMC_D8. |
| 43 | PE12 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH3N, SPI1_NSS, DFSDM1_DATIN5, TSC_G5_IO3, QUADSPI_BK1_IO0 and FMC_D9. |
| 44 | PE13 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH3, SPI1_SCK, DFSDM1_CKIN5, TSC_G5_IO4, QUADSPI_BK1_IO1 and FMC_D10. |
| 45 | PE14 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, QUADSPI_BK1_IO2 and FMC_D11. |
| 46 | PE15 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_BKIN, SPI1_MOSI, QUADSPI_BK1_IO3 and FMC_D12. |
| 47 | PB10 | bidirectional | I/O, 5 V tolerant with Fm+ capability (FT_f); alternate functions include TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX and QUADSPI_CLK. |
| 48 | PB11 | bidirectional | I/O, 5 V tolerant with Fm+ capability (FT_f); alternate functions include TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX and QUADSPI_NCS. |
| 49 | VSS | power_in | Ground pin for the digital supply domain. |
| 50 | VDD | power_in | Standard digital supply, 1.71 V to 3.6 V. |
| 51 | PB12 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_BKIN, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE and SWPMI1_IO. |
| 52 | PB13 | bidirectional | I/O, 5 V tolerant with Fm+ capability (FT_f); alternate functions include TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS and SWPMI1_TX. |
| 53 | PB14 | bidirectional | I/O, 5 V tolerant with Fm+ capability (FT_f); alternate functions include TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE and SWPMI1_RX. |
| 54 | PB15 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4 and SWPMI1_SUSPEND. |
| 55 | PD8 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include USART3_TX and FMC_D13. |
| 56 | PD9 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include USART3_RX, FMC_D14 and SAI2_MCLK_A. |
| 57 | PD10 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include USART3_CK, TSC_G6_IO1, FMC_D15 and SAI2_SCK_A. |
| 58 | PD11 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include USART3_CTS, TSC_G6_IO2, FMC_A16, SAI2_SD_A and LPTIM2_ETR. |
| 59 | PD12 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM4_CH1, USART3_RTS_DE, TSC_G6_IO3, FMC_A17 and LPTIM2_IN1. |
| 60 | PD13 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM4_CH2, TSC_G6_IO4, FMC_A18 and LPTIM2_OUT. |
| 61 | PD14 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM4_CH3, FMC_D0 and EVENTOUT. |
| 62 | PD15 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM4_CH4, FMC_D1 and EVENTOUT. |
| 63 | PC6 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, TSC_G4_IO1, SDMMC1_D6 and SAI2_MCLK_A. |
| 64 | PC7 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, TSC_G4_IO2, SDMMC1_D7 and SAI2_MCLK_B. |
| 65 | PC8 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM3_CH3, TIM8_CH3, TSC_G4_IO3 and SDMMC1_D0. |
| 66 | PC9 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM8_BKIN2, TIM3_CH4, TIM8_CH4, TSC_G4_IO4, SDMMC1_D1 and SAI2_EXTCLK. |
| 67 | PA8 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include MCO, TIM1_CH1, USART1_CK and LPTIM2_OUT. |
| 68 | PA9 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH2, USART1_TX and TIM15_BKIN. |
| 69 | PA10 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH3, USART1_RX and TIM17_BKIN. |
| 70 | PA11 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_CH4, TIM1_BKIN2, USART1_CTS and CAN1_RX. |
| 71 | PA12 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM1_ETR, USART1_RTS_DE and CAN1_TX. |
| 72 | PA13 | bidirectional | I/O, 5 V tolerant (FT); JTMS-SWDIO debug function after reset with internal pull-up enabled, also IR_OUT. |
| 73 | VDD | power_in | Standard digital supply, 1.71 V to 3.6 V. |
| 74 | VSS | power_in | Ground pin for the digital supply domain. |
| 75 | VDD | power_in | Standard digital supply, 1.71 V to 3.6 V. |
| 76 | PA14 | bidirectional | I/O, 5 V tolerant (FT); JTCK-SWCLK debug function after reset with internal pull-down enabled. |
| 77 | PA15 | bidirectional | I/O, 5 V tolerant (FT); JTDI debug function after reset with internal pull-up enabled; also TIM2_CH1, TIM2_ETR, SPI1_NSS, SPI3_NSS and UART4_RTS_DE. |
| 78 | PC10 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2 and SDMMC1_D2. |
| 79 | PC11 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3 and SDMMC1_D3. |
| 80 | PC12 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include SPI3_MOSI, USART3_CK, UART5_TX, TSC_G3_IO4 and SDMMC1_CK. |
| 81 | PD0 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include SPI2_NSS, DFSDM1_DATIN7, CAN1_RX and FMC_D2. |
| 82 | PD1 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include SPI2_SCK, DFSDM1_CKIN7, CAN1_TX and FMC_D3. |
| 83 | PD2 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM3_ETR, USART3_RTS_DE, UART5_RX, TSC_SYNC and SDMMC1_CMD. |
| 84 | PD3 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include SPI2_MISO, DFSDM1_DATIN0, USART2_CTS and FMC_CLK. |
| 85 | PD4 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include SPI2_MOSI, DFSDM1_CKIN0, USART2_RTS_DE and FMC_NOE. |
| 86 | PD5 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include USART2_TX and FMC_NWE. |
| 87 | PD6 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include DFSDM1_DATIN1, USART2_RX, FMC_NWAIT and SAI1_SD_A. |
| 88 | PD7 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include DFSDM1_CKIN1, USART2_CK and FMC_NE1. |
| 89 | PB3 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); JTDO-TRACESWO debug function after reset, also TIM2_CH2, SPI1_SCK, SPI3_SCK and COMP2_INM. |
| 90 | PB4 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); NJTRST debug function after reset with internal pull-up enabled, also TIM3_CH1, SPI1_MISO, SPI3_MISO and COMP2_INP. |
| 91 | PB5 | bidirectional | I/O, 5 V tolerant with analog switch supplied by VDDA (FT_a); alternate functions include LPTIM1_IN1, TIM3_CH2, I2C1_SMBA, SPI1_MOSI and COMP2_OUT. |
| 92 | PB6 | bidirectional | I/O, 5 V tolerant with Fm+ capability and analog switch supplied by VDDA (FT_fa); alternate functions include LPTIM1_ETR, TIM4_CH1, I2C1_SCL, USART1_TX and additional COMP2_INP. |
| 93 | PB7 | bidirectional | I/O, 5 V tolerant with Fm+ capability and analog switch supplied by VDDA (FT_fa); alternate functions include LPTIM1_IN2, TIM4_CH2, I2C1_SDA, USART1_RX and FMC_NL; additional functions COMP2_INM and PVD_IN. |
| 94 | BOOT0 | input | Dedicated BOOT0 pin; input voltage range is VSS to 9.0 V. |
| 95 | PB8 | bidirectional | I/O, 5 V tolerant with Fm+ capability (FT_f); alternate functions include TIM4_CH3, I2C1_SCL, DFSDM1_DATIN6, CAN1_RX, SDMMC1_D4 and TIM16_CH1. |
| 96 | PB9 | bidirectional | I/O, 5 V tolerant with Fm+ capability (FT_f); alternate functions include IR_OUT, TIM4_CH4, I2C1_SDA, SPI2_NSS, CAN1_TX and SDMMC1_D5. |
| 97 | PE0 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include TIM4_ETR, FMC_NBL0 and TIM16_CH1. |
| 98 | PE1 | bidirectional | I/O, 5 V tolerant (FT); alternate functions include FMC_NBL1 and TIM17_CH1. |
| 99 | VSS | power_in | Ground pin for the digital supply domain. |
| 100 | VDD | power_in | Standard digital supply, 1.71 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
STM32L471VGT3 - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
stm32l471vgt3-etched.step/stm32l471vgt3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l471vgt3.step/stm32l471vgt3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (229 pp, sha256
2a91fd04e0793619, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).