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STM32L471QGI6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-132. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L471QGI6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFBGA-132
STM32L471QGI6 from STMicroelectronics, in a UFBGA-132. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | PE3 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TRACED0, TIM3_CH1, TSC_G7_IO2, FMC_A19, SAI1_SD_B, EVENTOUT. |
| A2 | PE1 | bidirectional | 5 V-tolerant I/O (FT); alternate functions FMC_NBL1, TIM17_CH1, EVENTOUT. |
| A3 | PB8 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f); alternate functions TIM4_CH3, I2C1_SCL, DFSDM1_DATIN6, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1, EVENTOUT. |
| A4 | BOOT0 | input | Dedicated BOOT0 boot-mode input; input voltage range is VSS to 9.0 V (Table 20). |
| A5 | PD7 | bidirectional | 5 V-tolerant I/O (FT); alternate functions DFSDM1_CKIN1, USART2_CK, FMC_NE1, EVENTOUT. |
| A6 | PD5 | bidirectional | 5 V-tolerant I/O (FT); alternate functions USART2_TX, FMC_NWE, EVENTOUT. |
| A7 | PB4 | bidirectional | 5 V-tolerant I/O with analog switch supplied by VDDA (FT_a); reset state NJTRST with internal pull-up; alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, SAI1_MCLK_B, TIM17_BKIN, EVENTOUT; additional COMP2_INP. |
| A8 | PB3 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); reset state JTDO-TRACESWO debug function; alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, SAI1_SCK_B, EVENTOUT; additional COMP2_INM. |
| A9 | PA15 (JTDI) | bidirectional | 5 V-tolerant I/O (FT); reset state JTDI with internal pull-up; alternate functions TIM2_CH1, TIM2_ETR, SPI1_NSS, SPI3_NSS, UART4_RTS_DE, TSC_G3_IO1, SAI2_FS_B, EVENTOUT. |
| A10 | PA14 | bidirectional | 5 V-tolerant I/O (FT); reset state JTCK-SWCLK with internal pull-down; alternate function EVENTOUT. |
| A11 | PA13 | bidirectional | 5 V-tolerant I/O (FT); reset state JTMS-SWDIO with internal pull-up; alternate functions IR_OUT, EVENTOUT. |
| A12 | PA12 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_ETR, USART1_RTS_DE, CAN1_TX, EVENTOUT. |
| B1 | PE4 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TRACED1, TIM3_CH2, DFSDM1_DATIN3, TSC_G7_IO3, FMC_A20, SAI1_FS_A, EVENTOUT. |
| B2 | PE2 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TRACECK, TIM3_ETR, TSC_G7_IO1, FMC_A23, SAI1_MCLK_A, EVENTOUT. |
| B3 | PB9 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f); alternate functions IR_OUT, TIM4_CH4, I2C1_SDA, SPI2_NSS, DFSDM1_CKIN6, CAN1_TX, SDMMC1_D5, SAI1_FS_A, TIM17_CH1, EVENTOUT. |
| B4 | PB7 | bidirectional | 5 V-tolerant Fm+ capable I/O with analog switch (FT_fa); alternate functions LPTIM1_IN2, TIM4_CH2, TIM8_BKIN, I2C1_SDA, DFSDM1_CKIN5, USART1_RX, UART4_CTS, TSC_G2_IO4, FMC_NL, TIM8_BKIN_COMP1, TIM17_CH1N, EVENTOUT; additional COMP2_INM and PVD_IN. |
| B5 | PB6 | bidirectional | 5 V-tolerant Fm+ capable I/O with analog switch (FT_fa); alternate functions LPTIM1_ETR, TIM4_CH1, TIM8_BKIN2, I2C1_SCL, DFSDM1_DATIN5, USART1_TX, TSC_G2_IO3, TIM8_BKIN2_COMP2, SAI1_FS_B, TIM16_CH1N, EVENTOUT; additional COMP2_INP. |
| B6 | PD6 | bidirectional | 5 V-tolerant I/O (FT); alternate functions DFSDM1_DATIN1, USART2_RX, FMC_NWAIT, SAI1_SD_A, EVENTOUT. |
| B7 | PD4 | bidirectional | 5 V-tolerant I/O (FT); alternate functions SPI2_MOSI, DFSDM1_CKIN0, USART2_RTS_DE, FMC_NOE, EVENTOUT. |
| B8 | PD3 | bidirectional | 5 V-tolerant I/O (FT); alternate functions SPI2_MISO, DFSDM1_DATIN0, USART2_CTS, FMC_CLK, EVENTOUT. |
| B9 | PD1 | bidirectional | 5 V-tolerant I/O (FT); alternate functions SPI2_SCK, DFSDM1_CKIN7, CAN1_TX, FMC_D3, EVENTOUT. |
| B10 | PC12 | bidirectional | 5 V-tolerant I/O (FT); alternate functions SPI3_MOSI, USART3_CK, UART5_TX, TSC_G3_IO4, SDMMC1_CK, SAI2_SD_B, EVENTOUT. |
| B11 | PC10 | bidirectional | 5 V-tolerant I/O (FT); alternate functions SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2, SDMMC1_D2, SAI2_SCK_B, EVENTOUT. |
| B12 | PA11 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH4, TIM1_BKIN2, USART1_CTS, CAN1_RX, TIM1_BKIN2_COMP1, EVENTOUT. |
| C1 | PC13 | bidirectional | 5 V-tolerant I/O (FT) supplied through the power switch; the switch sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and the pin must not be used as a current source. |
| C2 | PE5 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TRACED2, TIM3_CH3, DFSDM1_CKIN3, TSC_G7_IO4, FMC_A21, SAI1_SCK_A, EVENTOUT. |
| C3 | PE0 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM4_ETR, FMC_NBL0, TIM16_CH1, EVENTOUT. |
| C4 | VDD | power_in | Main digital supply; standard operating voltage 1.71 V to 3.6 V (Table 23). |
| C5 | PB5 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions LPTIM1_IN1, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, UART5_CTS, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B, TIM16_BKIN, EVENTOUT. |
| C6 | PG14 | bidirectional | 5 V-tolerant Fm+ capable I/O supplied only by VDDIO2 (FT_fs); alternate functions I2C1_SCL, FMC_A25, EVENTOUT. |
| C7 | PG13 | bidirectional | 5 V-tolerant Fm+ capable I/O supplied only by VDDIO2 (FT_fs); alternate functions I2C1_SDA, USART1_CK, FMC_A24, EVENTOUT. |
| C8 | PD2 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM3_ETR, USART3_RTS_DE, UART5_RX, TSC_SYNC, SDMMC1_CMD, EVENTOUT. |
| C9 | PD0 | bidirectional | 5 V-tolerant I/O (FT); alternate functions SPI2_NSS, DFSDM1_DATIN7, CAN1_RX, FMC_D2, EVENTOUT. |
| C10 | PC11 | bidirectional | 5 V-tolerant I/O (FT); alternate functions SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3, SDMMC1_D3, SAI2_MCLK_B, EVENTOUT. |
| C11 | VDD | power_in | Main digital supply; standard operating voltage 1.71 V to 3.6 V (Table 23). |
| C12 | PA10 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH3, USART1_RX, TIM17_BKIN, EVENTOUT. |
| D1 | PC14-OSC32_IN | bidirectional | 5 V-tolerant I/O (FT) supplied through the power switch with the same 3 mA and 2 MHz / 30 pF restrictions as PC13; additional function OSC32_IN (LSE). |
| D2 | PE6 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TRACED3, TIM3_CH4, FMC_A22, SAI1_SD_A, EVENTOUT; additional function RTC_TAMP3/WKUP3. |
| D3 | VSS | power_in | Ground pin for the digital supply domain. |
| D4 | PF2 | bidirectional | 5 V-tolerant I/O (FT); alternate functions I2C2_SMBA, FMC_A2, EVENTOUT. |
| D5 | PF1 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f); alternate functions I2C2_SCL, FMC_A1, EVENTOUT. |
| D6 | PF0 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f); alternate functions I2C2_SDA, FMC_A0, EVENTOUT. |
| D7 | PG12 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions LPTIM1_ETR, SPI3_NSS, USART1_RTS_DE, FMC_NE4, SAI2_SD_A, EVENTOUT. |
| D8 | PG10 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions LPTIM1_IN1, SPI3_MISO, USART1_RX, FMC_NE3, SAI2_FS_A, TIM15_CH1, EVENTOUT. |
| D9 | PG9 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI3_SCK, USART1_TX, FMC_NCE/FMC_NE2, SAI2_SCK_A, TIM15_CH1N, EVENTOUT. |
| D10 | PA9 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH2, USART1_TX, TIM15_BKIN, EVENTOUT. |
| D11 | PA8 | bidirectional | 5 V-tolerant I/O (FT); alternate functions MCO, TIM1_CH1, USART1_CK, LPTIM2_OUT, EVENTOUT. |
| D12 | PC9 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM8_BKIN2, TIM3_CH4, TIM8_CH4, TSC_G4_IO4, SDMMC1_D1, SAI2_EXTCLK, TIM8_BKIN2_COMP1, EVENTOUT. |
| E1 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant I/O (FT) supplied through the power switch with the same 3 mA and 2 MHz / 30 pF restrictions as PC13; additional function OSC32_OUT (LSE). |
| E2 | VBAT | power_in | Backup domain supply for the RTC and backup registers; backup operating voltage 1.55 V to 3.6 V (Table 23). |
| E3 | VSS | power_in | Ground pin for the digital supply domain. |
| E4 | PF3 | bidirectional | 5 V-tolerant I/O with analog switch supplied by VDDA (FT_a); alternate function FMC_A3, EVENTOUT; additional function ADC3_IN6. |
| E9 | PG5 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI1_NSS, LPUART1_CTS, FMC_A15, SAI2_SD_B, EVENTOUT. |
| E10 | PC8 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM3_CH3, TIM8_CH3, TSC_G4_IO3, SDMMC1_D0, EVENTOUT. |
| E11 | PC7 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, TSC_G4_IO2, SDMMC1_D7, SAI2_MCLK_B, EVENTOUT. |
| E12 | PC6 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, TSC_G4_IO1, SDMMC1_D6, SAI2_MCLK_A, EVENTOUT. |
| F1 | PH0-OSC_IN | bidirectional | 5 V-tolerant I/O (FT); alternate function EVENTOUT; additional function OSC_IN (HSE oscillator input). |
| F2 | VSS | power_in | Ground pin for the digital supply domain. |
| F3 | PF4 | bidirectional | 5 V-tolerant I/O with analog switch supplied by VDDA (FT_a); alternate function FMC_A4, EVENTOUT; additional function ADC3_IN7. |
| F4 | PF5 | bidirectional | 5 V-tolerant I/O with analog switch supplied by VDDA (FT_a); alternate function FMC_A5, EVENTOUT; additional function ADC3_IN8. |
| F6 | VSS | power_in | Ground pin for the digital supply domain. |
| F7 | VSS | power_in | Ground pin for the digital supply domain. |
| F9 | PG3 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI1_MISO, FMC_A13, SAI2_FS_B, EVENTOUT. |
| F10 | PG4 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI1_MOSI, FMC_A14, SAI2_MCLK_B, EVENTOUT. |
| F11 | VSS | power_in | Ground pin for the digital supply domain. |
| F12 | VSS | power_in | Ground pin for the digital supply domain. |
| G1 | PH1-OSC_OUT | bidirectional | 5 V-tolerant I/O (FT); alternate function EVENTOUT; additional function OSC_OUT (HSE oscillator output). |
| G2 | VDD | power_in | Main digital supply; standard operating voltage 1.71 V to 3.6 V (Table 23). |
| G3 | PG11 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions LPTIM1_IN2, SPI3_MOSI, USART1_CTS, SAI2_MCLK_A, TIM15_CH2, EVENTOUT. |
| G4 | PG6 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions I2C3_SMBA, LPUART1_RTS_DE, EVENTOUT. |
| G6 | VDD | power_in | Main digital supply; standard operating voltage 1.71 V to 3.6 V (Table 23). |
| G7 | VDDIO2 | power_in | Supply for the PG[15:2] I/Os; 1.08 V to 3.6 V when at least one PG[15:2] I/O is used, 0 to 3.6 V when none are used (Table 23). |
| G9 | PG1 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TSC_G8_IO4, FMC_A11, EVENTOUT. |
| G10 | PG2 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions SPI1_SCK, FMC_A12, SAI2_SCK_B, EVENTOUT. |
| G11 | VDD | power_in | Main digital supply; standard operating voltage 1.71 V to 3.6 V (Table 23). |
| G12 | VDD | power_in | Main digital supply; standard operating voltage 1.71 V to 3.6 V (Table 23). |
| H1 | PC0 | bidirectional | 5 V-tolerant Fm+ capable I/O with analog switch (FT_fa); alternate functions LPTIM1_IN1, I2C3_SCL, DFSDM1_DATIN4, LPUART1_RX, LPTIM2_IN1, EVENTOUT; additional function ADC123_IN1. |
| H2 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor (RST structure). |
| H3 | VDD | power_in | Main digital supply; standard operating voltage 1.71 V to 3.6 V (Table 23). |
| H4 | PG7 | bidirectional | 5 V-tolerant Fm+ capable I/O supplied only by VDDIO2 (FT_fs); alternate functions I2C3_SCL, LPUART1_TX, FMC_INT, EVENTOUT. |
| H9 | PG0 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TSC_G8_IO3, FMC_A10, EVENTOUT. |
| H10 | PD15 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM4_CH4, FMC_D1, EVENTOUT. |
| H11 | PD14 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM4_CH3, FMC_D0, EVENTOUT. |
| H12 | PD13 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM4_CH2, TSC_G6_IO4, FMC_A18, LPTIM2_OUT, EVENTOUT. |
| J1 | VSSA/VREF- | power_in | Analog ground and ADC negative reference voltage (VREF-, equal to VSSA); on this package VSSA and VREF- share one ball. |
| J2 | PC1 | bidirectional | 5 V-tolerant Fm+ capable I/O with analog switch (FT_fa); alternate functions LPTIM1_OUT, I2C3_SDA, DFSDM1_CKIN4, LPUART1_TX, EVENTOUT; additional function ADC123_IN2. |
| J3 | PC2 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT, EVENTOUT; additional function ADC123_IN3. |
| J4 | PA4 | bidirectional | 3.6 V-tolerant I/O with analog switch (TT_a); alternate functions SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B, LPTIM2_OUT, EVENTOUT; additional functions ADC12_IN9 and DAC1_OUT1. |
| J5 | PA7 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, QUADSPI_BK1_IO2, TIM17_CH1, EVENTOUT; OPAMP2_VINM is not available on this UFBGA package, use ball M4. |
| J6 | PG8 | bidirectional | 5 V-tolerant Fm+ capable I/O supplied only by VDDIO2 (FT_fs); alternate functions I2C3_SDA, LPUART1_RX, EVENTOUT. |
| J7 | PF12 | bidirectional | 5 V-tolerant I/O (FT); alternate functions FMC_A6, EVENTOUT. |
| J8 | PF14 | bidirectional | 5 V-tolerant I/O (FT); alternate functions DFSDM1_CKIN6, TSC_G8_IO1, FMC_A8, EVENTOUT. |
| J9 | PF15 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TSC_G8_IO2, FMC_A9, EVENTOUT. |
| J10 | PD12 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM4_CH1, USART3_RTS_DE, TSC_G6_IO3, FMC_A17, SAI2_FS_A, LPTIM2_IN1, EVENTOUT. |
| J11 | PD11 | bidirectional | 5 V-tolerant I/O (FT); alternate functions USART3_CTS, TSC_G6_IO2, FMC_A16, SAI2_SD_A, LPTIM2_ETR, EVENTOUT. |
| J12 | PD10 | bidirectional | 5 V-tolerant I/O (FT); alternate functions USART3_CK, TSC_G6_IO1, FMC_D15, SAI2_SCK_A, EVENTOUT. |
| K1 | PG15 | bidirectional | 5 V-tolerant I/O supplied only by VDDIO2 (FT_s); alternate functions LPTIM1_OUT, I2C1_SMBA, EVENTOUT. |
| K2 | PC3 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions LPTIM1_ETR, SPI2_MOSI, SAI1_SD_A, LPTIM2_ETR, EVENTOUT; additional function ADC123_IN4. |
| K3 | PA2 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM2_CH3, TIM5_CH3, USART2_TX, SAI2_EXTCLK, TIM15_CH1, EVENTOUT; additional functions ADC12_IN7 and WKUP4/LSCO. |
| K4 | PA5 | bidirectional | 3.6 V-tolerant I/O with analog switch (TT_a); alternate functions TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK, LPTIM2_ETR, EVENTOUT; additional functions ADC12_IN10 and DAC1_OUT2. |
| K5 | PC4 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate function USART3_TX, EVENTOUT; additional functions COMP1_INM and ADC12_IN13. |
| K6 | PF11 | bidirectional | 5 V-tolerant I/O (FT); alternate function EVENTOUT. |
| K7 | PF13 | bidirectional | 5 V-tolerant I/O (FT); alternate functions DFSDM1_DATIN6, FMC_A7, EVENTOUT. |
| K8 | PD9 | bidirectional | 5 V-tolerant I/O (FT); alternate functions USART3_RX, FMC_D14, SAI2_MCLK_A, EVENTOUT. |
| K9 | PD8 | bidirectional | 5 V-tolerant I/O (FT); alternate functions USART3_TX, FMC_D13, EVENTOUT. |
| K10 | PB15 | bidirectional | 5 V-tolerant I/O (FT); alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, DFSDM1_CKIN2, TSC_G1_IO4, SWPMI1_SUSPEND, SAI2_SD_A, TIM15_CH2, EVENTOUT. |
| K11 | PB14 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f); alternate functions TIM1_CH2N, TIM8_CH2N, I2C2_SDA, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS_DE, TSC_G1_IO3, SWPMI1_RX, SAI2_MCLK_A, TIM15_CH1, EVENTOUT. |
| K12 | PB13 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f); alternate functions TIM1_CH1N, I2C2_SCL, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, SWPMI1_TX, SAI2_SCK_A, TIM15_CH1N, EVENTOUT. |
| L1 | VREF+ | power_in | Positive ADC/DAC reference voltage input; 2 V to VDDA when VDDA is 2 V or higher, VDDA otherwise (Table 66); alternate function VREFBUF_OUT. |
| L2 | PA0 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, SAI1_EXTCLK, TIM2_ETR, EVENTOUT; additional functions OPAMP1_VINP, ADC12_IN5 and RTC_TAMP2/WKUP1. |
| L3 | PA3 | bidirectional | 3.6 V-tolerant I/O with analog switch (TT_a); alternate functions TIM2_CH4, TIM5_CH4, USART2_RX, TIM15_CH2, EVENTOUT; additional functions OPAMP1_VOUT and ADC12_IN8. |
| L4 | PA6 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, USART3_CTS, QUADSPI_BK1_IO3, TIM1_BKIN_COMP2, TIM8_BKIN_COMP2, TIM16_CH1, EVENTOUT; additional functions OPAMP2_VINP and ADC12_IN11. |
| L5 | PC5 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate function USART3_RX, EVENTOUT; additional functions COMP1_INP, ADC12_IN14 and WKUP5. |
| L6 | PB2 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions RTC_OUT, LPTIM1_OUT, I2C3_SMBA, DFSDM1_CKIN0, EVENTOUT; additional function COMP1_INP. |
| L7 | PE8 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH1N, DFSDM1_CKIN2, FMC_D5, SAI1_SCK_B, EVENTOUT. |
| L8 | PE10 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH2N, DFSDM1_DATIN4, TSC_G5_IO1, QUADSPI_CLK, FMC_D7, SAI1_MCLK_B, EVENTOUT. |
| L9 | PE12 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH3N, SPI1_NSS, DFSDM1_DATIN5, TSC_G5_IO3, QUADSPI_BK1_IO0, FMC_D9, EVENTOUT. |
| L10 | PB10 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f); alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK, DFSDM1_DATIN7, USART3_TX, LPUART1_RX, QUADSPI_CLK, COMP1_OUT, SAI1_SCK_A, EVENTOUT. |
| L11 | PB11 | bidirectional | 5 V-tolerant Fm+ capable I/O (FT_f); alternate functions TIM2_CH4, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, LPUART1_TX, QUADSPI_NCS, COMP2_OUT, EVENTOUT. |
| L12 | PB12 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, SWPMI1_IO, SAI2_FS_A, TIM15_BKIN, EVENTOUT. |
| M1 | VDDA | power_in | Analog supply: minimum 1.62 V when ADC or COMP is used, 1.8 V for DAC or OPAMP, 2.4 V for VREFBUF, up to 3.6 V (Table 23). |
| M2 | PA1 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS_DE, UART4_RX, TIM15_CH1N, EVENTOUT; OPAMP1_VINM is not available as an additional function on this UFBGA package (use ball M3). |
| M3 | OPAMP1_VINM | input | Dedicated OPAMP1 inverting input on a 3.6 V-tolerant (TT) pin, provided on UFBGA packages instead of PA1. |
| M4 | OPAMP2_VINM | input | Dedicated OPAMP2 inverting input on a 3.6 V-tolerant (TT) pin, provided on UFBGA packages instead of PA7. |
| M5 | PB0 | bidirectional | 3.6 V-tolerant I/O with analog switch (TT_a); alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, USART3_CK, QUADSPI_BK1_IO1, COMP1_OUT, EVENTOUT; additional functions OPAMP2_VOUT and ADC12_IN15. |
| M6 | PB1 | bidirectional | 5 V-tolerant I/O with analog switch (FT_a); alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN0, USART3_RTS_DE, QUADSPI_BK1_IO0, LPTIM2_IN1, EVENTOUT; additional functions COMP1_INM and ADC12_IN16. |
| M7 | PE7 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_ETR, DFSDM1_DATIN2, FMC_D4, SAI1_SD_B, EVENTOUT. |
| M8 | PE9 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH1, DFSDM1_CKOUT, FMC_D6, SAI1_FS_B, EVENTOUT. |
| M9 | PE11 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH2, DFSDM1_CKIN4, TSC_G5_IO2, QUADSPI_NCS, FMC_D8, EVENTOUT. |
| M10 | PE13 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH3, SPI1_SCK, DFSDM1_CKIN5, TSC_G5_IO4, QUADSPI_BK1_IO1, FMC_D10, EVENTOUT. |
| M11 | PE14 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_CH4, TIM1_BKIN2, TIM1_BKIN2_COMP2, SPI1_MISO, QUADSPI_BK1_IO2, FMC_D11, EVENTOUT. |
| M12 | PE15 | bidirectional | 5 V-tolerant I/O (FT); alternate functions TIM1_BKIN, TIM1_BKIN_COMP1, SPI1_MOSI, QUADSPI_BK1_IO3, FMC_D12, EVENTOUT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFBGA-132 |
| Category | Embedded Processors & Controllers |
| Pins | 132 |
CAD (KiCad official)
- Symbol:
STM32L471QGI6 - Footprint:
Package_BGA:UFBGA-132_7x7mm_P0.5mm - 3D model: UFBGA-132 (KiCad packages3D, STEP)
- 3D model files:
stm32l471qgi6-etched.step/stm32l471qgi6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l471qgi6.step/stm32l471qgi6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (229 pp, sha256
2a91fd04e0793619, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).