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README

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STM32L452VEI6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFBGA-100

STM32L452VEI6 from STMicroelectronics, in a UFBGA-100. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
B2 PE2 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TRACECK, TIM3_ETR, TSC_G7_IO1, SAI1_MCLK_A and EVENTOUT.
A1 PE3 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TRACED0, TIM3_CH1, TSC_G7_IO2, SAI1_SD_B and EVENTOUT.
B1 PE4 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TRACED1, TIM3_CH2, DFSDM1_DATIN3, TSC_G7_IO3, SAI1_FS_A and EVENTOUT.
C2 PE5 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TRACED2, TIM3_CH3, DFSDM1_CKIN3, TSC_G7_IO4, SAI1_SCK_A and EVENTOUT.
D2 PE6 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TRACED3, TIM3_CH4, SAI1_SD_A and EVENTOUT; additional function RTC_TAMP3/WKUP3.
E2 VBAT power_in Backup domain supply, 1.55 V to 3.6 V, powering the RTC and 32x32-bit backup registers.
C1 PC13 bidirectional Supplied through the power switch (sinks max 3 mA), so output speed must not exceed 2 MHz at 30 pF and it must not source current such as LED drive; additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2.
D1 PC14-OSC32_IN bidirectional Backup-domain GPIO with the same power-switch limits as PC13 (max 3 mA, 2 MHz at 30 pF); additional function OSC32_IN for the 32 kHz LSE crystal.
E1 PC15-OSC32_OUT bidirectional Backup-domain GPIO with the same power-switch limits as PC13 (max 3 mA, 2 MHz at 30 pF); additional function OSC32_OUT for the 32 kHz LSE crystal.
F2 VSS power_in Ground pin; must be connected to the board ground.
G2 VDD power_in Main supply pin, 1.71 V to 3.6 V.
F1 PH0-OSC_IN bidirectional 5 V-tolerant (FT) I/O with additional function OSC_IN (high-speed crystal oscillator input) and alternate function EVENTOUT.
G1 PH1-OSC_OUT bidirectional 5 V-tolerant (FT) I/O with additional function OSC_OUT (high-speed crystal oscillator output) and alternate function EVENTOUT.
H2 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor (RST structure).
H1 PC0 bidirectional 5 V-tolerant I/O with analog switch function (FT_fa, Fm+ capable) and alternate functions LPTIM1_IN1, I2C4_SCL, I2C3_SCL, LPUART1_RX, LPTIM2_IN1, EVENTOUT; additional function ADC1_IN1.
J2 PC1 bidirectional 5 V-tolerant I/O with analog switch function (FT_fa, Fm+ capable) and alternate functions TRACED0, LPTIM1_OUT, I2C4_SDA, I2C3_SDA, LPUART1_TX, EVENTOUT; additional function ADC1_IN2.
J3 PC2 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate functions LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT, EVENTOUT; additional function ADC1_IN3.
K2 PC3 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate functions LPTIM1_ETR, SPI2_MOSI, SAI1_SD_A, LPTIM2_ETR, EVENTOUT; additional function ADC1_IN4.
J1 VSSA power_in Analog ground for the ADC, COMP, DAC, OPAMP and VREFBUF blocks.
K1 VREF- power_in Negative reference voltage input for the ADC, referenced to VSSA.
L1 VREF+ power_in Positive ADC reference input; VREF+ must be at least 2 V when VDDA is 2 V or higher and at most VDDA; also carries the VREFBUF_OUT function.
M1 VDDA power_in Analog supply, 1.62 V to 3.6 V when ADC or COMP is used (1.8 V minimum for DAC or OPAMP, 2.4 V for VREFBUF).
L2 PA0 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate functions TIM2_CH1, USART2_CTS, UART4_TX, COMP1_OUT, SAI1_EXTCLK, TIM2_ETR, EVENTOUT; additional functions OPAMP1_VINP, COMP1_INM, ADC1_IN5, RTC_TAMP2/WKUP1.
M2 PA1 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate functions TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, UART4_RX, TIM15_CH1N, EVENTOUT; additional functions OPAMP1_VINM, COMP1_INP, ADC1_IN6.
K3 PA2 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate functions TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, COMP2_OUT, TIM15_CH1, EVENTOUT; additional functions COMP2_INM, ADC1_IN7, WKUP4/LSCO.
L3 PA3 bidirectional 3.6 V-tolerant (TT_a) I/O with analog switch function and alternate functions TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, SAI1_MCLK_A, TIM15_CH2, EVENTOUT; additional functions OPAMP1_VOUT, COMP2_INP, ADC1_IN8.
E3 VSS power_in Ground pin; must be connected to the board ground.
H3 VDD power_in Main supply pin, 1.71 V to 3.6 V.
M3 PA4 bidirectional 3.6 V-tolerant (TT_a) I/O with analog switch function and alternate functions SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B, LPTIM2_OUT, EVENTOUT; additional functions COMP1_INM, COMP2_INM, ADC1_IN9, DAC1_OUT1.
K4 PA5 bidirectional 3.6 V-tolerant (TT_a) I/O with analog switch function and alternate functions TIM2_CH1, TIM2_ETR, SPI1_SCK, DFSDM1_CKOUT, LPTIM2_ETR, EVENTOUT; additional functions COMP1_INM, COMP2_INM, ADC1_IN10.
L4 PA6 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate functions TIM1_BKIN, TIM3_CH1, SPI1_MISO, COMP1_OUT, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3, TIM1_BKIN_COMP2, TIM16_CH1, EVENTOUT; additional function ADC1_IN11.
M4 PA7 bidirectional 5 V-tolerant I/O with analog switch function (FT_fa, Fm+ capable) and alternate functions TIM1_CH1N, TIM3_CH2, I2C3_SCL, SPI1_MOSI, DFSDM1_DATIN0, QUADSPI_BK1_IO2, COMP2_OUT, EVENTOUT; additional function ADC1_IN12.
K5 PC4 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate function USART3_TX and EVENTOUT; additional functions COMP1_INM, ADC1_IN13.
L5 PC5 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate function USART3_RX and EVENTOUT; additional functions COMP1_INP, ADC1_IN14, WKUP5.
M5 PB0 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate functions TIM1_CH2N, TIM3_CH3, SPI1_NSS, DFSDM1_CKIN0, USART3_CK, QUADSPI_BK1_IO1, COMP1_OUT, SAI1_EXTCLK, EVENTOUT; additional function ADC1_IN15.
M6 PB1 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate functions TIM1_CH3N, TIM3_CH4, DFSDM1_DATIN0, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LPTIM2_IN1, EVENTOUT; additional functions COMP1_INM, ADC1_IN16.
L6 PB2 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) and alternate functions RTC_OUT, LPTIM1_OUT, I2C3_SMBA, DFSDM1_CKIN0, EVENTOUT; additional function COMP1_INP.
M7 PE7 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_ETR, DFSDM1_DATIN2, SAI1_SD_B and EVENTOUT.
L7 PE8 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_CH1N, DFSDM1_CKIN2, SAI1_SCK_B and EVENTOUT.
M8 PE9 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_CH1, DFSDM1_CKOUT, SAI1_FS_B and EVENTOUT.
L8 PE10 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_CH2N, TSC_G5_IO1, QUADSPI_CLK, SAI1_MCLK_B and EVENTOUT.
M9 PE11 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_CH2, TSC_G5_IO2, QUADSPI_BK1_NCS and EVENTOUT.
L9 PE12 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_CH3N, SPI1_NSS, TSC_G5_IO3, QUADSPI_BK1_IO0 and EVENTOUT.
M10 PE13 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_CH3, SPI1_SCK, TSC_G5_IO4, QUADSPI_BK1_IO1 and EVENTOUT.
M11 PE14 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_CH4, TIM1_BKIN2, TIM1_BKIN2_COMP2, SPI1_MISO, QUADSPI_BK1_IO2 and EVENTOUT.
M12 PE15 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_BKIN, TIM1_BKIN_COMP1, SPI1_MOSI, QUADSPI_BK1_IO3 and EVENTOUT.
L10 PB10 bidirectional 5 V-tolerant I/O, Fm+ capable (FT_f), with alternate functions TIM2_CH3, I2C4_SCL, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, COMP1_OUT, SAI1_SCK_A and EVENTOUT.
L11 PB11 bidirectional 5 V-tolerant I/O, Fm+ capable (FT_f), with alternate functions TIM2_CH4, I2C4_SDA, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS, COMP2_OUT and EVENTOUT.
F12 VSS power_in Ground pin; must be connected to the board ground.
G12 VDD power_in Main supply pin, 1.71 V to 3.6 V.
L12 PB12 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, CAN1_RX, SAI1_FS_A, TIM15_BKIN and EVENTOUT.
K12 PB13 bidirectional 5 V-tolerant I/O, Fm+ capable (FT_f), with alternate functions TIM1_CH1N, I2C2_SCL, SPI2_SCK, DFSDM1_CKIN1, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, CAN1_TX, SAI1_SCK_A, TIM15_CH1N and EVENTOUT.
K11 PB14 bidirectional 5 V-tolerant I/O, Fm+ capable (FT_f), with alternate functions TIM1_CH2N, I2C2_SDA, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS_DE, TSC_G1_IO3, SAI1_MCLK_A, TIM15_CH1 and EVENTOUT.
K10 PB15 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM1_CH3N, SPI2_MOSI, DFSDM1_CKIN2, TSC_G1_IO4, SAI1_SD_A, TIM15_CH2 and EVENTOUT; additional function RTC_REFIN.
K9 PD8 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions USART3_TX and EVENTOUT.
K8 PD9 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions USART3_RX and EVENTOUT.
J12 PD10 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions USART3_CK, TSC_G6_IO1 and EVENTOUT.
J11 PD11 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions I2C4_SMBA, USART3_CTS, TSC_G6_IO2, LPTIM2_ETR and EVENTOUT.
J10 PD12 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions I2C4_SCL, USART3_RTS_DE, TSC_G6_IO3, LPTIM2_IN1 and EVENTOUT.
H12 PD13 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions I2C4_SDA, TSC_G6_IO4, LPTIM2_OUT and EVENTOUT.
H11 PD14 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate function EVENTOUT only.
H10 PD15 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate function EVENTOUT only.
E12 PC6 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM3_CH1, DFSDM1_CKIN3, TSC_G4_IO1, SDMMC1_D6 and EVENTOUT.
E11 PC7 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM3_CH2, DFSDM1_DATIN3, TSC_G4_IO2, SDMMC1_D7 and EVENTOUT.
E10 PC8 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM3_CH3, TSC_G4_IO3, SDMMC1_D0 and EVENTOUT.
D12 PC9 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM3_CH4, TSC_G4_IO4, USB_NOE, SDMMC1_D1 and EVENTOUT.
D11 PA8 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions MCO, TIM1_CH1, DFSDM1_CKIN1, USART1_CK, SAI1_SCK_A, LPTIM2_OUT and EVENTOUT.
D10 PA9 bidirectional 5 V-tolerant I/O, Fm+ capable (FT_f), with alternate functions TIM1_CH2, I2C1_SCL, DFSDM1_DATIN1, USART1_TX, SAI1_FS_A, TIM15_BKIN and EVENTOUT.
C12 PA10 bidirectional 5 V-tolerant I/O, Fm+ capable (FT_f), with alternate functions TIM1_CH3, I2C1_SDA, USART1_RX, USB_CRS_SYNC, SAI1_SD_A and EVENTOUT.
B12 PA11 bidirectional 5 V-tolerant I/O with USB function supplied by VDDUSB (FT_u), with alternate functions TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, CAN1_RX, USB_DM, TIM1_BKIN2_COMP1 and EVENTOUT.
A12 PA12 bidirectional 5 V-tolerant I/O with USB function supplied by VDDUSB (FT_u), with alternate functions TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX, USB_DP and EVENTOUT.
A11 PA13 bidirectional 5 V-tolerant I/O that is configured as JTMS/SWDIO debug function after reset, with internal pull-up active; alternate functions IR_OUT, USB_NOE, SAI1_SD_B and EVENTOUT.
C11 VDDUSB power_in USB supply, 3.0 V to 3.6 V when USB is used (may be tied to 0 V when USB is not used).
F11 VSS power_in Ground pin; must be connected to the board ground.
G11 VDD power_in Main supply pin, 1.71 V to 3.6 V.
A10 PA14 bidirectional 5 V-tolerant I/O that is configured as JTCK/SWCLK debug function after reset, with internal pull-down active; alternate functions LPTIM1_OUT, I2C1_SMBA, I2C4_SMBA, SAI1_FS_B and EVENTOUT.
A9 PA15 (JTDI) bidirectional 5 V-tolerant I/O that is configured as JTDI debug function after reset, with internal pull-up active; alternate functions TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS_DE, UART4_RTS_DE, TSC_G3_IO1 and EVENTOUT.
B11 PC10 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TRACED1, SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2, SDMMC1_D2 and EVENTOUT.
C10 PC11 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3, SDMMC1_D3 and EVENTOUT.
B10 PC12 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TRACED3, SPI3_MOSI, USART3_CK, TSC_G3_IO4, SDMMC1_CK and EVENTOUT.
C9 PD0 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions SPI2_NSS, CAN1_RX and EVENTOUT.
B9 PD1 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions SPI2_SCK, CAN1_TX and EVENTOUT.
C8 PD2 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TRACED2, TIM3_ETR, USART3_RTS_DE, TSC_SYNC, SDMMC1_CMD and EVENTOUT.
B8 PD3 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions SPI2_MISO, DFSDM1_DATIN0, USART2_CTS, QUADSPI_BK2_NCS and EVENTOUT.
B7 PD4 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions SPI2_MOSI, DFSDM1_CKIN0, USART2_RTS_DE, QUADSPI_BK2_IO0 and EVENTOUT.
A6 PD5 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions USART2_TX, QUADSPI_BK2_IO1 and EVENTOUT.
B6 PD6 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions DFSDM1_DATIN1, USART2_RX, QUADSPI_BK2_IO2, SAI1_SD_A and EVENTOUT.
A5 PD7 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions DFSDM1_CKIN1, USART2_CK, QUADSPI_BK2_IO3 and EVENTOUT.
A8 PB3 bidirectional 5 V-tolerant I/O with analog switch function (FT_a) that is configured as JTDO/TRACESWO debug function after reset; alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, SAI1_SCK_B and EVENTOUT; additional function COMP2_INM.
A7 PB4 (NJTRST) bidirectional 5 V-tolerant I/O with Fm+ and analog switch function (FT_fa) that is configured as NJTRST debug function after reset, with internal pull-up active; alternate functions TIM3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, SAI1_MCLK_B and EVENTOUT; additional function COMP2_INP.
C5 PB5 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions LPTIM1_IN1, TIM3_CH2, CAN1_RX, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B, TIM16_BKIN and EVENTOUT.
B5 PB6 bidirectional 5 V-tolerant I/O with Fm+ and analog switch function (FT_fa) and alternate functions LPTIM1_ETR, I2C1_SCL, I2C4_SCL, USART1_TX, CAN1_TX, TSC_G2_IO3, SAI1_FS_B, TIM16_CH1N and EVENTOUT; additional function COMP2_INP.
B4 PB7 bidirectional 5 V-tolerant I/O with Fm+ and analog switch function (FT_fa) and alternate functions LPTIM1_IN2, I2C1_SDA, I2C4_SDA, USART1_RX, UART4_CTS, TSC_G2_IO4 and EVENTOUT; additional functions COMP2_INM, PVD_IN.
A4 PH3-BOOT0 bidirectional 5 V-tolerant (FT) I/O that serves as the BOOT0 boot-mode selection input, with alternate function EVENTOUT.
A3 PB8 bidirectional 5 V-tolerant I/O, Fm+ capable (FT_f), with alternate functions I2C1_SCL, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1 and EVENTOUT.
B3 PB9 bidirectional 5 V-tolerant I/O, Fm+ capable (FT_f), with alternate functions IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, SDMMC1_D5, SAI1_FS_A and EVENTOUT.
C3 PE0 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate functions TIM16_CH1 and EVENTOUT.
A2 PE1 bidirectional 5 V-tolerant (FT) general-purpose I/O with alternate function EVENTOUT only.
D3 VSS power_in Ground pin; must be connected to the board ground.
C4 VDD power_in Main supply pin, 1.71 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFBGA-100
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32L452VEI6
  • Footprint: Package_BGA:UFBGA-100_7x7mm_Layout12x12_P0.5mm
  • 3D model: UFBGA-100 (KiCad packages3D, STEP)
  • 3D model files: stm32l452vei6-etched.step / stm32l452vei6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l452vei6.step / stm32l452vei6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (221 pp, sha256 0c90cbe36d057ab4, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF