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STM32L451RET6TR

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by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32l451ret6trfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs stm32l451ret6tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers stm32l451ret6tr: viewers after the pinout correction · Ray 5d ago
package.json Publish 0.1.1 · Ray 5d ago
page.json stm32l451ret6tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
README.md Publish 0.1.1 · Ray 5d ago
stm32l451ret6tr-etched.fit.json stm32l451ret6tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32l451ret6tr-etched.glb stm32l451ret6tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32l451ret6tr-etched.step stm32l451ret6tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32l451ret6tr.glb Publish 0.1.0 · Ray 6d ago
stm32l451ret6tr.kicad_mod Publish 0.1.0 · Ray 6d ago
stm32l451ret6tr.kicad_sym Publish 0.1.1 · Ray 5d ago
stm32l451ret6tr.lbr Publish 0.1.1 · Ray 5d ago
stm32l451ret6tr.step Publish 0.1.0 · Ray 6d ago

STM32L451RET6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L451RET6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply for RTC and backup registers, voltage range 1.55 V to 3.6 V.
2 PC13 bidirectional GPIO Port C pin 13, 5 V tolerant I/O with 3 mA maximum output current limitation, powered through backup domain switch.
3 PC14-OSC32_IN (PC14) bidirectional
4 PC15-OSC32_OUT (PC15) bidirectional
5 PH0-OSC_IN (PH0) bidirectional
6 PH1-OSC_OUT (PH1) bidirectional
7 NRST input Reset pin with embedded weak pull-up resistor, accepts input or open-drain output during reset sequence.
8 PC0 bidirectional GPIO Port C pin 0, 5 V tolerant I/O with analog switch capability, ADC1_IN1 analog input.
9 PC1 bidirectional GPIO Port C pin 1, 5 V tolerant I/O with analog switch capability, ADC1_IN2 analog input.
10 PC2 bidirectional GPIO Port C pin 2, 5 V tolerant I/O with analog switch capability, ADC1_IN3 analog input.
11 PC3 bidirectional GPIO Port C pin 3, 5 V tolerant I/O with analog switch capability, ADC1_IN4 analog input.
12 VSSA/VREF- power_in
13 VDDA/VREF+ power_in
14 PA0 bidirectional GPIO Port A pin 0, 5 V tolerant I/O with analog switch capability, ADC1_IN5 analog input.
15 PA1 bidirectional GPIO Port A pin 1, 5 V tolerant I/O with analog switch capability, ADC1_IN6 analog input.
16 PA2 bidirectional GPIO Port A pin 2, 5 V tolerant I/O with analog switch capability, ADC1_IN7 analog input.
17 PA3 bidirectional GPIO Port A pin 3, 3.6 V tolerant I/O with analog switch capability, ADC1_IN8 analog input.
18 VSS power_in Ground connection for digital circuits and standard I/O.
19 VDD power_in Main digital supply voltage, range 1.71 V to 3.6 V with decoupling capacitor required.
20 PA4 bidirectional GPIO Port A pin 4, 3.6 V tolerant I/O with analog switch capability, ADC1_IN9 and DAC1_OUT1 analog functions.
21 PA5 bidirectional GPIO Port A pin 5, 3.6 V tolerant I/O with analog switch capability, ADC1_IN10 analog input.
22 PA6 bidirectional GPIO Port A pin 6, 5 V tolerant I/O with analog switch capability, ADC1_IN11 analog input.
23 PA7 bidirectional GPIO Port A pin 7, 5 V tolerant I/O with analog switch capability, ADC1_IN12 analog input.
24 PC4 bidirectional GPIO Port C pin 4, 5 V tolerant I/O with analog switch capability, ADC1_IN13 analog input.
25 PC5 bidirectional GPIO Port C pin 5, 5 V tolerant I/O with analog switch capability, ADC1_IN14 and WKUP5 wake-up source.
26 PB0 bidirectional GPIO Port B pin 0, 5 V tolerant I/O with analog switch capability, ADC1_IN15 analog input.
27 PB1 bidirectional GPIO Port B pin 1, 5 V tolerant I/O with analog switch capability, ADC1_IN16 analog input.
28 PB2 bidirectional GPIO Port B pin 2, 5 V tolerant I/O with analog switch capability, COMP1_INP comparator input.
29 PB10 bidirectional GPIO Port B pin 10, 5 V tolerant I/O with Fm+ capability for I2C4, I2C2, and SPI2 interfaces.
30 PB11 bidirectional GPIO Port B pin 11, 5 V tolerant I/O with Fm+ capability for I2C4 and I2C2 communication interfaces.
31 VSS power_in Ground connection for digital circuits and standard I/O.
32 VDD power_in Main digital supply voltage, range 1.71 V to 3.6 V with decoupling capacitor required.
33 PB12 bidirectional GPIO Port B pin 12, 5 V tolerant I/O for TIM1_BKIN, I2C2_SMBA, SPI2_NSS alternate functions.
34 PB13 bidirectional GPIO Port B pin 13, 5 V tolerant I/O with Fm+ capability for I2C2_SCL and CAN1_TX.
35 PB14 bidirectional GPIO Port B pin 14, 5 V tolerant I/O with Fm+ capability for I2C2_SDA and SPI2_MISO.
36 PB15 bidirectional GPIO Port B pin 15, 5 V tolerant I/O for TIM1_CH3N, SPI2_MOSI alternate functions.
37 PC6 bidirectional GPIO Port C pin 6, 5 V tolerant I/O for TIM3_CH1, SDMMC1_D6 alternate functions.
38 PC7 bidirectional GPIO Port C pin 7, 5 V tolerant I/O for TIM3_CH2, SDMMC1_D7 alternate functions.
39 PC8 bidirectional GPIO Port C pin 8, 5 V tolerant I/O for TIM3_CH3, SDMMC1_D0 alternate functions.
40 PC9 bidirectional GPIO Port C pin 9, 5 V tolerant I/O for TIM3_CH4, TSC_G4_IO4, SDMMC1_D1 alternate functions.
41 PA8 bidirectional GPIO Port A pin 8, 5 V tolerant I/O, can be configured as MCO (microcontroller clock output) pin.
42 PA9 bidirectional GPIO Port A pin 9, 5 V tolerant I/O with Fm+ capability for I2C1_SCL and USART1_TX.
43 PA10 bidirectional GPIO Port A pin 10, 5 V tolerant I/O with Fm+ capability for I2C1_SDA and USART1_RX.
44 PA11 bidirectional GPIO Port A pin 11, 5 V tolerant I/O for CAN1_RX and USART1_CTS alternate functions.
45 PA12 bidirectional GPIO Port A pin 12, 5 V tolerant I/O with Fm+ capability for CAN1_TX and USART1_RTS alternate functions.
46 PA13 (JTMS/SWDIO) bidirectional
47 VSS power_in Ground connection for digital circuits and standard I/O.
48 VDD power_in Main digital supply voltage, range 1.71 V to 3.6 V with decoupling capacitor required.
49 PA14 (JTCK/SWCLK) bidirectional
50 PA15 (JTDI) bidirectional
51 PC10 bidirectional GPIO Port C pin 10, 5 V tolerant I/O for TRACED1, SPI3_SCK, USART3_TX, SDMMC1_D2.
52 PC11 bidirectional GPIO Port C pin 11, 5 V tolerant I/O for SPI3_MISO, USART3_RX, UART4_RX, SDMMC1_D3.
53 PC12 bidirectional GPIO Port C pin 12, 5 V tolerant I/O for TRACED3, SPI3_MOSI, USART3_CK, SDMMC1_CK.
54 PD2 bidirectional GPIO Port D pin 2, 5 V tolerant I/O for TRACED2, TIM3_ETR, USART3_RTS_DE, SDMMC1_CMD.
55 PB3 (JTDO/TRACESWO) bidirectional
56 PB4 (NJTRST) bidirectional
57 PB5 bidirectional GPIO Port B pin 5, 5 V tolerant I/O for LPTIM1_IN1, CAN1_RX, I2C1_SMBA, COMP2_OUT.
58 PB6 bidirectional GPIO Port B pin 6, 5 V tolerant I/O with Fm+ capability for I2C1_SCL, I2C4_SCL, CAN1_TX.
59 PB7 bidirectional GPIO Port B pin 7, 5 V tolerant I/O with Fm+ capability for I2C1_SDA, UART4_CTS, COMP2_INM.
60 PH3-BOOT0 (BOOT0) bidirectional
61 PB8 bidirectional GPIO Port B pin 8, 5 V tolerant I/O with Fm+ capability for I2C1_SCL, CAN1_RX, SDMMC1_D4.
62 PB9 bidirectional GPIO Port B pin 9, 5 V tolerant I/O with Fm+ capability for I2C1_SDA, CAN1_TX, SDMMC1_D5.
63 VSS power_in Ground connection for digital circuits and standard I/O.
64 VDD power_in Main digital supply voltage, range 1.71 V to 3.6 V with decoupling capacitor required.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32L451RET6TR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32l451ret6tr-etched.step / stm32l451ret6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l451ret6tr.step / stm32l451ret6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (207 pp, sha256 aa4890e697f5f52e, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF