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STM32L443RCT6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+100@@ -0,0 +1,100 @@+# STM32L443RCT6TR++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)++STM32L443RCT6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup-domain supply for the RTC and 32x32-bit backup registers, with a backup operating voltage of 1.55 V to 3.6 V. |+| 2 | PC13 | bidirectional | 5 V-tolerant (FT) I/O powered through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with 30 pF load and it must not source LED current; alternates include RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2 and EVENTOUT. |+| 3 | PC14-OSC32_IN | bidirectional | 5 V-tolerant (FT) I/O on the power-switch supply with the same 3 mA and 2 MHz / 30 pF output limits, and serves as the 32 kHz LSE oscillator input OSC32_IN. |+| 4 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant (FT) I/O on the power-switch supply with the same 3 mA and 2 MHz / 30 pF output limits, and serves as the 32 kHz LSE oscillator output OSC32_OUT. |+| 5 | PH0-OSC_IN | bidirectional | 5 V-tolerant (FT) I/O that serves as the HSE oscillator input OSC_IN, with EVENTOUT as its alternate function. |+| 6 | PH1-OSC_OUT | bidirectional | 5 V-tolerant (FT) I/O that serves as the HSE oscillator output OSC_OUT, with EVENTOUT as its alternate function. |+| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |+| 8 | PC0 | bidirectional | 5 V-tolerant (FT_fla) I/O with ADC1_IN1 analog input; alternates include LPTIM1_IN1, I2C3_SCL, LPUART1_RX, LCD_SEG18, LPTIM2_IN1 and EVENTOUT. |+| 9 | PC1 | bidirectional | 5 V-tolerant (FT_fla) I/O with ADC1_IN2 analog input; alternates include LPTIM1_OUT, I2C3_SDA, LPUART1_TX, LCD_SEG19 and EVENTOUT. |+| 10 | PC2 | bidirectional | 5 V-tolerant (FT_la) I/O with ADC1_IN3 analog input; alternates include LPTIM1_IN2, SPI2_MISO, LCD_SEG20 and EVENTOUT. |+| 11 | PC3 | bidirectional | 5 V-tolerant (FT_a) I/O with ADC1_IN4 analog input; alternates include LPTIM1_ETR, SPI2_MOSI, LCD_VLCD, SAI1_SD_A, LPTIM2_ETR and EVENTOUT. |+| 12 | VSSA/VREF- | power_in | Analog ground for the analog blocks, which also serves as the ADC negative reference VREF- (connected to VSSA). |+| 13 | VDDA/VREF+ | power_in | Analog supply of 1.62 V to 3.6 V when ADC or COMP is used, which also serves as the ADC positive reference VREF+ (2 V minimum when VDDA is 2 V or above). |+| 14 | PA0 | bidirectional | 5 V-tolerant (FT_a) I/O with OPAMP1_VINP, COMP1_INM, ADC1_IN5 and RTC_TAMP2/WKUP1 analog functions; digital alternates include TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK, TIM2_ETR and EVENTOUT. |+| 15 | PA1 | bidirectional | 5 V-tolerant (FT_la) I/O with OPAMP1_VINM, COMP1_INP and ADC1_IN6 analog functions; alternates include TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, LCD_SEG0 and TIM15_CH1N. |+| 16 | PA2 | bidirectional | 5 V-tolerant (FT_la) I/O with COMP2_INM, ADC1_IN7 and WKUP4/LSCO functions; alternates include TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG1, COMP2_OUT and TIM15_CH1. |+| 17 | PA3 | bidirectional | 3.6 V-tolerant (TT_la) I/O with OPAMP1_VOUT, COMP2_INP and ADC1_IN8 analog functions; alternates include TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, LCD_SEG2, SAI1_MCLK_A and TIM15_CH2. |+| 18 | VSS | power_in | Ground pin for the digital supply domain. |+| 19 | VDD | power_in | Standard digital supply, operating from 1.71 V to 3.6 V. |+| 20 | PA4 | bidirectional | 3.6 V-tolerant (TT_a) I/O with COMP1_INM, COMP2_INM, ADC1_IN9 and DAC1_OUT1 analog functions; alternates include SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B and LPTIM2_OUT. |+| 21 | PA5 | bidirectional | 3.6 V-tolerant (TT_a) I/O with COMP1_INM, COMP2_INM, ADC1_IN10 and DAC1_OUT2 analog functions; alternates include TIM2_CH1, TIM2_ETR, SPI1_SCK and LPTIM2_ETR. |+| 22 | PA6 | bidirectional | 5 V-tolerant (FT_la) I/O with ADC1_IN11 analog input; alternates include TIM1_BKIN, SPI1_MISO, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3, LCD_SEG3, COMP1_OUT/TIM1_BKIN_COMP2 and TIM16_CH1. |+| 23 | PA7 | bidirectional | 5 V-tolerant (FT_fla) I/O with ADC1_IN12 analog input; alternates include TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, LCD_SEG4 and COMP2_OUT. |+| 24 | PC4 | bidirectional | 5 V-tolerant (FT_la) I/O with COMP1_INM and ADC1_IN13 analog functions; alternates include USART3_TX and LCD_SEG22. |+| 25 | PC5 | bidirectional | 5 V-tolerant (FT_la) I/O with COMP1_INP, ADC1_IN14 and WKUP5 functions; alternates include USART3_RX and LCD_SEG23. |+| 26 | PB0 | bidirectional | 5 V-tolerant (FT_la) I/O with ADC1_IN15 analog input; alternates include TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, LCD_SEG5, COMP1_OUT and SAI1_EXTCLK. |+| 27 | PB1 | bidirectional | 5 V-tolerant (FT_la) I/O with COMP1_INM and ADC1_IN16 analog functions; alternates include TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LCD_SEG6 and LPTIM2_IN1. |+| 28 | PB2 | bidirectional | 5 V-tolerant (FT_a) I/O with COMP1_INP analog function; alternates include RTC_OUT, LPTIM1_OUT, I2C3_SMBA, LCD_VLCD and EVENTOUT. |+| 29 | PB10 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable, with LCD function supplied by VLCD; alternates include TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, LCD_SEG10 and SAI1_SCK_A. |+| 30 | PB11 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable, with LCD function supplied by VLCD; alternates include TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG11 and COMP2_OUT. |+| 31 | VSS | power_in | Ground pin for the digital supply domain. |+| 32 | VDD | power_in | Standard digital supply, operating from 1.71 V to 3.6 V. |+| 33 | PB12 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, LCD_SEG12, SWPMI1_IO, SAI1_FS_A and TIM15_BKIN. |+| 34 | PB13 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, LCD_SEG13, SWPMI1_TX, SAI1_SCK_A and TIM15_CH1N. |+| 35 | PB14 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, LCD_SEG14, SWPMI1_RX, SAI1_MCLK_A and TIM15_CH1. |+| 36 | PB15 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, LCD_SEG15, SWPMI1_SUSPEND, SAI1_SD_A and TIM15_CH2. |+| 37 | PC6 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO1, LCD_SEG24, SDMMC1_D6 and EVENTOUT. |+| 38 | PC7 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO2, LCD_SEG25, SDMMC1_D7 and EVENTOUT. |+| 39 | PC8 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO3, LCD_SEG26, SDMMC1_D0 and EVENTOUT. |+| 40 | PC9 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO4, USB_NOE, LCD_SEG27, SDMMC1_D1 and EVENTOUT. |+| 41 | PA8 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include MCO, TIM1_CH1, USART1_CK, LCD_COM0, SWPMI1_IO, SAI1_SCK_A and LPTIM2_OUT. |+| 42 | PA9 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH2, I2C1_SCL, USART1_TX, LCD_COM1, SAI1_FS_A and TIM15_BKIN. |+| 43 | PA10 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH3, I2C1_SDA, USART1_RX, USB_CRS_SYNC, LCD_COM2 and SAI1_SD_A. |+| 44 | PA11 | bidirectional | 5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternates include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS, CAN1_RX, USB_DM and TIM1_BKIN2_COMP1, with COMP1_OUT as an additional function. |+| 45 | PA12 | bidirectional | 5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternates include TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX and USB_DP. |+| 46 | PA13 | bidirectional | 5 V-tolerant (FT) I/O that is configured as the JTMS-SWDIO debug function after reset, with an internal pull-up enabled; other alternates include IR_OUT, USB_NOE, SWPMI1_TX and SAI1_SD_B. |+| 47 | VSS | power_in | Ground pin for the digital supply domain. |+| 48 | VDDUSB | power_in | USB supply that must be 3.0 V to 3.6 V when the USB is used (may be tied to 0 V to 3.6 V when USB is not used). |+| 49 | PA14 | bidirectional | 5 V-tolerant (FT) I/O that is configured as the JTCK-SWCLK debug function after reset, with an internal pull-down enabled; other alternates include LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX and SAI1_FS_B. |+| 50 | PA15 | bidirectional | 5 V-tolerant (FT_l) I/O that is configured as the JTDI debug function after reset, with an internal pull-up enabled; other alternates include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, TSC_G3_IO1 and LCD_SEG17. |+| 51 | PC10 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include SPI3_SCK, USART3_TX, TSC_G3_IO2, LCD_COM4/LCD_SEG28/LCD_SEG40 and SDMMC1_D2. |+| 52 | PC11 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include SPI3_MISO, USART3_RX, TSC_G3_IO3, LCD_COM5/LCD_SEG29/LCD_SEG41 and SDMMC1_D3. |+| 53 | PC12 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include SPI3_MOSI, USART3_CK, TSC_G3_IO4, LCD_COM6/LCD_SEG30/LCD_SEG42 and SDMMC1_CK. |+| 54 | PD2 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include USART3_RTS_DE, TSC_SYNC, LCD_COM7/LCD_SEG31/LCD_SEG43 and SDMMC1_CMD. |+| 55 | PB3 | bidirectional | 5 V-tolerant (FT_la) I/O that is configured as the JTDO-TRACESWO debug function after reset; other alternates include TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, LCD_SEG7 and SAI1_SCK_B, with COMP2_INM as an additional function. |+| 56 | PB4 | bidirectional | 5 V-tolerant (FT_fla) I/O that is configured as the NJTRST debug function with an internal pull-up enabled after reset; other alternates include I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, LCD_SEG8 and SAI1_MCLK_B. |+| 57 | PB5 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, LCD_SEG9, COMP2_OUT, SAI1_SD_B and TIM16_BKIN. |+| 58 | PB6 | bidirectional | 5 V-tolerant (FT_fa) I/O, Fm+ capable; alternates include LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B and TIM16_CH1N, with COMP2_INP as an additional function. |+| 59 | PB7 | bidirectional | 5 V-tolerant (FT_fla) I/O, Fm+ capable; alternates include LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4, LCD_SEG21 and EVENTOUT, with COMP2_INM and PVD_IN as additional functions. |+| 60 | PH3-BOOT0 | bidirectional | 5 V-tolerant (FT) I/O that is also the BOOT0 boot-mode selection pin. |+| 61 | PB8 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include I2C1_SCL, CAN1_RX, LCD_SEG16, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1. |+| 62 | PB9 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, LCD_COM3, SDMMC1_D5 and SAI1_FS_A. |+| 63 | VSS | power_in | Ground pin for the digital supply domain. |+| 64 | VDD | power_in | Standard digital supply, operating from 1.71 V to 3.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-64(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 64 |++## CAD (KiCad official)++- Symbol: `STM32L443RCT6TR`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `stm32l443rct6tr-etched.step` / `stm32l443rct6tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l443rct6tr.step` / `stm32l443rct6tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942171026165760) (220 pp, sha256 `ef8404b8405107f8`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32l443rct6tr-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32l443rct6tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32l443rct6tr.kicad_sym",+ "stm32l443rct6tr.kicad_mod",+ "stm32l443rct6tr.glb",+ "stm32l443rct6tr.step",+ "stm32l443rct6tr.lbr",+ "docs/hero.png",+ "docs/stm32l443rct6tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32l443rct6tr-hero.glb",+ "stm32l443rct6tr-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32L443RCT6TR",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-64(10x10)",+ "pin_count": 64,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942171026165760",+ "parts": {+ "symbol": "stm32l443rct6tr.kicad_sym",+ "footprint": "stm32l443rct6tr.kicad_mod",+ "model_3d": "stm32l443rct6tr-hero.glb",+ "model_3d_plain": "stm32l443rct6tr.glb",+ "model_3d_step": "stm32l443rct6tr-etched.step",+ "model_3d_step_plain": "stm32l443rct6tr.step",+ "lbr": "stm32l443rct6tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2055466",+ "digikey": "497-STM32L443RCT6TR-ND",+ "mouser": "511-STM32L443RCT6TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T19:21:06Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-STM32L443RCT6TR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32L443RCT6TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup-domain supply for the RTC and 32x32-bit backup registers, with a backup operating voltage of 1.55 V to 3.6 V."+ },+ {+ "number": "2",+ "name": "PC13",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O powered through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with 30 pF load and it must not source LED current; alternates include RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2 and EVENTOUT."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O on the power-switch supply with the same 3 mA and 2 MHz / 30 pF output limits, and serves as the 32 kHz LSE oscillator input OSC32_IN."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O on the power-switch supply with the same 3 mA and 2 MHz / 30 pF output limits, and serves as the 32 kHz LSE oscillator output OSC32_OUT."+ },+ {+ "number": "5",+ "name": "PH0-OSC_IN",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O that serves as the HSE oscillator input OSC_IN, with EVENTOUT as its alternate function."+ },+ {+ "number": "6",+ "name": "PH1-OSC_OUT",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O that serves as the HSE oscillator output OSC_OUT, with EVENTOUT as its alternate function."+ },+ {+ "number": "7",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with an embedded weak pull-up resistor."+ },+ {+ "number": "8",+ "name": "PC0",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fla) I/O with ADC1_IN1 analog input; alternates include LPTIM1_IN1, I2C3_SCL, LPUART1_RX, LCD_SEG18, LPTIM2_IN1 and EVENTOUT."+ },+ {+ "number": "9",+ "name": "PC1",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fla) I/O with ADC1_IN2 analog input; alternates include LPTIM1_OUT, I2C3_SDA, LPUART1_TX, LCD_SEG19 and EVENTOUT."+ },+ {+ "number": "10",+ "name": "PC2",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_la) I/O with ADC1_IN3 analog input; alternates include LPTIM1_IN2, SPI2_MISO, LCD_SEG20 and EVENTOUT."+ },+ {+ "number": "11",+ "name": "PC3",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_a) I/O with ADC1_IN4 analog input; alternates include LPTIM1_ETR, SPI2_MOSI, LCD_VLCD, SAI1_SD_A, LPTIM2_ETR and EVENTOUT."+ },+ {+ "number": "12",+ "name": "VSSA/VREF-",+ "type": "power_in",+ "description": "Analog ground for the analog blocks, which also serves as the ADC negative reference VREF- (connected to VSSA)."+ },+ {+ "number": "13",+ "name": "VDDA/VREF+",+ "type": "power_in",+ "description": "Analog supply of 1.62 V to 3.6 V when ADC or COMP is used, which also serves as the ADC positive reference VREF+ (2 V minimum when VDDA is 2 V or above)."+ },+ {+ "number": "14",+ "name": "PA0",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_a) I/O with OPAMP1_VINP, COMP1_INM, ADC1_IN5 and RTC_TAMP2/WKUP1 analog functions; digital alternates include TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK, TIM2_ETR and EVENTOUT."+ },+ {+ "number": "15",+ "name": "PA1",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_la) I/O with OPAMP1_VINM, COMP1_INP and ADC1_IN6 analog functions; alternates include TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, LCD_SEG0 and TIM15_CH1N."+ },+ {+ "number": "16",+ "name": "PA2",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_la) I/O with COMP2_INM, ADC1_IN7 and WKUP4/LSCO functions; alternates include TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG1, COMP2_OUT and TIM15_CH1."+ },+ {+ "number": "17",+ "name": "PA3",+ "type": "bidirectional",+ "description": "3.6 V-tolerant (TT_la) I/O with OPAMP1_VOUT, COMP2_INP and ADC1_IN8 analog functions; alternates include TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, LCD_SEG2, SAI1_MCLK_A and TIM15_CH2."+ },+ {+ "number": "18",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin for the digital supply domain."+ },+ {+ "number": "19",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard digital supply, operating from 1.71 V to 3.6 V."+ },+ {+ "number": "20",+ "name": "PA4",+ "type": "bidirectional",+ "description": "3.6 V-tolerant (TT_a) I/O with COMP1_INM, COMP2_INM, ADC1_IN9 and DAC1_OUT1 analog functions; alternates include SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B and LPTIM2_OUT."+ },+ {+ "number": "21",+ "name": "PA5",+ "type": "bidirectional",+ "description": "3.6 V-tolerant (TT_a) I/O with COMP1_INM, COMP2_INM, ADC1_IN10 and DAC1_OUT2 analog functions; alternates include TIM2_CH1, TIM2_ETR, SPI1_SCK and LPTIM2_ETR."+ },+ {+ "number": "22",+ "name": "PA6",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_la) I/O with ADC1_IN11 analog input; alternates include TIM1_BKIN, SPI1_MISO, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3, LCD_SEG3, COMP1_OUT/TIM1_BKIN_COMP2 and TIM16_CH1."+ },+ {+ "number": "23",+ "name": "PA7",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fla) I/O with ADC1_IN12 analog input; alternates include TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, LCD_SEG4 and COMP2_OUT."+ },+ {+ "number": "24",+ "name": "PC4",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_la) I/O with COMP1_INM and ADC1_IN13 analog functions; alternates include USART3_TX and LCD_SEG22."+ },+ {+ "number": "25",+ "name": "PC5",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_la) I/O with COMP1_INP, ADC1_IN14 and WKUP5 functions; alternates include USART3_RX and LCD_SEG23."+ },+ {+ "number": "26",+ "name": "PB0",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_la) I/O with ADC1_IN15 analog input; alternates include TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, LCD_SEG5, COMP1_OUT and SAI1_EXTCLK."+ },+ {+ "number": "27",+ "name": "PB1",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_la) I/O with COMP1_INM and ADC1_IN16 analog functions; alternates include TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LCD_SEG6 and LPTIM2_IN1."+ },+ {+ "number": "28",+ "name": "PB2",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_a) I/O with COMP1_INP analog function; alternates include RTC_OUT, LPTIM1_OUT, I2C3_SMBA, LCD_VLCD and EVENTOUT."+ },+ {+ "number": "29",+ "name": "PB10",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fl) I/O, Fm+ capable, with LCD function supplied by VLCD; alternates include TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, LCD_SEG10 and SAI1_SCK_A."+ },+ {+ "number": "30",+ "name": "PB11",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fl) I/O, Fm+ capable, with LCD function supplied by VLCD; alternates include TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG11 and COMP2_OUT."+ },+ {+ "number": "31",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin for the digital supply domain."+ },+ {+ "number": "32",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard digital supply, operating from 1.71 V to 3.6 V."+ },+ {+ "number": "33",+ "name": "PB12",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, LCD_SEG12, SWPMI1_IO, SAI1_FS_A and TIM15_BKIN."+ },+ {+ "number": "34",+ "name": "PB13",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, LCD_SEG13, SWPMI1_TX, SAI1_SCK_A and TIM15_CH1N."+ },+ {+ "number": "35",+ "name": "PB14",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, LCD_SEG14, SWPMI1_RX, SAI1_MCLK_A and TIM15_CH1."+ },+ {+ "number": "36",+ "name": "PB15",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, LCD_SEG15, SWPMI1_SUSPEND, SAI1_SD_A and TIM15_CH2."+ },+ {+ "number": "37",+ "name": "PC6",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO1, LCD_SEG24, SDMMC1_D6 and EVENTOUT."+ },+ {+ "number": "38",+ "name": "PC7",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO2, LCD_SEG25, SDMMC1_D7 and EVENTOUT."+ },+ {+ "number": "39",+ "name": "PC8",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO3, LCD_SEG26, SDMMC1_D0 and EVENTOUT."+ },+ {+ "number": "40",+ "name": "PC9",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO4, USB_NOE, LCD_SEG27, SDMMC1_D1 and EVENTOUT."+ },+ {+ "number": "41",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include MCO, TIM1_CH1, USART1_CK, LCD_COM0, SWPMI1_IO, SAI1_SCK_A and LPTIM2_OUT."+ },+ {+ "number": "42",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH2, I2C1_SCL, USART1_TX, LCD_COM1, SAI1_FS_A and TIM15_BKIN."+ },+ {+ "number": "43",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH3, I2C1_SDA, USART1_RX, USB_CRS_SYNC, LCD_COM2 and SAI1_SD_A."+ },+ {+ "number": "44",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternates include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS, CAN1_RX, USB_DM and TIM1_BKIN2_COMP1, with COMP1_OUT as an additional function."+ },+ {+ "number": "45",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternates include TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX and USB_DP."+ },+ {+ "number": "46",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O that is configured as the JTMS-SWDIO debug function after reset, with an internal pull-up enabled; other alternates include IR_OUT, USB_NOE, SWPMI1_TX and SAI1_SD_B."+ },+ {+ "number": "47",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin for the digital supply domain."+ },+ {+ "number": "48",+ "name": "VDDUSB",+ "type": "power_in",+ "description": "USB supply that must be 3.0 V to 3.6 V when the USB is used (may be tied to 0 V to 3.6 V when USB is not used)."+ },+ {+ "number": "49",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O that is configured as the JTCK-SWCLK debug function after reset, with an internal pull-down enabled; other alternates include LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX and SAI1_FS_B."+ },+ {+ "number": "50",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O that is configured as the JTDI debug function after reset, with an internal pull-up enabled; other alternates include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, TSC_G3_IO1 and LCD_SEG17."+ },+ {+ "number": "51",+ "name": "PC10",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include SPI3_SCK, USART3_TX, TSC_G3_IO2, LCD_COM4/LCD_SEG28/LCD_SEG40 and SDMMC1_D2."+ },+ {+ "number": "52",+ "name": "PC11",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include SPI3_MISO, USART3_RX, TSC_G3_IO3, LCD_COM5/LCD_SEG29/LCD_SEG41 and SDMMC1_D3."+ },+ {+ "number": "53",+ "name": "PC12",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include SPI3_MOSI, USART3_CK, TSC_G3_IO4, LCD_COM6/LCD_SEG30/LCD_SEG42 and SDMMC1_CK."+ },+ {+ "number": "54",+ "name": "PD2",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include USART3_RTS_DE, TSC_SYNC, LCD_COM7/LCD_SEG31/LCD_SEG43 and SDMMC1_CMD."+ },+ {+ "number": "55",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_la) I/O that is configured as the JTDO-TRACESWO debug function after reset; other alternates include TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, LCD_SEG7 and SAI1_SCK_B, with COMP2_INM as an additional function."+ },+ {+ "number": "56",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fla) I/O that is configured as the NJTRST debug function with an internal pull-up enabled after reset; other alternates include I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, LCD_SEG8 and SAI1_MCLK_B."+ },+ {+ "number": "57",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, LCD_SEG9, COMP2_OUT, SAI1_SD_B and TIM16_BKIN."+ },+ {+ "number": "58",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fa) I/O, Fm+ capable; alternates include LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B and TIM16_CH1N, with COMP2_INP as an additional function."+ },+ {+ "number": "59",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fla) I/O, Fm+ capable; alternates include LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4, LCD_SEG21 and EVENTOUT, with COMP2_INM and PVD_IN as additional functions."+ },+ {+ "number": "60",+ "name": "PH3-BOOT0",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT) I/O that is also the BOOT0 boot-mode selection pin."+ },+ {+ "number": "61",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include I2C1_SCL, CAN1_RX, LCD_SEG16, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1."+ },+ {+ "number": "62",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, LCD_COM3, SDMMC1_D5 and SAI1_FS_A."+ },+ {+ "number": "63",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin for the digital supply domain."+ },+ {+ "number": "64",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard digital supply, operating from 1.71 V to 3.6 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin mapping was taken from the LQFP64 column of Table 14 (pin definitions), not from the Figure 8 LQ; The name of pin 48 is printed in the table as 'VDD USB' split across a line break. It is recorded as; Pins 12 and 13 are shared with the reference function (VSSA/VREF- and VDDA/VREF+). The package name "+ ],+ "pages_sent": 83,+ "cost_usd": 0.3913,+ "at": "2026-10-08T19:20:08"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942171026165760",+ "pages": 220,+ "sha256": "ef8404b8405107f8",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 64,+ "described": 64,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32l443rct6tr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32l443rct6tr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "55ddc003b5059e4c949fbec88ce276370cdead22cdca0e332001bc4889b5193d",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}