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STM32L443RCT6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L443RCT6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32L443RCT6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply for the RTC and 32x32-bit backup registers, with a backup operating voltage of 1.55 V to 3.6 V. |
| 2 | PC13 | bidirectional | 5 V-tolerant (FT) I/O powered through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with 30 pF load and it must not source LED current; alternates include RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2 and EVENTOUT. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V-tolerant (FT) I/O on the power-switch supply with the same 3 mA and 2 MHz / 30 pF output limits, and serves as the 32 kHz LSE oscillator input OSC32_IN. |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant (FT) I/O on the power-switch supply with the same 3 mA and 2 MHz / 30 pF output limits, and serves as the 32 kHz LSE oscillator output OSC32_OUT. |
| 5 | PH0-OSC_IN | bidirectional | 5 V-tolerant (FT) I/O that serves as the HSE oscillator input OSC_IN, with EVENTOUT as its alternate function. |
| 6 | PH1-OSC_OUT | bidirectional | 5 V-tolerant (FT) I/O that serves as the HSE oscillator output OSC_OUT, with EVENTOUT as its alternate function. |
| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |
| 8 | PC0 | bidirectional | 5 V-tolerant (FT_fla) I/O with ADC1_IN1 analog input; alternates include LPTIM1_IN1, I2C3_SCL, LPUART1_RX, LCD_SEG18, LPTIM2_IN1 and EVENTOUT. |
| 9 | PC1 | bidirectional | 5 V-tolerant (FT_fla) I/O with ADC1_IN2 analog input; alternates include LPTIM1_OUT, I2C3_SDA, LPUART1_TX, LCD_SEG19 and EVENTOUT. |
| 10 | PC2 | bidirectional | 5 V-tolerant (FT_la) I/O with ADC1_IN3 analog input; alternates include LPTIM1_IN2, SPI2_MISO, LCD_SEG20 and EVENTOUT. |
| 11 | PC3 | bidirectional | 5 V-tolerant (FT_a) I/O with ADC1_IN4 analog input; alternates include LPTIM1_ETR, SPI2_MOSI, LCD_VLCD, SAI1_SD_A, LPTIM2_ETR and EVENTOUT. |
| 12 | VSSA/VREF- | power_in | Analog ground for the analog blocks, which also serves as the ADC negative reference VREF- (connected to VSSA). |
| 13 | VDDA/VREF+ | power_in | Analog supply of 1.62 V to 3.6 V when ADC or COMP is used, which also serves as the ADC positive reference VREF+ (2 V minimum when VDDA is 2 V or above). |
| 14 | PA0 | bidirectional | 5 V-tolerant (FT_a) I/O with OPAMP1_VINP, COMP1_INM, ADC1_IN5 and RTC_TAMP2/WKUP1 analog functions; digital alternates include TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK, TIM2_ETR and EVENTOUT. |
| 15 | PA1 | bidirectional | 5 V-tolerant (FT_la) I/O with OPAMP1_VINM, COMP1_INP and ADC1_IN6 analog functions; alternates include TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, LCD_SEG0 and TIM15_CH1N. |
| 16 | PA2 | bidirectional | 5 V-tolerant (FT_la) I/O with COMP2_INM, ADC1_IN7 and WKUP4/LSCO functions; alternates include TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG1, COMP2_OUT and TIM15_CH1. |
| 17 | PA3 | bidirectional | 3.6 V-tolerant (TT_la) I/O with OPAMP1_VOUT, COMP2_INP and ADC1_IN8 analog functions; alternates include TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, LCD_SEG2, SAI1_MCLK_A and TIM15_CH2. |
| 18 | VSS | power_in | Ground pin for the digital supply domain. |
| 19 | VDD | power_in | Standard digital supply, operating from 1.71 V to 3.6 V. |
| 20 | PA4 | bidirectional | 3.6 V-tolerant (TT_a) I/O with COMP1_INM, COMP2_INM, ADC1_IN9 and DAC1_OUT1 analog functions; alternates include SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B and LPTIM2_OUT. |
| 21 | PA5 | bidirectional | 3.6 V-tolerant (TT_a) I/O with COMP1_INM, COMP2_INM, ADC1_IN10 and DAC1_OUT2 analog functions; alternates include TIM2_CH1, TIM2_ETR, SPI1_SCK and LPTIM2_ETR. |
| 22 | PA6 | bidirectional | 5 V-tolerant (FT_la) I/O with ADC1_IN11 analog input; alternates include TIM1_BKIN, SPI1_MISO, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3, LCD_SEG3, COMP1_OUT/TIM1_BKIN_COMP2 and TIM16_CH1. |
| 23 | PA7 | bidirectional | 5 V-tolerant (FT_fla) I/O with ADC1_IN12 analog input; alternates include TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, LCD_SEG4 and COMP2_OUT. |
| 24 | PC4 | bidirectional | 5 V-tolerant (FT_la) I/O with COMP1_INM and ADC1_IN13 analog functions; alternates include USART3_TX and LCD_SEG22. |
| 25 | PC5 | bidirectional | 5 V-tolerant (FT_la) I/O with COMP1_INP, ADC1_IN14 and WKUP5 functions; alternates include USART3_RX and LCD_SEG23. |
| 26 | PB0 | bidirectional | 5 V-tolerant (FT_la) I/O with ADC1_IN15 analog input; alternates include TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, LCD_SEG5, COMP1_OUT and SAI1_EXTCLK. |
| 27 | PB1 | bidirectional | 5 V-tolerant (FT_la) I/O with COMP1_INM and ADC1_IN16 analog functions; alternates include TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LCD_SEG6 and LPTIM2_IN1. |
| 28 | PB2 | bidirectional | 5 V-tolerant (FT_a) I/O with COMP1_INP analog function; alternates include RTC_OUT, LPTIM1_OUT, I2C3_SMBA, LCD_VLCD and EVENTOUT. |
| 29 | PB10 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable, with LCD function supplied by VLCD; alternates include TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, LCD_SEG10 and SAI1_SCK_A. |
| 30 | PB11 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable, with LCD function supplied by VLCD; alternates include TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG11 and COMP2_OUT. |
| 31 | VSS | power_in | Ground pin for the digital supply domain. |
| 32 | VDD | power_in | Standard digital supply, operating from 1.71 V to 3.6 V. |
| 33 | PB12 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, LCD_SEG12, SWPMI1_IO, SAI1_FS_A and TIM15_BKIN. |
| 34 | PB13 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, LCD_SEG13, SWPMI1_TX, SAI1_SCK_A and TIM15_CH1N. |
| 35 | PB14 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, LCD_SEG14, SWPMI1_RX, SAI1_MCLK_A and TIM15_CH1. |
| 36 | PB15 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, LCD_SEG15, SWPMI1_SUSPEND, SAI1_SD_A and TIM15_CH2. |
| 37 | PC6 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO1, LCD_SEG24, SDMMC1_D6 and EVENTOUT. |
| 38 | PC7 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO2, LCD_SEG25, SDMMC1_D7 and EVENTOUT. |
| 39 | PC8 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO3, LCD_SEG26, SDMMC1_D0 and EVENTOUT. |
| 40 | PC9 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include TSC_G4_IO4, USB_NOE, LCD_SEG27, SDMMC1_D1 and EVENTOUT. |
| 41 | PA8 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include MCO, TIM1_CH1, USART1_CK, LCD_COM0, SWPMI1_IO, SAI1_SCK_A and LPTIM2_OUT. |
| 42 | PA9 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH2, I2C1_SCL, USART1_TX, LCD_COM1, SAI1_FS_A and TIM15_BKIN. |
| 43 | PA10 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include TIM1_CH3, I2C1_SDA, USART1_RX, USB_CRS_SYNC, LCD_COM2 and SAI1_SD_A. |
| 44 | PA11 | bidirectional | 5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternates include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS, CAN1_RX, USB_DM and TIM1_BKIN2_COMP1, with COMP1_OUT as an additional function. |
| 45 | PA12 | bidirectional | 5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternates include TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX and USB_DP. |
| 46 | PA13 | bidirectional | 5 V-tolerant (FT) I/O that is configured as the JTMS-SWDIO debug function after reset, with an internal pull-up enabled; other alternates include IR_OUT, USB_NOE, SWPMI1_TX and SAI1_SD_B. |
| 47 | VSS | power_in | Ground pin for the digital supply domain. |
| 48 | VDDUSB | power_in | USB supply that must be 3.0 V to 3.6 V when the USB is used (may be tied to 0 V to 3.6 V when USB is not used). |
| 49 | PA14 | bidirectional | 5 V-tolerant (FT) I/O that is configured as the JTCK-SWCLK debug function after reset, with an internal pull-down enabled; other alternates include LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX and SAI1_FS_B. |
| 50 | PA15 | bidirectional | 5 V-tolerant (FT_l) I/O that is configured as the JTDI debug function after reset, with an internal pull-up enabled; other alternates include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, TSC_G3_IO1 and LCD_SEG17. |
| 51 | PC10 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include SPI3_SCK, USART3_TX, TSC_G3_IO2, LCD_COM4/LCD_SEG28/LCD_SEG40 and SDMMC1_D2. |
| 52 | PC11 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include SPI3_MISO, USART3_RX, TSC_G3_IO3, LCD_COM5/LCD_SEG29/LCD_SEG41 and SDMMC1_D3. |
| 53 | PC12 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include SPI3_MOSI, USART3_CK, TSC_G3_IO4, LCD_COM6/LCD_SEG30/LCD_SEG42 and SDMMC1_CK. |
| 54 | PD2 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include USART3_RTS_DE, TSC_SYNC, LCD_COM7/LCD_SEG31/LCD_SEG43 and SDMMC1_CMD. |
| 55 | PB3 | bidirectional | 5 V-tolerant (FT_la) I/O that is configured as the JTDO-TRACESWO debug function after reset; other alternates include TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, LCD_SEG7 and SAI1_SCK_B, with COMP2_INM as an additional function. |
| 56 | PB4 | bidirectional | 5 V-tolerant (FT_fla) I/O that is configured as the NJTRST debug function with an internal pull-up enabled after reset; other alternates include I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, LCD_SEG8 and SAI1_MCLK_B. |
| 57 | PB5 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternates include LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, LCD_SEG9, COMP2_OUT, SAI1_SD_B and TIM16_BKIN. |
| 58 | PB6 | bidirectional | 5 V-tolerant (FT_fa) I/O, Fm+ capable; alternates include LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, SAI1_FS_B and TIM16_CH1N, with COMP2_INP as an additional function. |
| 59 | PB7 | bidirectional | 5 V-tolerant (FT_fla) I/O, Fm+ capable; alternates include LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4, LCD_SEG21 and EVENTOUT, with COMP2_INM and PVD_IN as additional functions. |
| 60 | PH3-BOOT0 | bidirectional | 5 V-tolerant (FT) I/O that is also the BOOT0 boot-mode selection pin. |
| 61 | PB8 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include I2C1_SCL, CAN1_RX, LCD_SEG16, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1. |
| 62 | PB9 | bidirectional | 5 V-tolerant (FT_fl) I/O, Fm+ capable; alternates include IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, LCD_COM3, SDMMC1_D5 and SAI1_FS_A. |
| 63 | VSS | power_in | Ground pin for the digital supply domain. |
| 64 | VDD | power_in | Standard digital supply, operating from 1.71 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L443RCT6TR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32l443rct6tr-etched.step/stm32l443rct6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l443rct6tr.step/stm32l443rct6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (220 pp, sha256
ef8404b8405107f8, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).