component
STM32L433RCT3
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSTM32L433RCT3
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32L433RCT3 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Battery supply voltage input pin supporting RTC, backup registers, and VBAT mode operation from 1.55 V to 3.6 V. |
| 2 | PC13 | bidirectional | Port C pin 13, 5V-tolerant general purpose I/O with RTC tamper/timestamp/alarm and wakeup capability, subject to 3 mA sink current limitation. |
| 3 | PC14-OSC32_IN (PC14) | bidirectional | Port C pin 14 / 32 kHz oscillator input, 5V-tolerant I/O pin that can be configured as oscillator crystal input or general purpose I/O. |
| 4 | PC15-OSC32_OUT (PC15) | bidirectional | Port C pin 15 / 32 kHz oscillator output, 5V-tolerant I/O pin that can be configured as oscillator crystal output or general purpose I/O. |
| 5 | PH0-OSC_IN (PH0) | bidirectional | Port H pin 0 / Main oscillator input, 5V-tolerant I/O pin for external crystal oscillator or external clock input (4 to 48 MHz). |
| 6 | PH1-OSC_OUT (PH1) | bidirectional | Port H pin 1 / Main oscillator output, 5V-tolerant I/O pin for external crystal oscillator feedback path. |
| 7 | NRST | input | System reset input pin with embedded weak pull-up resistor, reset is asserted when pin is pulled low; active low reset. |
| 8 | PC0 | bidirectional | Port C pin 0, 5V-tolerant I/O with analog function capability, can be used for ADC channel 1, LPTIM1/LPTIM2 input or LCD segment. |
| 9 | PC1 | bidirectional | Port C pin 1, 5V-tolerant I/O with analog function capability, can be used for ADC channel 2, LPTIM1 output or LCD segment. |
| 10 | PC2 | bidirectional | Port C pin 2, 5V-tolerant I/O with analog function capability, can be used for ADC channel 3, LPTIM1 input or LCD segment. |
| 11 | PC3 | bidirectional | Port C pin 3, 5V-tolerant I/O with analog functions including ADC channel 4, LPTIM1 ETR, SPI2_MOSI, SAI1_SD_A or LCD_VLCD. |
| 12 | VSSA/VREF- | power_in | Analog ground supply and negative analog voltage reference pin; must be connected to ground with adequate bypassing. |
| 13 | VDDA/VREF+ | power_in | Analog supply voltage and positive reference pin for ADC/DAC/OPAMP/COMP from 1.62 V to 3.6 V; must be bypassed with 100 nF ceramic capacitor. |
| 14 | PA0 | bidirectional | Port A pin 0, 5V-tolerant I/O with analog functions including ADC channel 5, OPAMP1 non-inverting input, COMP1 input and RTC wakeup. |
| 15 | PA1 | bidirectional | Port A pin 1, 5V-tolerant I/O with LCD segment function, can be used for TIM2_CH2, I2C1_SMBA, SPI1_SCK or ADC channel 6. |
| 16 | PA2 | bidirectional | Port A pin 2, 5V-tolerant I/O with analog capability, supports USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG1 and ADC channel 7. |
| 17 | PA3 | bidirectional | Port A pin 3, 3.3V-tolerant I/O with analog capability, can be used for ADC channel 8, OPAMP1 output, COMP2 input or SAI1_MCLK_A. |
| 18 | VSS | power_in | Ground pin providing return path for all currents; must be connected to system ground. |
| 19 | VDD | power_in | Main power supply pin (1.71 V to 3.6 V) for core logic; must be bypassed with 100 nF ceramic capacitor close to pin. |
| 20 | PA4 | bidirectional | Port A pin 4, 3.3V-tolerant I/O with analog capability, supports DAC1_OUT1, COMP1/COMP2 input, ADC channel 9 or LPTIM2_OUT. |
| 21 | PA5 | bidirectional | Port A pin 5, 3.3V-tolerant I/O with analog capability, supports DAC1_OUT2, COMP1/COMP2 input, ADC channel 10 or SPI1_SCK. |
| 22 | PA6 | bidirectional | Port A pin 6, 5V-tolerant I/O with analog function capability, can be used for ADC channel 11, COMP1 output, TIM1_BKIN or LPUART1_CTS. |
| 23 | PA7 | bidirectional | Port A pin 7, 5V-tolerant I/O with analog function capability, can be used for ADC channel 12, COMP2 output, TIM1_CH1N or SPI1_MOSI. |
| 24 | PC4 | bidirectional | Port C pin 4, 5V-tolerant I/O with analog capability, can be used for ADC channel 13, COMP1 input or LCD_SEG22. |
| 25 | PC5 | bidirectional | Port C pin 5, 5V-tolerant I/O with analog capability, can be used for ADC channel 14, COMP1 input or LCD_SEG23 with RTC wakeup. |
| 26 | PB0 | bidirectional | Port B pin 0, 5V-tolerant I/O with analog capability, supports ADC channel 15, COMP1 output, TIM1_CH2N or QUADSPI_BK1_IO1. |
| 27 | PB1 | bidirectional | Port B pin 1, 5V-tolerant I/O with analog capability, supports ADC channel 16, COMP1 input, TIM1_CH3N or QUADSPI_BK1_IO0. |
| 28 | PB2 | bidirectional | Port B pin 2, 5V-tolerant I/O with analog functions, supports RTC_OUT, LPTIM1_OUT, COMP1 input or LCD_VLCD function. |
| 29 | PB10 | bidirectional | Port B pin 10, 5V-tolerant I/O with LCD function and SAI capability, supports TIM2_CH3, I2C2_SCL, USART3_TX or COMP1 output. |
| 30 | PB11 | bidirectional | Port B pin 11, 5V-tolerant I/O with LCD function, supports TIM2_CH4, I2C2_SDA, USART3_RX or COMP2 output. |
| 31 | VSS | power_in | Ground pin providing return path for all currents; must be connected to system ground. |
| 32 | VDD | power_in | Main power supply pin (1.71 V to 3.6 V) for core logic; must be bypassed with 100 nF ceramic capacitor close to pin. |
| 33 | PB12 | bidirectional | Port B pin 12, 5V-tolerant I/O with LCD function, supports TIM1_BKIN, SPI2_NSS, USART3_CK, TSC_G1_IO1 or SAI1_FS_A. |
| 34 | PB13 | bidirectional | Port B pin 13, 5V-tolerant I/O with LCD function, supports TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS or SAI1_SCK_A. |
| 35 | PB14 | bidirectional | Port B pin 14, 5V-tolerant I/O with LCD function, supports TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE or SAI1_MCLK_A. |
| 36 | PB15 | bidirectional | Port B pin 15, 5V-tolerant I/O with LCD function, supports RTC_REFIN, TIM1_CH3N, SPI2_MOSI or SAI1_SD_A. |
| 37 | PC6 | bidirectional | Port C pin 6, 5V-tolerant I/O with LCD function, supports TSC_G4_IO1, LCD_SEG24 or SDMMC1_D6. |
| 38 | PC7 | bidirectional | Port C pin 7, 5V-tolerant I/O with LCD function, supports TSC_G4_IO2, LCD_SEG25 or SDMMC1_D7. |
| 39 | PC8 | bidirectional | Port C pin 8, 5V-tolerant I/O with LCD function, supports TSC_G4_IO3, LCD_SEG26 or SDMMC1_D0. |
| 40 | PC9 | bidirectional | Port C pin 9, 5V-tolerant I/O with LCD function, supports TSC_G4_IO4, USB_NOE, LCD_SEG27 or SDMMC1_D1. |
| 41 | PA8 | bidirectional | Port A pin 8, 5V-tolerant I/O with LCD function, supports MCO, TIM1_CH1, USART1_CK, LCD_COM0 or SAI1_SCK_A. |
| 42 | PA9 | bidirectional | Port A pin 9, 5V-tolerant I/O with LCD and SAI functions, supports TIM1_CH2, I2C1_SCL, USART1_TX or LCD_COM1. |
| 43 | PA10 | bidirectional | Port A pin 10, 5V-tolerant I/O with LCD and SAI functions, supports TIM1_CH3, I2C1_SDA, USART1_RX or LCD_COM2. |
| 44 | PA11 | bidirectional | Port A pin 11, 5V-tolerant I/O with USB function, supports TIM1_CH4, SPI1_MISO, COMP1 output, USART1_CTS, CAN1_RX or USB_DM. |
| 45 | PA12 | bidirectional | Port A pin 12, 5V-tolerant I/O with USB function, supports TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX or USB_DP. |
| 46 | PA13 (JTMS-SWDIO) | bidirectional | Port A pin 13 / JTAG TMS / SWD I/O, 5V-tolerant debug pin with internal pull-up; supports JTMS-SWDIO, IR_OUT, USB_NOE or SWPMI1_TX. |
| 47 | VSS | power_in | Ground pin providing return path for all currents; must be connected to system ground. |
| 48 | VDDUSB | power_in | |
| 49 | PA14 (JTCK-SWCLK) | bidirectional | Port A pin 14 / JTAG TCK / SWD CLK, 5V-tolerant debug pin with internal pull-down; supports JTCK-SWCLK, LPTIM1_OUT, I2C1_SMBA or SWPMI1_RX. |
| 50 | PA15 (JTDI) | bidirectional | Port A pin 15 / JTAG TDI, 5V-tolerant I/O with LCD function and debug capability; supports JTDI, TIM2_CH1, USART2_RX, SPI1_NSS or TSC_G3_IO1. |
| 51 | PC10 | bidirectional | Port C pin 10, 5V-tolerant I/O with LCD function, supports SPI3_SCK, USART3_TX, TSC_G3_IO2 or SDMMC1_D2. |
| 52 | PC11 | bidirectional | Port C pin 11, 5V-tolerant I/O with LCD function, supports SPI3_MISO, USART3_RX, TSC_G3_IO3 or SDMMC1_D3. |
| 53 | PC12 | bidirectional | Port C pin 12, 5V-tolerant I/O with LCD function, supports SPI3_MOSI, USART3_CK, TSC_G3_IO4 or SDMMC1_CK. |
| 54 | PD2 | bidirectional | Port D pin 2, 5V-tolerant I/O with LCD function, supports USART3_RTS_DE, TSC_SYNC, LCD_COM7/LCD_SEG31/LCD_SEG43 or SDMMC1_CMD. |
| 55 | PB3 (JTDO-TRACESWO) | bidirectional | Port B pin 3 / JTAG TDO / TRACE SWO, 5V-tolerant I/O with analog and LCD functions; supports JTDO-TRACESWO, TIM2_CH2, SPI1_SCK, USART1_RTS_DE or SAI1_SCK_B. |
| 56 | PB4 (NJTRST) | bidirectional | Port B pin 4 / JTAG NTRST, 5V-tolerant I/O with analog and LCD functions; supports NJTRST, I2C3_SDA, SPI1_MISO, USART1_CTS or TSC_G2_IO1. |
| 57 | PB5 | bidirectional | Port B pin 5, 5V-tolerant I/O with LCD function, supports LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, USART1_CK or TSC_G2_IO2. |
| 58 | PB6 | bidirectional | Port B pin 6, 5V-tolerant I/O with analog function, supports LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3 or SAI1_FS_B. |
| 59 | PB7 | bidirectional | Port B pin 7, 5V-tolerant I/O with analog function, supports LPTIM1_IN2, I2C1_SDA, USART1_RX or TSC_G2_IO4 with PVD_IN analog input. |
| 60 | PH3-BOOT0 | bidirectional | Port H pin 3 / Boot configuration pin, general purpose I/O for selecting boot mode (from flash, RAM or system memory) during power-up. |
| 61 | PB8 | bidirectional | Port B pin 8, 5V-tolerant I/O with LCD and SAI functions, supports I2C1_SCL, CAN1_RX, LCD_SEG16, SDMMC1_D4 or SAI1_MCLK_A. |
| 62 | PB9 | bidirectional | Port B pin 9, 5V-tolerant I/O with LCD and SAI functions, supports IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, LCD_COM3 or SDMMC1_D5. |
| 63 | VSS | power_in | Ground pin providing return path for all currents; must be connected to system ground. |
| 64 | VDD | power_in | Main power supply pin (1.71 V to 3.6 V) for core logic; must be bypassed with 100 nF ceramic capacitor close to pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L433RCT3 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32l433rct3-etched.step/stm32l433rct3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l433rct3.step/stm32l433rct3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (227 pp, sha256
471e1cceea40b1fa, retrieved 2026-09-29, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).