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STM32L433CBT7
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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STM32L433CBT7
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32L433CBT7 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply for the RTC and backup registers, specified at 1.55 V to 3.6 V (Table 22), with RTC_TAMP3/WKUP3 as an additional function. |
| 2 | PC13 | bidirectional | 5 V-tolerant (FT) I/O supplied through the power switch, limited to 3 mA so output speed must not exceed 2 MHz at 30 pF and the pin must not source LED-type loads; additional functions are RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V-tolerant (FT) I/O supplied through the power switch with the same 3 mA limit and 2 MHz / 30 pF output restriction, and it carries the OSC32_IN (32 kHz crystal) function. |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant (FT) I/O supplied through the power switch with the same 3 mA limit and 2 MHz / 30 pF output restriction, and it carries the OSC32_OUT (32 kHz crystal) function. |
| 5 | PH0-OSC_IN | bidirectional | 5 V-tolerant (FT) I/O that also serves as OSC_IN, the external high-speed oscillator input (4 to 48 MHz crystal per the features list). |
| 6 | PH1-OSC_OUT | bidirectional | 5 V-tolerant (FT) I/O that also serves as OSC_OUT, the external high-speed oscillator output (4 to 48 MHz crystal per the features list). |
| 7 | NRST | bidirectional | Bidirectional active-low reset pin with an embedded weak pull-up resistor (type RST in Table 14/15). |
| 8 | VSSA/VREF- | power_in | Analog ground and negative ADC reference; per the ADC note, VREF- can be internally connected to VSSA depending on the package. |
| 9 | VDDA/VREF+ | power_in | Analog supply input (VDDA 1.62 V to 3.6 V when ADC or COMP is used, 1.8 V for DAC or OPAMP, 2.4 V for VREFBUF per Table 22) that also acts as VREF+, internally connected to VDDA depending on the package. |
| 10 | PA0 | bidirectional | 5 V-tolerant (FT_a) I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK and TIM2_ETR, and additional functions include OPAMP1_VINP, ADC1_IN5 and WKUP1. |
| 11 | PA1 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE and LCD_SEG0, and additional functions include OPAMP1_VINM, COMP1_INP and ADC1_IN6. |
| 12 | PA2 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS and COMP2_OUT, and additional functions include COMP2_INM, ADC1_IN7 and WKUP4/LSCO. |
| 13 | PA3 | bidirectional | 3.6 V-tolerant (TT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK and SAI1_MCLK_A, and additional functions include OPAMP1_VOUT, COMP2_INP and ADC1_IN8. |
| 14 | PA4 | bidirectional | 3.6 V-tolerant (TT_a) I/O with analog switch supplied by VDDA; alternate functions include SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B and LPTIM2_OUT, and additional functions include COMP1_INM, COMP2_INM, ADC1_IN9 and DAC1_OUT1. |
| 15 | PA5 | bidirectional | 3.6 V-tolerant (TT_a) I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH1, TIM2_ETR, SPI1_SCK and LPTIM2_ETR, and additional functions include COMP1_INM, COMP2_INM, ADC1_IN10 and DAC1_OUT2. |
| 16 | PA6 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, LPUART1_CTS and QUADSPI_BK1_IO3, and additional function is ADC1_IN11. |
| 17 | PA7 | bidirectional | 5 V-tolerant (FT_fla) I/O with Fm+ capability, LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2 and COMP2_OUT, and additional function is ADC1_IN12. |
| 18 | PB0 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1 and COMP1_OUT, and additional function is ADC1_IN15. |
| 19 | PB1 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0 and LPTIM2_IN1, and additional functions include COMP1_INM and ADC1_IN16. |
| 20 | PB2 | bidirectional | 5 V-tolerant (FT_a) I/O with analog switch supplied by VDDA; alternate functions include RTC_OUT, LPTIM1_OUT, I2C3_SMBA and LCD_VLCD, and additional function is COMP1_INP. |
| 21 | PB10 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK and SAI1_SCK_A. |
| 22 | PB11 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS and COMP2_OUT. |
| 23 | VSS | power_in | Digital ground reference. |
| 24 | VDD | power_in | Digital supply input; standard operating voltage range is 1.71 V to 3.6 V (Table 22). |
| 25 | PB12 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternate functions include TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, SWPMI1_IO, SAI1_FS_A and TIM15_BKIN. |
| 26 | PB13 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, SWPMI1_TX, SAI1_SCK_A and TIM15_CH1N. |
| 27 | PB14 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, SWPMI1_RX, SAI1_MCLK_A and TIM15_CH1. |
| 28 | PB15 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternate functions include RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, SWPMI1_SUSPEND, SAI1_SD_A and TIM15_CH2. |
| 29 | PA8 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternate functions include MCO, TIM1_CH1, USART1_CK, LCD_COM0, SWPMI1_IO, SAI1_SCK_A and LPTIM2_OUT. |
| 30 | PA9 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH2, I2C1_SCL, USART1_TX, LCD_COM1, SAI1_FS_A and TIM15_BKIN. |
| 31 | PA10 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH3, I2C1_SDA, USART1_RX, USB_CRS_SYNC, LCD_COM2 and SAI1_SD_A. |
| 32 | PA11 | bidirectional | 5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, CAN1_RX and USB_DM. |
| 33 | PA12 | bidirectional | 5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternate functions include TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX and USB_DP. |
| 34 | PA13 (JTMS-SWDIO) | bidirectional | 5 V-tolerant (FT) I/O that after reset is configured as the JTMS-SWDIO debug function with its internal pull-up enabled; alternate functions include IR_OUT, USB_NOE, SWPMI1_TX and SAI1_SD_B. |
| 35 | VSS | power_in | Digital ground reference. |
| 36 | VDDUSB | power_in | USB supply input; 3.0 V to 3.6 V when USB is used, and 0 to 3.6 V when USB is not used (Table 22). |
| 37 | PA14 (JTCK-SWCLK) | bidirectional | 5 V-tolerant (FT) I/O that after reset is configured as the JTCK-SWCLK debug function with its internal pull-down enabled; alternate functions include LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX and SAI1_FS_B. |
| 38 | PA15 (JTDI) | bidirectional | 5 V-tolerant (FT_l) I/O that after reset is configured as the JTDI debug function with its internal pull-up enabled; alternate functions include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS_DE and TSC_G3_IO1. |
| 39 | PB3 (JTDO-TRACESWO) | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; after reset it is configured as the JTDO-TRACESWO debug function, with alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK and USART1_RTS_DE, and additional function COMP2_INM. |
| 40 | PB4 (NJTRST) | bidirectional | 5 V-tolerant (FT_fla) I/O with Fm+ capability, LCD function supplied by VLCD and analog switch supplied by VDDA; after reset it is configured as the NJTRST debug function with its internal pull-up enabled, with alternate functions I2C3_SDA, SPI1_MISO, SPI3_MISO and USART1_CTS, and additional function COMP2_INP. |
| 41 | PB5 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternate functions include LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, COMP2_OUT, SAI1_SD_B and TIM16_BKIN. |
| 42 | PB6 | bidirectional | 5 V-tolerant (FT_fa) I/O with Fm+ capability and analog switch supplied by VDDA; alternate functions include LPTIM1_ETR, I2C1_SCL, USART1_TX, SAI1_FS_B and TIM16_CH1N, and additional function is COMP2_INP. |
| 43 | PB7 | bidirectional | 5 V-tolerant (FT_fla) I/O with Fm+ capability, LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include LPTIM1_IN2, I2C1_SDA, USART1_RX and LCD_SEG21, and additional functions include COMP2_INM and PVD_IN. |
| 44 | PH3-BOOT0 | bidirectional | I/O pin carrying the BOOT0 boot-selection function; Table 15 lists no I/O structure for it and only EVENTOUT as an alternate function. |
| 45 | PB8 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include I2C1_SCL, CAN1_RX, LCD_SEG16, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1. |
| 46 | PB9 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, LCD_COM3, SDMMC1_D5 and SAI1_FS_A. |
| 47 | VSS | power_in | Digital ground reference. |
| 48 | VDD | power_in | Digital supply input; standard operating voltage range is 1.71 V to 3.6 V (Table 22). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32L433CBT7 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32l433cbt7-etched.step/stm32l433cbt7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l433cbt7.step/stm32l433cbt7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (227 pp, sha256
471e1cceea40b1fa, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM32L433CBT7
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32L433CBT7 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply for the RTC and backup registers, specified at 1.55 V to 3.6 V (Table 22), with RTC_TAMP3/WKUP3 as an additional function. |
| 2 | PC13 | bidirectional | 5 V-tolerant (FT) I/O supplied through the power switch, limited to 3 mA so output speed must not exceed 2 MHz at 30 pF and the pin must not source LED-type loads; additional functions are RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V-tolerant (FT) I/O supplied through the power switch with the same 3 mA limit and 2 MHz / 30 pF output restriction, and it carries the OSC32_IN (32 kHz crystal) function. |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant (FT) I/O supplied through the power switch with the same 3 mA limit and 2 MHz / 30 pF output restriction, and it carries the OSC32_OUT (32 kHz crystal) function. |
| 5 | PH0-OSC_IN | bidirectional | 5 V-tolerant (FT) I/O that also serves as OSC_IN, the external high-speed oscillator input (4 to 48 MHz crystal per the features list). |
| 6 | PH1-OSC_OUT | bidirectional | 5 V-tolerant (FT) I/O that also serves as OSC_OUT, the external high-speed oscillator output (4 to 48 MHz crystal per the features list). |
| 7 | NRST | bidirectional | Bidirectional active-low reset pin with an embedded weak pull-up resistor (type RST in Table 14/15). |
| 8 | VSSA/VREF- | power_in | Analog ground and negative ADC reference; per the ADC note, VREF- can be internally connected to VSSA depending on the package. |
| 9 | VDDA/VREF+ | power_in | Analog supply input (VDDA 1.62 V to 3.6 V when ADC or COMP is used, 1.8 V for DAC or OPAMP, 2.4 V for VREFBUF per Table 22) that also acts as VREF+, internally connected to VDDA depending on the package. |
| 10 | PA0 | bidirectional | 5 V-tolerant (FT_a) I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK and TIM2_ETR, and additional functions include OPAMP1_VINP, ADC1_IN5 and WKUP1. |
| 11 | PA1 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE and LCD_SEG0, and additional functions include OPAMP1_VINM, COMP1_INP and ADC1_IN6. |
| 12 | PA2 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS and COMP2_OUT, and additional functions include COMP2_INM, ADC1_IN7 and WKUP4/LSCO. |
| 13 | PA3 | bidirectional | 3.6 V-tolerant (TT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK and SAI1_MCLK_A, and additional functions include OPAMP1_VOUT, COMP2_INP and ADC1_IN8. |
| 14 | PA4 | bidirectional | 3.6 V-tolerant (TT_a) I/O with analog switch supplied by VDDA; alternate functions include SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B and LPTIM2_OUT, and additional functions include COMP1_INM, COMP2_INM, ADC1_IN9 and DAC1_OUT1. |
| 15 | PA5 | bidirectional | 3.6 V-tolerant (TT_a) I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH1, TIM2_ETR, SPI1_SCK and LPTIM2_ETR, and additional functions include COMP1_INM, COMP2_INM, ADC1_IN10 and DAC1_OUT2. |
| 16 | PA6 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, LPUART1_CTS and QUADSPI_BK1_IO3, and additional function is ADC1_IN11. |
| 17 | PA7 | bidirectional | 5 V-tolerant (FT_fla) I/O with Fm+ capability, LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2 and COMP2_OUT, and additional function is ADC1_IN12. |
| 18 | PB0 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1 and COMP1_OUT, and additional function is ADC1_IN15. |
| 19 | PB1 | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0 and LPTIM2_IN1, and additional functions include COMP1_INM and ADC1_IN16. |
| 20 | PB2 | bidirectional | 5 V-tolerant (FT_a) I/O with analog switch supplied by VDDA; alternate functions include RTC_OUT, LPTIM1_OUT, I2C3_SMBA and LCD_VLCD, and additional function is COMP1_INP. |
| 21 | PB10 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK and SAI1_SCK_A. |
| 22 | PB11 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS and COMP2_OUT. |
| 23 | VSS | power_in | Digital ground reference. |
| 24 | VDD | power_in | Digital supply input; standard operating voltage range is 1.71 V to 3.6 V (Table 22). |
| 25 | PB12 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternate functions include TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, SWPMI1_IO, SAI1_FS_A and TIM15_BKIN. |
| 26 | PB13 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, SWPMI1_TX, SAI1_SCK_A and TIM15_CH1N. |
| 27 | PB14 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, SWPMI1_RX, SAI1_MCLK_A and TIM15_CH1. |
| 28 | PB15 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternate functions include RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, SWPMI1_SUSPEND, SAI1_SD_A and TIM15_CH2. |
| 29 | PA8 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternate functions include MCO, TIM1_CH1, USART1_CK, LCD_COM0, SWPMI1_IO, SAI1_SCK_A and LPTIM2_OUT. |
| 30 | PA9 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH2, I2C1_SCL, USART1_TX, LCD_COM1, SAI1_FS_A and TIM15_BKIN. |
| 31 | PA10 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include TIM1_CH3, I2C1_SDA, USART1_RX, USB_CRS_SYNC, LCD_COM2 and SAI1_SD_A. |
| 32 | PA11 | bidirectional | 5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, CAN1_RX and USB_DM. |
| 33 | PA12 | bidirectional | 5 V-tolerant (FT_u) I/O with USB function supplied by VDDUSB; alternate functions include TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX and USB_DP. |
| 34 | PA13 (JTMS-SWDIO) | bidirectional | 5 V-tolerant (FT) I/O that after reset is configured as the JTMS-SWDIO debug function with its internal pull-up enabled; alternate functions include IR_OUT, USB_NOE, SWPMI1_TX and SAI1_SD_B. |
| 35 | VSS | power_in | Digital ground reference. |
| 36 | VDDUSB | power_in | USB supply input; 3.0 V to 3.6 V when USB is used, and 0 to 3.6 V when USB is not used (Table 22). |
| 37 | PA14 (JTCK-SWCLK) | bidirectional | 5 V-tolerant (FT) I/O that after reset is configured as the JTCK-SWCLK debug function with its internal pull-down enabled; alternate functions include LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX and SAI1_FS_B. |
| 38 | PA15 (JTDI) | bidirectional | 5 V-tolerant (FT_l) I/O that after reset is configured as the JTDI debug function with its internal pull-up enabled; alternate functions include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS_DE and TSC_G3_IO1. |
| 39 | PB3 (JTDO-TRACESWO) | bidirectional | 5 V-tolerant (FT_la) I/O with LCD function supplied by VLCD and analog switch supplied by VDDA; after reset it is configured as the JTDO-TRACESWO debug function, with alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK and USART1_RTS_DE, and additional function COMP2_INM. |
| 40 | PB4 (NJTRST) | bidirectional | 5 V-tolerant (FT_fla) I/O with Fm+ capability, LCD function supplied by VLCD and analog switch supplied by VDDA; after reset it is configured as the NJTRST debug function with its internal pull-up enabled, with alternate functions I2C3_SDA, SPI1_MISO, SPI3_MISO and USART1_CTS, and additional function COMP2_INP. |
| 41 | PB5 | bidirectional | 5 V-tolerant (FT_l) I/O with LCD function supplied by VLCD; alternate functions include LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, COMP2_OUT, SAI1_SD_B and TIM16_BKIN. |
| 42 | PB6 | bidirectional | 5 V-tolerant (FT_fa) I/O with Fm+ capability and analog switch supplied by VDDA; alternate functions include LPTIM1_ETR, I2C1_SCL, USART1_TX, SAI1_FS_B and TIM16_CH1N, and additional function is COMP2_INP. |
| 43 | PB7 | bidirectional | 5 V-tolerant (FT_fla) I/O with Fm+ capability, LCD function supplied by VLCD and analog switch supplied by VDDA; alternate functions include LPTIM1_IN2, I2C1_SDA, USART1_RX and LCD_SEG21, and additional functions include COMP2_INM and PVD_IN. |
| 44 | PH3-BOOT0 | bidirectional | I/O pin carrying the BOOT0 boot-selection function; Table 15 lists no I/O structure for it and only EVENTOUT as an alternate function. |
| 45 | PB8 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include I2C1_SCL, CAN1_RX, LCD_SEG16, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1. |
| 46 | PB9 | bidirectional | 5 V-tolerant (FT_fl) I/O with Fm+ capability and LCD function supplied by VLCD; alternate functions include IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, LCD_COM3, SDMMC1_D5 and SAI1_FS_A. |
| 47 | VSS | power_in | Digital ground reference. |
| 48 | VDD | power_in | Digital supply input; standard operating voltage range is 1.71 V to 3.6 V (Table 22). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
## CAD (KiCad official)
- Symbol: `STM32L433CBT7`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `stm32l433cbt7-etched.step` / `stm32l433cbt7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l433cbt7.step` / `stm32l433cbt7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8553542743956463616) (227 pp, sha256 `471e1cceea40b1fa`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm32l433cbt7-datasheet.pdf)