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STM32L431CCU6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L431CCU6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)
STM32L431CCU6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup domain supply for RTC and backup registers, 1.55 V to 3.6 V operating range. |
| 2 | PC13 | bidirectional | 5 V tolerant I/O supplied through the power switch (limited to 3 mA, max 2 MHz with 30 pF load in output mode); also RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant I/O on the backup power switch (output mode limited to 2 MHz, 30 pF); LSE crystal input OSC32_IN. |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V tolerant I/O on the backup power switch (output mode limited to 2 MHz, 30 pF); LSE crystal output OSC32_OUT. |
| 5 | PH0-OSC_IN | bidirectional | 5 V tolerant I/O, also the HSE oscillator input OSC_IN. |
| 6 | PH1-OSC_OUT | bidirectional | 5 V tolerant I/O, also the HSE oscillator output OSC_OUT. |
| 7 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| 8 | VSSA/VREF- | power_in | Analog ground, internally connected to the negative ADC reference VREF- in this package. |
| 9 | VDDA/VREF+ | power_in | Analog supply (1.62 V to 3.6 V for ADC/COMP use), internally connected to the positive reference VREF+ in this package. |
| 10 | PA0 | bidirectional | 5 V tolerant I/O with analog switch; TIM2_CH1, USART2_CTS, COMP1_OUT, OPAMP1_VINP, COMP1_INM, ADC1_IN5, RTC_TAMP2, WKUP1. |
| 11 | PA1 | bidirectional | 5 V tolerant I/O with analog switch; TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, OPAMP1_VINM, COMP1_INP, ADC1_IN6. |
| 12 | PA2 | bidirectional | 5 V tolerant I/O with analog switch; TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, COMP2_INM, ADC1_IN7, WKUP4, LSCO. |
| 13 | PA3 | bidirectional | 3.6 V tolerant I/O with analog switch; TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, OPAMP1_VOUT, COMP2_INP, ADC1_IN8. |
| 14 | PA4 | bidirectional | 3.6 V tolerant I/O with analog switch; SPI1_NSS, SPI3_NSS, USART2_CK, COMP1_INM, COMP2_INM, ADC1_IN9, DAC1_OUT1. |
| 15 | PA5 | bidirectional | 3.6 V tolerant I/O with analog switch; TIM2_CH1, TIM2_ETR, SPI1_SCK, COMP1_INM, COMP2_INM, ADC1_IN10, DAC1_OUT2. |
| 16 | PA6 | bidirectional | 5 V tolerant I/O with analog switch; TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, QUADSPI_BK1_IO3, ADC1_IN11. |
| 17 | PA7 | bidirectional | 5 V tolerant Fm+ I/O with analog switch; TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, ADC1_IN12. |
| 18 | PB0 | bidirectional | 5 V tolerant I/O with analog switch; TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, ADC1_IN15. |
| 19 | PB1 | bidirectional | 5 V tolerant I/O with analog switch; TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, COMP1_INM, ADC1_IN16. |
| 20 | PB2 | bidirectional | 5 V tolerant I/O with analog switch; RTC_OUT, LPTIM1_OUT, I2C3_SMBA, COMP1_INP. |
| 21 | PB10 | bidirectional | 5 V tolerant Fm+ I/O; TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, SAI1_SCK_A. |
| 22 | PB11 | bidirectional | 5 V tolerant Fm+ I/O; TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS, COMP2_OUT. |
| 23 | VSS | power_in | Ground supply pin. |
| 24 | VDD | power_in | Main digital supply, 1.71 V to 3.6 V. |
| 25 | PB12 | bidirectional | 5 V tolerant I/O; TIM1_BKIN, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, SWPMI1_IO, SAI1_FS_A. |
| 26 | PB13 | bidirectional | 5 V tolerant Fm+ I/O; TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, SWPMI1_TX, SAI1_SCK_A. |
| 27 | PB14 | bidirectional | 5 V tolerant Fm+ I/O; TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, SWPMI1_RX, SAI1_MCLK_A. |
| 28 | PB15 | bidirectional | 5 V tolerant I/O; RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, SWPMI1_SUSPEND, SAI1_SD_A. |
| 29 | PA8 | bidirectional | 5 V tolerant I/O; MCO, TIM1_CH1, USART1_CK, SWPMI1_IO, SAI1_SCK_A, LPTIM2_OUT. |
| 30 | PA9 | bidirectional | 5 V tolerant Fm+ I/O; TIM1_CH2, I2C1_SCL, USART1_TX, SAI1_FS_A, TIM15_BKIN. |
| 31 | PA10 | bidirectional | 5 V tolerant Fm+ I/O; TIM1_CH3, I2C1_SDA, USART1_RX, SAI1_SD_A. |
| 32 | PA11 | bidirectional | 5 V tolerant I/O; TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, CAN1_RX. |
| 33 | PA12 | bidirectional | 5 V tolerant I/O; TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX. |
| 34 | PA13 (JTMS-SWDIO) | bidirectional | 5 V tolerant I/O configured as JTMS-SWDIO after reset with internal pull-up active; also IR_OUT, SWPMI1_TX, SAI1_SD_B. |
| 35 | VSS | power_in | Ground supply pin. |
| 36 | VDD | power_in | Main digital supply, 1.71 V to 3.6 V. |
| 37 | PA14 (JTCK-SWCLK) | bidirectional | 5 V tolerant I/O configured as JTCK-SWCLK after reset with internal pull-down active; also LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX, SAI1_FS_B. |
| 38 | PA15 (JTDI) | bidirectional | 5 V tolerant I/O configured as JTDI after reset with internal pull-up active; also TIM2_CH1, USART2_RX, SPI1_NSS, SPI3_NSS, TSC_G3_IO1. |
| 39 | PB3 (JTDO-TRACESWO) | bidirectional | 5 V tolerant I/O with analog switch, JTDO-TRACESWO after reset; TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, SAI1_SCK_B, COMP2_INM. |
| 40 | PB4 (NJTRST) | bidirectional | 5 V tolerant Fm+ I/O with analog switch, NJTRST after reset with internal pull-up active; I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, COMP2_INP. |
| 41 | PB5 | bidirectional | 5 V tolerant I/O; LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, COMP2_OUT, SAI1_SD_B, TIM16_BKIN. |
| 42 | PB6 | bidirectional | 5 V tolerant Fm+ I/O with analog switch; LPTIM1_ETR, I2C1_SCL, USART1_TX, SAI1_FS_B, TIM16_CH1N, COMP2_INP. |
| 43 | PB7 | bidirectional | 5 V tolerant Fm+ I/O with analog switch; LPTIM1_IN2, I2C1_SDA, USART1_RX, COMP2_INM, PVD_IN. |
| 44 | PH3/BOOT0 | bidirectional | 5 V tolerant I/O (PH3) that also serves as the BOOT0 boot-mode pin. |
| 45 | PB8 | bidirectional | 5 V tolerant Fm+ I/O; I2C1_SCL, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A, TIM16_CH1. |
| 46 | PB9 | bidirectional | 5 V tolerant Fm+ I/O; IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, SDMMC1_D5, SAI1_FS_A. |
| 47 | VSS | power_in | Ground supply pin. |
| 48 | VDD | power_in | Main digital supply, 1.71 V to 3.6 V. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
STM32L431CCU6 - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32l431ccu6-etched.step/stm32l431ccu6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l431ccu6.step/stm32l431ccu6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (208 pp, sha256
71963de3cb899f8f, retrieved 2026-10-03, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).