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Contents

README

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STM32L412RBT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L412RBT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_out Backup battery supply voltage (1.55 to 3.6 V) for RTC and 32x32-bit backup registers
2 PC13 bidirectional 5V-tolerant general-purpose I/O pin with RTC tamper/timestamp/alarm and wakeup capability
3 PC14-OSC32_IN bidirectional 5V-tolerant I/O pin for external 32.768 kHz oscillator input
4 PC15-OSC32_OUT bidirectional 5V-tolerant I/O pin for external 32.768 kHz oscillator output
5 PH0-OSC_IN bidirectional 5V-tolerant I/O pin for external high-speed crystal oscillator input (4 to 48 MHz)
6 PH1-OSC_OUT bidirectional 5V-tolerant I/O pin for external high-speed crystal oscillator output (4 to 48 MHz)
7 NRST bidirectional Reset input/output with embedded weak pull-up resistor; active low
8 PC0 bidirectional 5V-tolerant analog/digital I/O pin with ADC input (ADC12_IN1) and low-power timer capability
9 PC1 bidirectional 5V-tolerant analog/digital I/O pin with ADC input (ADC12_IN2) and low-power timer output capability
10 PC2 bidirectional 5V-tolerant analog I/O pin with ADC input (ADC12_IN3) and SPI/low-power timer capability
11 PC3 bidirectional 3.6V-tolerant analog I/O pin with ADC input (ADC12_IN4), SPI, and low-power timer capability
12 VSSA/VREF- power_in Analog ground and negative reference voltage for ADC; connect to VSS
13 VDDA/VREF+ power_out Analog supply voltage (1.62 to 3.6 V) and positive reference voltage for ADC
14 PA0 bidirectional 5V-tolerant analog/digital I/O pin with ADC input (ADC1_IN5), OPAMP1 input, comparator input, and timer capability
15 PA1 bidirectional 5V-tolerant analog/digital I/O pin with ADC input (ADC1_IN6), OPAMP1 input, comparator input, timer, I2C, and SPI capability
16 PA2 bidirectional 5V-tolerant analog/digital I/O pin with ADC input (ADC12_IN7), USART/LPUART/QUADSPI capability, and wakeup function
17 PA3 bidirectional 3.6V-tolerant analog/digital I/O pin with ADC input (ADC12_IN8), OPAMP1 output, USART/LPUART/QUADSPI, and timer capability
18 VSS power_in Ground connection (0 V reference); all VSS pins must be connected
19 VDD power_out Main supply voltage input (1.71 to 3.6 V); all VDD pins must be connected
20 PA4 bidirectional 3.6V-tolerant analog I/O pin with ADC input (ADC12_IN9), comparator input, SPI, USART, and low-power timer capability
21 PA5 bidirectional 3.6V-tolerant analog I/O pin with ADC input (ADC12_IN10), comparator input, SPI, timer, and low-power timer capability
22 PA6 bidirectional 5V-tolerant analog/digital I/O pin with ADC input (ADC12_IN11), comparator output, SPI, USART, QUADSPI, and timer capability
23 PA7 bidirectional 5V-tolerant Fm+-capable analog/digital I/O pin with ADC input (ADC12_IN12), SPI, QUADSPI, I2C, and timer capability
24 PC4 bidirectional 5V-tolerant analog I/O pin with ADC input (ADC12_IN13), comparator input, and USART capability
25 PC5 bidirectional 5V-tolerant analog I/O pin with ADC input (ADC12_IN14), comparator input, USART capability, and wakeup function
26 PB0 bidirectional 5V-tolerant analog/digital I/O pin with ADC input (ADC12_IN15), comparator output, SPI, USART, QUADSPI, and timer capability
27 PB1 bidirectional 5V-tolerant analog/digital I/O pin with ADC input (ADC12_IN16), comparator input, SPI, USART, QUADSPI, low-power timer, and timer capability
28 PB2 bidirectional 5V-tolerant analog/digital I/O pin with comparator output, RTC output, low-power timer output, and I2C capability
29 PB10 bidirectional 5V-tolerant Fm+-capable I/O pin with timer, I2C, SPI, USART, LPUART, touch sensor, QUADSPI, and comparator capability
30 PB11 bidirectional 5V-tolerant Fm+-capable I/O pin with timer, I2C, USART, LPUART, QUADSPI, and comparator capability
31 VSS power_in Ground connection (0 V reference); all VSS pins must be connected
32 VDD power_out Main supply voltage input (1.71 to 3.6 V); all VDD pins must be connected
33 PB12 bidirectional 5V-tolerant I/O pin with timer, I2C, SPI, USART, LPUART, touch sensor, and timer wakeup capability
34 PB13 bidirectional 5V-tolerant Fm+-capable I/O pin with timer, I2C, SPI, USART, LPUART, and touch sensor capability
35 PB14 bidirectional 5V-tolerant Fm+-capable I/O pin with timer, I2C, SPI, USART, LPUART, and touch sensor capability
36 PB15 bidirectional 5V-tolerant I/O pin with RTC reference input, timer, SPI, and touch sensor capability
37 PC6 bidirectional 5V-tolerant I/O pin with touch sensor capability
38 PC7 bidirectional 5V-tolerant I/O pin with touch sensor capability
39 PC8 bidirectional 5V-tolerant I/O pin with touch sensor capability
40 PC9 bidirectional 5V-tolerant I/O pin with touch sensor and USB capability
41 PA8 bidirectional 5V-tolerant I/O pin with master clock output, timer, USART, and low-power timer capability
42 PA9 bidirectional 5V-tolerant Fm+-capable I/O pin with timer, I2C, USART, and timer wakeup capability
43 PA10 bidirectional 5V-tolerant Fm+-capable I/O pin with timer, I2C, USART, and USB clock synchronization capability
44 PA11 bidirectional 5V-tolerant USB I/O pin (DP line) with timer, SPI, comparator output, and USART capability
45 PA12 bidirectional 5V-tolerant USB I/O pin (DN line) with timer, SPI, and USART capability
46 PA13 bidirectional 5V-tolerant debug and I/O pin (SWDIO/JTMS) with infrared output and USB capability
47 VSS power_in Ground connection (0 V reference); all VSS pins must be connected
48 VDDUSB power_out USB supply voltage input (3.0 to 3.6 V when USB used, 0 to 3.6 V when unused)
49 PA14 bidirectional 5V-tolerant debug and I/O pin (SWCLK/JTCK) with low-power timer output and I2C capability
50 PA15 bidirectional 5V-tolerant debug and I/O pin (JTDI) with timer, USART, SPI, and touch sensor capability
51 PC10 bidirectional 5V-tolerant I/O pin with embedded trace, USART, and touch sensor capability
52 PC11 bidirectional 5V-tolerant I/O pin with USART and touch sensor capability
53 PC12 bidirectional 5V-tolerant I/O pin with embedded trace, USART, and touch sensor capability
54 PD2 bidirectional 5V-tolerant I/O pin with embedded trace, USART, and touch sensor capability
55 PB3 bidirectional 5V-tolerant analog I/O pin (JTDO/TRACESWO) with timer, SPI, and USART capability
56 PB4 bidirectional 5V-tolerant analog I/O pin (NJTRST) with I2C, SPI, USART, and touch sensor capability
57 PB5 bidirectional 5V-tolerant I/O pin with embedded trace, low-power timer, I2C, SPI, USART, touch sensor, and timer wakeup capability
58 PB6 bidirectional 5V-tolerant analog I/O pin with embedded trace, low-power timer, I2C, USART, and touch sensor capability
59 PB7 bidirectional 5V-tolerant analog I/O pin with embedded trace, low-power timer, I2C, USART, touch sensor, and PVD input capability
60 PH3-BOOT0 bidirectional 5V-tolerant I/O pin for boot mode configuration; pulled low on power-up
61 PB8 bidirectional 5V-tolerant Fm+-capable I/O pin with I2C and timer capability
62 PB9 bidirectional 5V-tolerant Fm+-capable I/O pin with infrared output, I2C, and SPI capability
63 VSS power_in Ground connection (0 V reference); all VSS pins must be connected
64 VDD power_out Main supply voltage input (1.71 to 3.6 V); all VDD pins must be connected

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32L412RBT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32l412rbt6-etched.step / stm32l412rbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l412rbt6.step / stm32l412rbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (192 pp, sha256 469ab19caba48d70, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF