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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32L412R8T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L412R8T6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup-domain supply for the RTC and backup registers, specified from 1.55 V to 3.6 V.
2	PC13	bidirectional	5 V tolerant FT I/O (GPIO PC13) with EVENTOUT, also RTC_TAMP1/RTC_TS/RTC_OUT1/WKUP2.
3	PC14-OSC32_IN (PC14)	bidirectional	5 V tolerant FT I/O (GPIO PC14), also used as OSC32_IN input of the 32.768 kHz LSE crystal oscillator.
4	PC15-OSC32_OUT (PC15)	bidirectional	5 V tolerant FT I/O (GPIO PC15), also used as OSC32_OUT output of the 32.768 kHz LSE crystal oscillator.
5	PH0-OSC_IN (PH0)	bidirectional	5 V tolerant FT I/O (GPIO PH0), also used as OSC_IN input of the HSE (4 to 48 MHz) crystal oscillator.
6	PH1-OSC_OUT (PH1)	bidirectional	5 V tolerant FT I/O (GPIO PH1), also used as OSC_OUT output of the HSE crystal oscillator.
7	NRST	bidirectional	Bidirectional reset pin with embedded weak pull-up resistor (RST I/O structure).
8	PC0	bidirectional	FT_fa I/O: 5 V tolerant, Fm+ capable, analog switch supplied by VDDA; also ADC12_IN1, TRACECK, LPTIM1_IN1, I2C3_SCL, LPUART1_RX, LPTIM2_IN1.
9	PC1	bidirectional	FT_fa I/O: 5 V tolerant, Fm+ capable, analog switch supplied by VDDA; also ADC12_IN2, TRACED0, LPTIM1_OUT, I2C3_SDA, LPUART1_TX.
10	PC2	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also ADC12_IN3, LPTIM1_IN2, SPI2_MISO.
11	PC3	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also ADC12_IN4, LPTIM1_ETR, SPI2_MOSI, LPTIM2_ETR.
12	VSSA/VREF-	power_in	Analog ground and ADC negative reference voltage (VREF-), which must be within 50 mV of VSS.
13	VDDA/VREF+	power_in	Analog supply, 1.62 V to 3.6 V when ADC or COMP is used (1.8 V to 3.6 V for OPAMP); on this package it also serves as the ADC positive reference VREF+.
14	PA0	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also OPAMP1_VINP, COMP1_INM, ADC1_IN5, RTC_TAMP2/WKUP1, TIM2_CH1, USART2_CTS, COMP1_OUT, TIM2_ETR.
15	PA1	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also OPAMP1_VINM, COMP1_INP, ADC1_IN6, TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, TIM15_CH1N.
16	PA2	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also ADC12_IN7, WKUP4/LSCO, TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, TIM15_CH1.
17	PA3	bidirectional	TT_a I/O: 3.6 V tolerant, analog switch supplied by VDDA; also OPAMP1_VOUT, ADC12_IN8, TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, TIM15_CH2.
18	VSS	power_in	Ground pin of the digital core and I/Os; it must be within 50 mV of all other VSS/VSSA pins.
19	VDD	power_in	Main digital and I/O supply, 1.71 V to 3.6 V standard operating voltage.
20	PA4	bidirectional	TT_a I/O: 3.6 V tolerant, analog switch supplied by VDDA; also SPI1_NSS, USART2_CK, LPTIM2_OUT, COMP1_INM, ADC12_IN9; injected current limited to -5/0 mA.
21	PA5	bidirectional	TT_a I/O: 3.6 V tolerant, analog switch supplied by VDDA; also TIM2_CH1, TIM2_ETR, SPI1_SCK, LPTIM2_ETR, COMP1_INM, ADC12_IN10; injected current limited to -5/0 mA.
22	PA6	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also ADC12_IN11, TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3, TIM16_CH1.
23	PA7	bidirectional	FT_fa I/O: 5 V tolerant, Fm+ capable, analog switch supplied by VDDA; also ADC12_IN12, TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2.
24	PC4	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also COMP1_INM, ADC12_IN13, USART3_TX.
25	PC5	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also COMP1_INP, ADC12_IN14, USART3_RX, WKUP5.
26	PB0	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also ADC12_IN15, TRACED0, TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, COMP1_OUT.
27	PB1	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also ADC12_IN16, COMP1_INM, TRACED1, TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LPTIM2_IN1.
28	PB2	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; also COMP1_INP, RTC_OUT2, LPTIM1_OUT, I2C3_SMBA.
29	PB10	bidirectional	FT_f I/O: 5 V tolerant and Fm+ capable; also TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, COMP1_OUT.
30	PB11	bidirectional	FT_f I/O: 5 V tolerant and Fm+ capable; also TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS.
31	VSS	power_in	Ground pin of the digital core and I/Os; it must be within 50 mV of all other VSS/VSSA pins.
32	VDD	power_in	Main digital and I/O supply, 1.71 V to 3.6 V standard operating voltage.
33	PB12	bidirectional	FT I/O: 5 V tolerant; also TIM1_BKIN, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, TIM15_BKIN.
34	PB13	bidirectional	FT_f I/O: 5 V tolerant and Fm+ capable; also TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, TIM15_CH1N.
35	PB14	bidirectional	FT_f I/O: 5 V tolerant and Fm+ capable; also TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, TIM15_CH1.
36	PB15	bidirectional	FT I/O: 5 V tolerant; also RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, TIM15_CH2.
37	PC6	bidirectional	FT I/O: 5 V tolerant; also TSC_G4_IO1.
38	PC7	bidirectional	FT I/O: 5 V tolerant; also TSC_G4_IO2.
39	PC8	bidirectional	FT I/O: 5 V tolerant; also TSC_G4_IO3.
40	PC9	bidirectional	FT I/O: 5 V tolerant; also TSC_G4_IO4 and USB_NOE.
41	PA8	bidirectional	FT I/O: 5 V tolerant; also MCO, TIM1_CH1, USART1_CK, LPTIM2_OUT.
42	PA9	bidirectional	FT_f I/O: 5 V tolerant and Fm+ capable; also TIM1_CH2, I2C1_SCL, USART1_TX, TIM15_BKIN.
43	PA10	bidirectional	FT_f I/O: 5 V tolerant and Fm+ capable; also TIM1_CH3, I2C1_SDA, USART1_RX, USB_CRS_SYNC.
44	PA11	bidirectional	FT_u I/O: 5 V tolerant, with USB function supplied by VDDUSB; also USB_DM, TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS.
45	PA12	bidirectional	FT_u I/O: 5 V tolerant, with USB function supplied by VDDUSB; also USB_DP, TIM1_ETR, SPI1_MOSI, USART1_RTS_DE.
46	PA13 (JTMS/SWDIO)	bidirectional	FT I/O: 5 V tolerant; default function JTMS/SWDIO debug pin, also IR_OUT and USB_NOE.
47	VSS	power_in	Ground pin of the digital core and I/Os; it must be within 50 mV of all other VSS/VSSA pins.
48	VDDUSB	power_in	USB supply, 3.0 V to 3.6 V when the USB is used.
49	PA14 (JTCK/SWCLK)	bidirectional	FT I/O: 5 V tolerant; default function JTCK/SWCLK debug pin, also LPTIM1_OUT and I2C1_SMBA.
50	PA15 (JTDI)	bidirectional	FT I/O: 5 V tolerant; default function JTDI debug pin, also TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, USART3_RTS_DE, TSC_G3_IO1.
51	PC10	bidirectional	FT I/O: 5 V tolerant; also TRACED1, USART3_TX, TSC_G3_IO2.
52	PC11	bidirectional	FT I/O: 5 V tolerant; also USART3_RX, TSC_G3_IO3.
53	PC12	bidirectional	FT I/O: 5 V tolerant; also TRACED3, USART3_CK, TSC_G3_IO4.
54	PD2	bidirectional	FT I/O: 5 V tolerant; also TRACED2, USART3_RTS_DE, TSC_SYNC.
55	PB3 (JTDO/TRACESWO)	bidirectional	FT_a I/O: 5 V tolerant, analog switch supplied by VDDA; default function JTDO/TRACESWO, also TIM2_CH2, SPI1_SCK, USART1_RTS_DE.
56	PB4 (NJTRST)	bidirectional	FT_fa I/O: 5 V tolerant, Fm+ capable, analog switch supplied by VDDA; default function NJTRST, also I2C3_SDA, SPI1_MISO, USART1_CTS, TSC_G2_IO1.
57	PB5	bidirectional	FT I/O: 5 V tolerant; also TRACED2, LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, USART1_CK, TSC_G2_IO2, TIM16_BKIN.
58	PB6	bidirectional	FT_fa I/O: 5 V tolerant, Fm+ capable, analog switch supplied by VDDA; also TRACED3, LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, TIM16_CH1N.
59	PB7	bidirectional	FT_fa I/O: 5 V tolerant, Fm+ capable, analog switch supplied by VDDA; also TRACECK, LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4, PVD_IN.
60	PH3-BOOT0 (BOOT0)	bidirectional	FT I/O: 5 V tolerant; also serves as the BOOT0 boot-mode selection pin, with EVENTOUT as alternate function.
61	PB8	bidirectional	FT_f I/O: 5 V tolerant and Fm+ capable; also I2C1_SCL, TIM16_CH1, EVENTOUT.
62	PB9	bidirectional	FT_f I/O: 5 V tolerant and Fm+ capable; also IR_OUT, I2C1_SDA, SPI2_NSS, EVENTOUT.
63	VSS	power_in	Ground pin of the digital core and I/Os; it must be within 50 mV of all other VSS/VSSA pins.
64	VDD	power_in	Main digital and I/O supply, 1.71 V to 3.6 V standard operating voltage.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: STM32L412R8T6
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: stm32l412r8t6-etched.step / stm32l412r8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l412r8t6.step / stm32l412r8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (193 pp, sha256 5104ae3be2936485, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF