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STM32L412CBT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32L412CBT6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup-domain supply for the RTC and 32x32-bit backup registers, specified from 1.55 V to 3.6 V.
2 PC13 bidirectional 5 V-tolerant FT I/O with EVENTOUT alternate function and additional functions RTC_TAMP1/RTC_TS/RTC_OUT1/WKUP2.
3 PC14-OSC32_IN (PC14) bidirectional 5 V-tolerant FT I/O with EVENTOUT alternate function; additional function OSC32_IN is the 32 kHz crystal oscillator (LSE) input.
4 PC15-OSC32_OUT (PC15) bidirectional 5 V-tolerant FT I/O with EVENTOUT alternate function; additional function OSC32_OUT is the 32 kHz crystal oscillator (LSE) output.
5 PH0-OSC_IN (PH0) bidirectional 5 V-tolerant FT I/O with EVENTOUT alternate function; additional function OSC_IN is the high-speed crystal oscillator input (4 to 48 MHz crystal oscillator).
6 PH1-OSC_OUT (PH1) bidirectional 5 V-tolerant FT I/O with EVENTOUT alternate function; additional function OSC_OUT is the high-speed crystal oscillator output (4 to 48 MHz crystal oscillator).
7 NRST bidirectional Reset pin (RST I/O structure) with an embedded weak pull-up resistor.
8 VSSA/VREF- power_in Analog ground pin that also serves as the ADC negative reference VREF-; ground pins must stay within 50 mV of each other.
9 VDDA/VREF+ power_in Analog supply pin that also serves as the ADC/COMP positive reference VREF+; VDDA is 1.62 V minimum when ADC or COMP is used, 1.8 V minimum when OPAMP is used, and 3.6 V maximum.
10 PA0 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions TIM2_CH1, USART2_CTS, COMP1_OUT, TIM2_ETR and EVENTOUT; additional functions OPAMP1_VINP, COMP1_INM, ADC1_IN5 and RTC_TAMP2/WKUP1.
11 PA1 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, TIM15_CH1N and EVENTOUT; additional functions OPAMP1_VINM, COMP1_INP and ADC1_IN6.
12 PA2 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, TIM15_CH1 and EVENTOUT; additional functions ADC12_IN7 and WKUP4/LSCO.
13 PA3 bidirectional 3.6 V-tolerant I/O (TT_a) with analog switch supplied by VDDA; alternate functions TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, TIM15_CH2 and EVENTOUT; additional functions OPAMP1_VOUT and ADC12_IN8.
14 PA4 bidirectional 3.6 V-tolerant I/O (TT_a) with analog switch supplied by VDDA; alternate functions SPI1_NSS, USART2_CK, LPTIM2_OUT and EVENTOUT; additional functions COMP1_INM and ADC12_IN9.
15 PA5 bidirectional 3.6 V-tolerant I/O (TT_a) with analog switch supplied by VDDA; alternate functions TIM2_CH1, TIM2_ETR, SPI1_SCK, LPTIM2_ETR and EVENTOUT; additional functions COMP1_INM and ADC12_IN10.
16 PA6 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3, TIM16_CH1 and EVENTOUT; additional function ADC12_IN11.
17 PA7 bidirectional 5 V-tolerant Fm+-capable I/O (FT_fa) with analog switch supplied by VDDA; alternate functions TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2 and EVENTOUT; additional function ADC12_IN12.
18 PB0 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions TRACED0, TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, COMP1_OUT and EVENTOUT; additional function ADC12_IN15.
19 PB1 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions TRACED1, TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LPTIM2_IN1 and EVENTOUT; additional functions COMP1_INM and ADC12_IN16.
20 PB2 bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; alternate functions LPTIM1_OUT, I2C3_SMBA and EVENTOUT; additional functions COMP1_INP and RTC_OUT2.
21 PB10 bidirectional 5 V-tolerant Fm+-capable I/O (FT_f); alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, COMP1_OUT and EVENTOUT.
22 PB11 bidirectional 5 V-tolerant Fm+-capable I/O (FT_f); alternate functions TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS and EVENTOUT.
23 VSS power_in Ground pin; all VSS pins must be connected to the external ground within the 50 mV variation limit.
24 VDD power_in Main supply pin; standard operating voltage is 1.71 V to 3.6 V.
25 PB12 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, TIM15_BKIN and EVENTOUT.
26 PB13 bidirectional 5 V-tolerant Fm+-capable I/O (FT_f); alternate functions TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, TIM15_CH1N and EVENTOUT.
27 PB14 bidirectional 5 V-tolerant Fm+-capable I/O (FT_f); alternate functions TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3, TIM15_CH1 and EVENTOUT.
28 PB15 bidirectional 5 V-tolerant I/O (FT); alternate functions RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, TIM15_CH2 and EVENTOUT.
29 PA8 bidirectional 5 V-tolerant I/O (FT); alternate functions MCO, TIM1_CH1, USART1_CK, LPTIM2_OUT and EVENTOUT.
30 PA9 bidirectional 5 V-tolerant Fm+-capable I/O (FT_f); alternate functions TIM1_CH2, I2C1_SCL, USART1_TX, TIM15_BKIN and EVENTOUT.
31 PA10 bidirectional 5 V-tolerant Fm+-capable I/O (FT_f); alternate functions TIM1_CH3, I2C1_SDA, USART1_RX, USB_CRS_SYNC and EVENTOUT.
32 PA11 bidirectional 5 V-tolerant I/O with USB function supplied by VDDUSB (FT_u); alternate functions TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS, USB_DM, TIM1_BKIN2_COMP1 and EVENTOUT.
33 PA12 bidirectional 5 V-tolerant I/O with USB function supplied by VDDUSB (FT_u); alternate functions TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, USB_DP and EVENTOUT.
34 PA13 (JTMS/SWDIO) bidirectional 5 V-tolerant I/O (FT) with JTMS/SWDIO as its function after reset; alternate functions IR_OUT, USB_NOE and EVENTOUT.
35 VSS power_in Ground pin; all VSS pins must be connected to the external ground within the 50 mV variation limit.
36 VDDUSB power_in USB supply pin; 3.0 V to 3.6 V when USB is used, and 0 to 3.6 V when USB is not used.
37 PA14 (JTCK/SWCLK) bidirectional 5 V-tolerant I/O (FT) with JTCK/SWCLK as its function after reset; alternate functions LPTIM1_OUT, I2C1_SMBA and EVENTOUT.
38 PA15 (JTDI) bidirectional 5 V-tolerant I/O (FT) with JTDI as its function after reset; alternate functions TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, USART3_RTS_DE, TSC_G3_IO1 and EVENTOUT.
39 PB3 (JTDO/TRACESWO) bidirectional 5 V-tolerant I/O (FT_a) with analog switch supplied by VDDA; JTDO/TRACESWO as its function after reset; alternate functions TIM2_CH2, SPI1_SCK, USART1_RTS_DE and EVENTOUT.
40 PB4 (NJTRST) bidirectional 5 V-tolerant Fm+-capable I/O (FT_fa) with analog switch supplied by VDDA; NJTRST as its function after reset; alternate functions I2C3_SDA, SPI1_MISO, USART1_CTS, TSC_G2_IO1 and EVENTOUT.
41 PB5 bidirectional 5 V-tolerant I/O (FT); alternate functions TRACED2, LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, USART1_CK, TSC_G2_IO2, TIM16_BKIN and EVENTOUT.
42 PB6 bidirectional 5 V-tolerant Fm+-capable I/O (FT_fa) with analog switch supplied by VDDA; alternate functions TRACED3, LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3, TIM16_CH1N and EVENTOUT.
43 PB7 bidirectional 5 V-tolerant Fm+-capable I/O (FT_fa) with analog switch supplied by VDDA; alternate functions TRACECK, LPTIM1_IN2, I2C1_SDA, USART1_RX, TSC_G2_IO4 and EVENTOUT; additional function PVD_IN.
44 PH3-BOOT0 (BOOT0) bidirectional 5 V-tolerant I/O (FT) with EVENTOUT alternate function; after reset it is the BOOT0 boot-mode configuration pin.
45 PB8 bidirectional 5 V-tolerant Fm+-capable I/O (FT_f); alternate functions I2C1_SCL, TIM16_CH1 and EVENTOUT.
46 PB9 bidirectional 5 V-tolerant Fm+-capable I/O (FT_f); alternate functions IR_OUT, I2C1_SDA, SPI2_NSS and EVENTOUT.
47 VSS power_in Ground pin; all VSS pins must be connected to the external ground within the 50 mV variation limit.
48 VDD power_in Main supply pin; standard operating voltage is 1.71 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32L412CBT6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32l412cbt6-etched.step / stm32l412cbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l412cbt6.step / stm32l412cbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (193 pp, sha256 5104ae3be2936485, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF