component

STM32L162RET6

Public Made by Adom

by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32l162ret6factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 15d ago
viewers stm32l162ret6: viewers · Ray 15d ago
package.json Publish 0.1.0 · Ray 15d ago
page.json Set visibility: public · Ray 15d ago
README.md Publish 0.1.0 · Ray 15d ago
stm32l162ret6-etched.glb stm32l162ret6: factory component page (tier=lcsc) · Ray 15d ago
stm32l162ret6-etched.step stm32l162ret6: factory component page (tier=lcsc) · Ray 15d ago
stm32l162ret6-hero.glb stm32l162ret6: hero GLB from the etched model (keeps the MPN mark) · Ray 15d ago
stm32l162ret6-hero.overlay.json Publish 0.1.0 · Ray 15d ago
stm32l162ret6.glb Publish 0.1.0 · Ray 15d ago
stm32l162ret6.kicad_mod Publish 0.1.0 · Ray 15d ago
stm32l162ret6.kicad_sym Publish 0.1.0 · Ray 15d ago
stm32l162ret6.lbr Publish 0.1.0 · Ray 15d ago
stm32l162ret6.step Publish 0.1.0 · Ray 15d ago

STM32L162RET6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L162RET6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VLCD power_in LCD supply pin for the optional LCD power supply scheme (section 6.1.7); Table 8 gives only pin type S, with no voltage limit printed in the pin table.
2 PC13 bidirectional 5 V tolerant (FT) I/O with wakeup input WKUP2 and RTC_TAMP1/RTC_TS/RTC_OUT alternate functions, floating input after reset.
3 PC14 bidirectional Standard 3.3 V (TC) I/O that is OSC32_IN only when the LSE oscillator is on (LSEON set), otherwise general-purpose PC14.
4 PC15 bidirectional Standard 3.3 V (TC) I/O that is OSC32_OUT only when the LSE oscillator is on (LSEON set), otherwise general-purpose PC15.
5 PH0 bidirectional Standard 3.3 V (TC) I/O that is OSC_IN only when the HSE oscillator is on (HSEON set), otherwise general-purpose PH0.
6 PH1 bidirectional Standard 3.3 V (TC) I/O that is OSC_OUT only when the HSE oscillator is on (HSEON set), otherwise general-purpose PH1.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
8 PC0 bidirectional 5 V tolerant (FT) I/O with LCD_SEG18 alternate function and ADC_IN10/COMP1_INP analog inputs.
9 PC1 bidirectional 5 V tolerant (FT) I/O with LCD_SEG19 alternate function and ADC_IN11/COMP1_INP analog inputs.
10 PC2 bidirectional 5 V tolerant (FT) I/O with LCD_SEG20 alternate function and ADC_IN12/COMP1_INP analog inputs.
11 PC3 bidirectional Standard 3.3 V (TC) I/O with LCD_SEG21 alternate function and ADC_IN13/COMP1_INP analog inputs.
12 VSSA power_in Analog ground pin; VSSA or VREF- must be tied to ground for the ADC (Table 55 note 4).
13 VDDA power_in Analog supply pin; the ADC operates with VDDA from 1.8 V to 3.6 V (Table 55).
14 PA0 bidirectional 5 V tolerant (FT) I/O with TIM2_CH1_ETR, TIM5_CH1, USART2_CTS, WKUP1/RTC_TAMP2, ADC_IN0 and COMP1_INP functions.
15 PA1 bidirectional 5 V tolerant (FT) I/O with TIM2_CH2, TIM5_CH2, USART2_RTS, LCD_SEG0, ADC_IN1, COMP1_INP and OPAMP1_VINP functions.
16 PA2 bidirectional 5 V tolerant (FT) I/O with TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, LCD_SEG1, ADC_IN2, COMP1_INP and OPAMP1_VINM functions.
17 PA3 bidirectional Standard 3.3 V (TC) I/O with TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_SEG2, ADC_IN3, COMP1_INP and OPAMP1_VOUT functions.
18 VSS_4 power_in Digital ground pin, the reference for all device voltages (Section 6.1: all voltages are referenced to VSS).
19 VDD_4 power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
20 PA4 bidirectional Standard 3.3 V (TC) I/O with SPI1_NSS, SPI3_NSS, I2S3_WS, USART2_CK, ADC_IN4, DAC_OUT1 and COMP1_INP functions.
21 PA5 bidirectional Standard 3.3 V (TC) I/O with TIM2_CH1_ETR, SPI1_SCK, ADC_IN5, DAC_OUT2 and COMP1_INP functions.
22 PA6 bidirectional 5 V tolerant (FT) I/O with TIM3_CH1, TIM10_CH1, SPI1_MISO, LCD_SEG3, ADC_IN6, COMP1_INP and OPAMP2_VINP functions.
23 PA7 bidirectional 5 V tolerant (FT) I/O with TIM3_CH2, TIM11_CH1, SPI1_MOSI, LCD_SEG4, ADC_IN7, COMP1_INP and OPAMP2_VINM functions.
24 PC4 bidirectional 5 V tolerant (FT) I/O with LCD_SEG22 alternate function and ADC_IN14/COMP1_INP analog inputs.
25 PC5 bidirectional 5 V tolerant (FT) I/O with LCD_SEG23 alternate function and ADC_IN15/COMP1_INP analog inputs.
26 PB0 bidirectional Standard 3.3 V (TC) I/O with TIM3_CH3, LCD_SEG5, ADC_IN8, COMP1_INP, OPAMP2_VOUT and VREF_OUT functions.
27 PB1 bidirectional 5 V tolerant (FT) I/O with TIM3_CH4, LCD_SEG6, ADC_IN9, COMP1_INP and VREF_OUT functions.
28 PB2 bidirectional 5 V tolerant (FT) I/O that doubles as the BOOT1 pin, with ADC_IN0b analog input.
29 PB10 bidirectional 5 V tolerant (FT) I/O with TIM2_CH3, I2C2_SCL, USART3_TX and LCD_SEG10 functions.
30 PB11 bidirectional 5 V tolerant (FT) I/O with TIM2_CH4, I2C2_SDA, USART3_RX and LCD_SEG11 functions.
31 VSS_1 power_in Digital ground pin, the reference for all device voltages (Section 6.1: all voltages are referenced to VSS).
32 VDD_1 power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
33 PB12 bidirectional 5 V tolerant (FT) I/O with TIM10_CH1, I2C2_SMBA, SPI2_NSS, I2S2_WS, USART3_CK, LCD_SEG12, ADC_IN18 and COMP1_INP functions.
34 PB13 bidirectional 5 V tolerant (FT) I/O with TIM9_CH1, SPI2_SCK, I2S2_CK, USART3_CTS, LCD_SEG13, ADC_IN19 and COMP1_INP functions.
35 PB14 bidirectional 5 V tolerant (FT) I/O with TIM9_CH2, SPI2_MISO, USART3_RTS, LCD_SEG14, ADC_IN20 and COMP1_INP functions.
36 PB15 bidirectional 5 V tolerant (FT) I/O with TIM11_CH1, SPI2_MOSI, I2S2_SD, LCD_SEG15, ADC_IN21, COMP1_INP and RTC_REFIN functions.
37 PC6 bidirectional 5 V tolerant (FT) I/O with TIM3_CH1, I2S2_MCK and LCD_SEG24 functions.
38 PC7 bidirectional 5 V tolerant (FT) I/O with TIM3_CH2, I2S3_MCK and LCD_SEG25 functions.
39 PC8 bidirectional 5 V tolerant (FT) I/O with TIM3_CH3 and LCD_SEG26 functions.
40 PC9 bidirectional 5 V tolerant (FT) I/O with TIM3_CH4 and LCD_SEG27 functions.
41 PA8 bidirectional 5 V tolerant (FT) I/O with USART1_CK, MCO and LCD_COM0 functions.
42 PA9 bidirectional 5 V tolerant (FT) I/O with USART1_TX and LCD_COM1 functions.
43 PA10 bidirectional 5 V tolerant (FT) I/O with USART1_RX and LCD_COM2 functions.
44 PA11 bidirectional 5 V tolerant (FT) I/O with USART1_CTS, SPI1_MISO and USB_DM functions.
45 PA12 bidirectional 5 V tolerant (FT) I/O with USART1_RTS, SPI1_MOSI and USB_DP functions.
46 PA13 bidirectional 5 V tolerant (FT) I/O that carries the JTMS-SWDIO debug function.
47 VSS_2 power_in Digital ground pin, the reference for all device voltages (Section 6.1: all voltages are referenced to VSS).
48 VDD_2 power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
49 PA14 bidirectional 5 V tolerant (FT) I/O that carries the JTCK-SWCLK debug function.
50 PA15 bidirectional 5 V tolerant (FT) I/O with TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, I2S3_WS, LCD_SEG17 and JTDI functions.
51 PC10 bidirectional 5 V tolerant (FT) I/O with SPI3_SCK, I2S3_CK, USART3_TX, UART4_TX, LCD_SEG28/LCD_SEG40 and LCD_COM4 functions.
52 PC11 bidirectional 5 V tolerant (FT) I/O with SPI3_MISO, USART3_RX, UART4_RX, LCD_SEG29/LCD_SEG41 and LCD_COM5 functions.
53 PC12 bidirectional 5 V tolerant (FT) I/O with SPI3_MOSI, I2S3_SD, USART3_CK, UART5_TX, LCD_SEG30/LCD_SEG42 and LCD_COM6 functions.
54 PD2 bidirectional 5 V tolerant (FT) I/O with TIM3_ETR, UART5_RX, LCD_SEG31/LCD_SEG43 and LCD_COM7 functions.
55 PB3 bidirectional 5 V tolerant (FT) I/O with JTDO debug function, TIM2_CH2, SPI1_SCK, SPI3_SCK, I2S3_CK, LCD_SEG7 and COMP2_INM functions.
56 PB4 bidirectional 5 V tolerant (FT) I/O with NJTRST debug function, TIM3_CH1, SPI1_MISO, SPI3_MISO, LCD_SEG8 and COMP2_INP functions.
57 PB5 bidirectional 5 V tolerant (FT) I/O with TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, I2S3_SD, LCD_SEG9 and COMP2_INP functions.
58 PB6 bidirectional 5 V tolerant (FT) I/O with TIM4_CH1, I2C1_SCL, USART1_TX and COMP2_INP functions.
59 PB7 bidirectional 5 V tolerant (FT) I/O with TIM4_CH2, I2C1_SDA, USART1_RX, COMP2_INP and PVD_IN functions.
60 BOOT0 input Dedicated BOOT0 input pin (structure B) used for boot mode selection.
61 PB8 bidirectional 5 V tolerant (FT) I/O with TIM4_CH3, TIM10_CH1, I2C1_SCL and LCD_SEG16 functions.
62 PB9 bidirectional 5 V tolerant (FT) I/O with TIM4_CH4, TIM11_CH1, I2C1_SDA and LCD_COM3 functions.
63 VSS_3 power_in Digital ground pin, the reference for all device voltages (Section 6.1: all voltages are referenced to VSS).
64 VDD_3 power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32L162RET6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32l162ret6-etched.step / stm32l162ret6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l162ret6.step / stm32l162ret6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (130 pp, sha256 e569c33e8dbef949, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF