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STM32L152VET6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32L152VET6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32L152VET6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V tolerant (FT) I/O; function after reset is PE2, alternate functions TIM3_ETR, LCD_SEG38 and TRACECLK.
2 PE3 bidirectional 5 V tolerant (FT) I/O; function after reset is PE3, alternate functions TIM3_CH1, LCD_SEG39 and TRACED0.
3 PE4 bidirectional 5 V tolerant (FT) I/O; function after reset is PE4, alternate functions TIM3_CH2 and TRACED1.
4 PE5 bidirectional 5 V tolerant (FT) I/O; function after reset is PE5, alternate functions TIM9_CH1 and TRACED2.
5 PE6-WKUP3 bidirectional 5 V tolerant (FT) I/O; function after reset is PE6, alternate function TIM9_CH2 and TRACED3, additional function WKUP3/RTC_TAMP3 wakeup.
6 VLCD power_in LCD power supply pin, applicable to STM32L152xE devices (on STM32L151xE it must be connected to VDD).
7 PC13-WKUP2 bidirectional 5 V tolerant (FT) I/O; function after reset is PC13, additional functions WKUP2, RTC_TAMP1, RTC_TS and RTC_OUT.
8 PC14-OSC32_IN bidirectional Standard 3.3 V (TC) I/O; becomes the OSC32_IN LSE oscillator input when the LSE oscillator is on (LSEON), otherwise usable as GPIO PC14.
9 PC15-OSC32_OUT bidirectional Standard 3.3 V (TC) I/O; becomes the OSC32_OUT LSE oscillator output when the LSE oscillator is on (LSEON), otherwise usable as GPIO PC15.
10 VSS_5 power_in Digital ground pin; all voltages are referenced to VSS.
11 VDD_5 power_in Digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply.
12 PH0-OSC_IN bidirectional Standard 3.3 V (TC) I/O; becomes the OSC_IN HSE oscillator input when the HSE oscillator is on (HSEON), otherwise usable as GPIO PH0.
13 PH1-OSC_OUT bidirectional Standard 3.3 V (TC) I/O; becomes the OSC_OUT HSE oscillator output when the HSE oscillator is on (HSEON), otherwise usable as GPIO PH1.
14 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
15 PC0 bidirectional 5 V tolerant (FT) I/O; function after reset is PC0, alternate functions LCD_SEG18 and ADC_IN10/COMP1_INP.
16 PC1 bidirectional 5 V tolerant (FT) I/O; function after reset is PC1, alternate functions LCD_SEG19 and ADC_IN11/COMP1_INP.
17 PC2 bidirectional 5 V tolerant (FT) I/O; function after reset is PC2, alternate functions LCD_SEG20 and ADC_IN12/COMP1_INP.
18 PC3 bidirectional Standard 3.3 V (TC) I/O; function after reset is PC3, alternate functions LCD_SEG21 and ADC_IN13/COMP1_INP.
19 VSSA power_in Analog ground pin for ADC, DAC and comparators.
20 VREF- power_in ADC negative reference voltage; VSSA or VREF- must be tied to ground, and VREF- can be internally connected to VSSA depending on the package.
21 VREF+ power_in ADC positive reference voltage, 1.8 V up to VDDA; it can be grounded if neither the ADC nor the DAC is used.
22 VDDA power_in Analog supply pin; the ADC characteristics specify VDDA from 1.8 V to 3.6 V.
23 PA0-WKUP1 bidirectional 5 V tolerant (FT) I/O; function after reset is PA0, alternate functions TIM2_CH1_ETR, TIM5_CH1, USART2_CTS, additional functions WKUP1, RTC_TAMP2, ADC_IN0 and COMP1_INP.
24 PA1 bidirectional 5 V tolerant (FT) I/O; function after reset is PA1, alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS and LCD_SEG0, additional functions ADC_IN1, COMP1_INP and OPAMP1_VINP.
25 PA2 bidirectional 5 V tolerant (FT) I/O; function after reset is PA2, alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX and LCD_SEG1, additional functions ADC_IN2, COMP1_INP and OPAMP1_VINM.
26 PA3 bidirectional Standard 3.3 V (TC) I/O; function after reset is PA3, alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX and LCD_SEG2, additional functions ADC_IN3, COMP1_INP and OPAMP1_VOUT.
27 VSS_4 power_in Digital ground pin; all voltages are referenced to VSS.
28 VDD_4 power_in Digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply.
29 PA4 bidirectional Standard 3.3 V (TC) I/O; function after reset is PA4, alternate functions SPI1_NSS, SPI3_NSS, I2S3_WS and USART2_CK, additional functions ADC_IN4, DAC_OUT1 and COMP1_INP.
30 PA5 bidirectional Standard 3.3 V (TC) I/O; function after reset is PA5, alternate functions TIM2_CH1_ETR and SPI1_SCK, additional functions ADC_IN5, DAC_OUT2 and COMP1_INP.
31 PA6 bidirectional 5 V tolerant (FT) I/O; function after reset is PA6, alternate functions TIM3_CH1, TIM10_CH1, SPI1_MISO and LCD_SEG3, additional functions ADC_IN6, COMP1_INP and OPAMP2_VINP.
32 PA7 bidirectional 5 V tolerant (FT) I/O; function after reset is PA7, alternate functions TIM3_CH2, TIM11_CH1, SPI1_MOSI and LCD_SEG4, additional functions ADC_IN7, COMP1_INP and OPAMP2_VINM.
33 PC4 bidirectional 5 V tolerant (FT) I/O; function after reset is PC4, alternate function LCD_SEG22, additional functions ADC_IN14 and COMP1_INP.
34 PC5 bidirectional 5 V tolerant (FT) I/O; function after reset is PC5, alternate function LCD_SEG23, additional functions ADC_IN15 and COMP1_INP.
35 PB0 bidirectional Standard 3.3 V (TC) I/O; function after reset is PB0, alternate functions TIM3_CH3 and LCD_SEG5, additional functions ADC_IN8, COMP1_INP, OPAMP2_VOUT and VREF_OUT.
36 PB1 bidirectional 5 V tolerant (FT) I/O; function after reset is PB1, alternate functions TIM3_CH4 and LCD_SEG6, additional functions ADC_IN9, COMP1_INP and VREF_OUT.
37 PB2/BOOT1 bidirectional 5 V tolerant (FT) I/O; function after reset is PB2/BOOT1, additional function ADC_IN0b.
38 PE7 bidirectional Standard 3.3 V (TC) I/O; function after reset is PE7, additional functions ADC_IN22 and COMP1_INP.
39 PE8 bidirectional Standard 3.3 V (TC) I/O; function after reset is PE8, additional functions ADC_IN23 and COMP1_INP.
40 PE9 bidirectional Standard 3.3 V (TC) I/O; function after reset is PE9, alternate function TIM2_CH1_ETR, additional functions ADC_IN24 and COMP1_INP.
41 PE10 bidirectional Standard 3.3 V (TC) I/O; function after reset is PE10, alternate function TIM2_CH2, additional functions ADC_IN25 and COMP1_INP.
42 PE11 bidirectional 5 V tolerant (FT) I/O; function after reset is PE11 and alternate function TIM2_CH3.
43 PE12 bidirectional 5 V tolerant (FT) I/O; function after reset is PE12, alternate functions TIM2_CH4 and SPI1_NSS.
44 PE13 bidirectional 5 V tolerant (FT) I/O; function after reset is PE13 and alternate function SPI1_SCK.
45 PE14 bidirectional 5 V tolerant (FT) I/O; function after reset is PE14 and alternate function SPI1_MISO.
46 PE15 bidirectional 5 V tolerant (FT) I/O; function after reset is PE15 and alternate function SPI1_MOSI.
47 PB10 bidirectional 5 V tolerant (FT) I/O; function after reset is PB10, alternate functions TIM2_CH3, I2C2_SCL, USART3_TX and LCD_SEG10.
48 PB11 bidirectional 5 V tolerant (FT) I/O; function after reset is PB11, alternate functions TIM2_CH4, I2C2_SDA, USART3_RX and LCD_SEG11.
49 VSS_1 power_in Digital ground pin; all voltages are referenced to VSS.
50 VDD_1 power_in Digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply.
51 PB12 bidirectional 5 V tolerant (FT) I/O; function after reset is PB12, alternate functions TIM10_CH1, I2C2_SMBA, SPI2_NSS, I2S2_WS, USART3_CK and LCD_SEG12, additional functions ADC_IN18 and COMP1_INP.
52 PB13 bidirectional 5 V tolerant (FT) I/O; function after reset is PB13, alternate functions TIM9_CH1, SPI2_SCK, I2S2_CK, USART3_CTS and LCD_SEG13, additional functions ADC_IN19 and COMP1_INP.
53 PB14 bidirectional 5 V tolerant (FT) I/O; function after reset is PB14, alternate functions TIM9_CH2, SPI2_MISO, USART3_RTS and LCD_SEG14, additional functions ADC_IN20 and COMP1_INP.
54 PB15 bidirectional 5 V tolerant (FT) I/O; function after reset is PB15, alternate functions TIM11_CH1, SPI2_MOSI, I2S2_SD and LCD_SEG15, additional functions ADC_IN21, COMP1_INP and RTC_REFIN.
55 PD8 bidirectional 5 V tolerant (FT) I/O; function after reset is PD8, alternate functions USART3_TX and LCD_SEG28.
56 PD9 bidirectional 5 V tolerant (FT) I/O; function after reset is PD9, alternate functions USART3_RX and LCD_SEG29.
57 PD10 bidirectional 5 V tolerant (FT) I/O; function after reset is PD10, alternate functions USART3_CK and LCD_SEG30.
58 PD11 bidirectional 5 V tolerant (FT) I/O; function after reset is PD11, alternate functions USART3_CTS and LCD_SEG31.
59 PD12 bidirectional 5 V tolerant (FT) I/O; function after reset is PD12, alternate functions TIM4_CH1, USART3_RTS and LCD_SEG32.
60 PD13 bidirectional 5 V tolerant (FT) I/O; function after reset is PD13, alternate functions TIM4_CH2 and LCD_SEG33.
61 PD14 bidirectional 5 V tolerant (FT) I/O; function after reset is PD14, alternate functions TIM4_CH3 and LCD_SEG34.
62 PD15 bidirectional 5 V tolerant (FT) I/O; function after reset is PD15, alternate functions TIM4_CH4 and LCD_SEG35.
63 PC6 bidirectional 5 V tolerant (FT) I/O; function after reset is PC6, alternate functions TIM3_CH1, I2S2_MCK and LCD_SEG24.
64 PC7 bidirectional 5 V tolerant (FT) I/O; function after reset is PC7, alternate functions TIM3_CH2, I2S3_MCK and LCD_SEG25.
65 PC8 bidirectional 5 V tolerant (FT) I/O; function after reset is PC8, alternate functions TIM3_CH3 and LCD_SEG26.
66 PC9 bidirectional 5 V tolerant (FT) I/O; function after reset is PC9, alternate functions TIM3_CH4 and LCD_SEG27.
67 PA8 bidirectional 5 V tolerant (FT) I/O; function after reset is PA8, alternate functions USART1_CK, MCO and LCD_COM0.
68 PA9 bidirectional 5 V tolerant (FT) I/O; function after reset is PA9, alternate functions USART1_TX and LCD_COM1.
69 PA10 bidirectional 5 V tolerant (FT) I/O; function after reset is PA10, alternate functions USART1_RX and LCD_COM2.
70 PA11 bidirectional 5 V tolerant (FT) I/O; function after reset is PA11, alternate functions USART1_CTS and SPI1_MISO, additional function USB_DM.
71 PA12 bidirectional 5 V tolerant (FT) I/O; function after reset is PA12, alternate functions USART1_RTS and SPI1_MOSI, additional function USB_DP.
72 PA13 bidirectional 5 V tolerant (FT) I/O; function after reset is JTMS-SWDIO (SWD data input/output).
73 PH2 bidirectional 5 V tolerant (FT) I/O; function after reset is PH2.
74 VSS_2 power_in Digital ground pin; all voltages are referenced to VSS.
75 VDD_2 power_in Digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply.
76 PA14 bidirectional 5 V tolerant (FT) I/O; function after reset is JTCK-SWCLK (SWD clock input).
77 PA15 bidirectional 5 V tolerant (FT) I/O; function after reset is JTDI, alternate functions TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, I2S3_WS and LCD_SEG17.
78 PC10 bidirectional 5 V tolerant (FT) I/O; function after reset is PC10, alternate functions SPI3_SCK, I2S3_CK, USART3_TX, UART4_TX, LCD_SEG28, LCD_SEG40 and LCD_COM4.
79 PC11 bidirectional 5 V tolerant (FT) I/O; function after reset is PC11, alternate functions SPI3_MISO, USART3_RX, UART4_RX, LCD_SEG29, LCD_SEG41 and LCD_COM5.
80 PC12 bidirectional 5 V tolerant (FT) I/O; function after reset is PC12, alternate functions SPI3_MOSI, I2S3_SD, USART3_CK, UART5_TX, LCD_SEG30, LCD_SEG42 and LCD_COM6.
81 PD0 bidirectional 5 V tolerant (FT) I/O; function after reset is PD0, alternate functions TIM9_CH1, SPI2_NSS and I2S2_WS.
82 PD1 bidirectional 5 V tolerant (FT) I/O; function after reset is PD1, alternate functions SPI2_SCK and I2S2_CK.
83 PD2 bidirectional 5 V tolerant (FT) I/O; function after reset is PD2, alternate functions TIM3_ETR, UART5_RX, LCD_SEG31, LCD_SEG43 and LCD_COM7.
84 PD3 bidirectional 5 V tolerant (FT) I/O; function after reset is PD3, alternate functions SPI2_MISO and USART2_CTS.
85 PD4 bidirectional 5 V tolerant (FT) I/O; function after reset is PD4, alternate functions SPI2_MOSI, I2S2_SD and USART2_RTS.
86 PD5 bidirectional 5 V tolerant (FT) I/O; function after reset is PD5, alternate function USART2_TX.
87 PD6 bidirectional 5 V tolerant (FT) I/O; function after reset is PD6, alternate function USART2_RX.
88 PD7 bidirectional 5 V tolerant (FT) I/O; function after reset is PD7, alternate functions TIM9_CH2 and USART2_CK.
89 PB3 bidirectional 5 V tolerant (FT) I/O; function after reset is JTDO, alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK, I2S3_CK and LCD_SEG7, additional function COMP2_INM.
90 PB4 bidirectional 5 V tolerant (FT) I/O; function after reset is NJTRST, alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO and LCD_SEG8, additional function COMP2_INP.
91 PB5 bidirectional 5 V tolerant (FT) I/O; function after reset is PB5, alternate functions TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, I2S3_SD and LCD_SEG9, additional function COMP2_INP.
92 PB6 bidirectional 5 V tolerant (FT) I/O; function after reset is PB6, alternate functions TIM4_CH1, I2C1_SCL and USART1_TX, additional function COMP2_INP.
93 PB7 bidirectional 5 V tolerant (FT) I/O; function after reset is PB7, alternate functions TIM4_CH2, I2C1_SDA and USART1_RX, additional functions COMP2_INP and PVD_IN.
94 BOOT0 input Dedicated BOOT0 input pin that selects the boot mode.
95 PB8 bidirectional 5 V tolerant (FT) I/O; function after reset is PB8, alternate functions TIM4_CH3, TIM10_CH1, I2C1_SCL and LCD_SEG16.
96 PB9 bidirectional 5 V tolerant (FT) I/O; function after reset is PB9, alternate functions TIM4_CH4, TIM11_CH1, I2C1_SDA and LCD_COM3.
97 PE0 bidirectional 5 V tolerant (FT) I/O; function after reset is PE0, alternate functions TIM4_ETR, TIM10_CH1 and LCD_SEG36.
98 PE1 bidirectional 5 V tolerant (FT) I/O; function after reset is PE1, alternate functions TIM11_CH1 and LCD_SEG37.
99 VSS_3 power_in Digital ground pin; all voltages are referenced to VSS.
100 VDD_3 power_in Digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32L152VET6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32l152vet6-etched.step / stm32l152vet6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l152vet6.step / stm32l152vet6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (136 pp, sha256 6ba5d188efc840bc, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF