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STM32L152RBT6A

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32L152RBT6A

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L152RBT6A from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VLCD power_in LCD power supply pin (VLCD); applicable to STM32L152xxxxA devices only, and in STM32L151xxxxA devices it must be connected to VDD.
2 PC13 bidirectional 5 V tolerant I/O (FT) with RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2 wakeup functions, floating input after reset.
3 PC14 bidirectional Standard 3.3 V I/O (TC) that is used as OSC32_IN only when the LSE oscillator is on (LSEON bit), otherwise it is general-purpose PC14.
4 PC15 bidirectional Standard 3.3 V I/O (TC) that is used as OSC32_OUT only when the LSE oscillator is on (LSEON bit), otherwise it is general-purpose PC15.
5 PH0 bidirectional Standard 3.3 V I/O (TC) that is used as OSC_IN only when the HSE oscillator is on (HSEON bit), otherwise it is general-purpose PH0.
6 PH1 bidirectional Standard 3.3 V I/O (TC) that is used as OSC_OUT only when the HSE oscillator is on (HSEON bit), otherwise it is general-purpose PH1.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
8 PC0 bidirectional 5 V tolerant I/O (FT) with LCD_SEG18, ADC_IN10 and COMP1_INP functions.
9 PC1 bidirectional 5 V tolerant I/O (FT) with LCD_SEG19, ADC_IN11 and COMP1_INP functions.
10 PC2 bidirectional 5 V tolerant I/O (FT) with LCD_SEG20, ADC_IN12 and COMP1_INP functions.
11 PC3 bidirectional Standard 3.3 V I/O (TC) with LCD_SEG21, ADC_IN13 and COMP1_INP functions; this pin exists in the LQFP64 package but not in TFBGA64.
12 VSSA power_in Analog ground pin; per the ADC section, VSSA or VREF- must be tied to ground.
13 VDDA power_in Analog supply pin; the ADC characteristics specify VDDA from 1.8 V to 3.6 V.
14 PA0 bidirectional 5 V tolerant I/O (FT) with WKUP1, USART2_CTS, TIM2_CH1_ETR, ADC_IN0, COMP1_INP and RTC_TAMP2 functions.
15 PA1 bidirectional 5 V tolerant I/O (FT) with USART2_RTS, TIM2_CH2, LCD_SEG0, ADC_IN1 and COMP1_INP functions.
16 PA2 bidirectional 5 V tolerant I/O (FT) with USART2_TX, TIM2_CH3, TIM9_CH1, LCD_SEG1, ADC_IN2 and COMP1_INP functions.
17 PA3 bidirectional Standard 3.3 V I/O (TC) with USART2_RX, TIM2_CH4, TIM9_CH2, LCD_SEG2, ADC_IN3 and COMP1_INP functions.
18 VSS_4 power_in Digital ground pin.
19 VDD_4 power_in Digital supply pin; the device power supply range is 1.65 V to 3.6 V.
20 PA4 bidirectional Standard 3.3 V I/O (TC) with SPI1_NSS, USART2_CK, ADC_IN4, DAC_OUT1 and COMP1_INP functions.
21 PA5 bidirectional Standard 3.3 V I/O (TC) with SPI1_SCK, TIM2_CH1_ETR, ADC_IN5, DAC_OUT2 and COMP1_INP functions.
22 PA6 bidirectional 5 V tolerant I/O (FT) with SPI1_MISO, TIM3_CH1, LCD_SEG3, TIM10_CH1, ADC_IN6 and COMP1_INP functions.
23 PA7 bidirectional 5 V tolerant I/O (FT) with SPI1_MOSI, TIM3_CH2, LCD_SEG4, TIM11_CH1, ADC_IN7 and COMP1_INP functions.
24 PC4 bidirectional 5 V tolerant I/O (FT) with LCD_SEG22, ADC_IN14 and COMP1_INP functions.
25 PC5 bidirectional 5 V tolerant I/O (FT) with LCD_SEG23, ADC_IN15 and COMP1_INP functions.
26 PB0 bidirectional Standard 3.3 V I/O (TC) with TIM3_CH3, LCD_SEG5, ADC_IN8, COMP1_INP, VREF_OUT and VLCDRAIL3 functions.
27 PB1 bidirectional 5 V tolerant I/O (FT) with TIM3_CH4, LCD_SEG6, ADC_IN9, COMP1_INP and VREF_OUT functions.
28 PB2 bidirectional 5 V tolerant I/O (FT) that also carries the BOOT1 and VLCDRAIL1 functions.
29 PB10 bidirectional 5 V tolerant I/O (FT) with I2C2_SCL, USART3_TX, TIM2_CH3 and LCD_SEG10 functions.
30 PB11 bidirectional 5 V tolerant I/O (FT) with I2C2_SDA, USART3_RX, TIM2_CH4 and LCD_SEG11 functions.
31 VSS_1 power_in Digital ground pin.
32 VDD_1 power_in Digital supply pin; the device power supply range is 1.65 V to 3.6 V.
33 PB12 bidirectional 5 V tolerant I/O (FT) with SPI2_NSS, I2C2_SMBA, USART3_CK, LCD_SEG12, TIM10_CH1, ADC_IN18, COMP1_INP and VLCDRAIL2 functions.
34 PB13 bidirectional 5 V tolerant I/O (FT) with SPI2_SCK, USART3_CTS, LCD_SEG13, TIM9_CH1, ADC_IN19 and COMP1_INP functions.
35 PB14 bidirectional 5 V tolerant I/O (FT) with SPI2_MISO, USART3_RTS, LCD_SEG14, TIM9_CH2, ADC_IN20 and COMP1_INP functions.
36 PB15 bidirectional 5 V tolerant I/O (FT) with SPI2_MOSI, LCD_SEG15, TIM11_CH1, ADC_IN21, COMP1_INP and RTC_REFIN functions.
37 PC6 bidirectional 5 V tolerant I/O (FT) with TIM3_CH1 and LCD_SEG24 functions.
38 PC7 bidirectional 5 V tolerant I/O (FT) with TIM3_CH2 and LCD_SEG25 functions.
39 PC8 bidirectional 5 V tolerant I/O (FT) with TIM3_CH3 and LCD_SEG26 functions.
40 PC9 bidirectional 5 V tolerant I/O (FT) with TIM3_CH4 and LCD_SEG27 functions.
41 PA8 bidirectional 5 V tolerant I/O (FT) with USART1_CK, MCO and LCD_COM0 functions.
42 PA9 bidirectional 5 V tolerant I/O (FT) with USART1_TX and LCD_COM1 functions.
43 PA10 bidirectional 5 V tolerant I/O (FT) with USART1_RX and LCD_COM2 functions.
44 PA11 bidirectional 5 V tolerant I/O (FT) with USART1_CTS, SPI1_MISO and USB_DM functions.
45 PA12 bidirectional 5 V tolerant I/O (FT) with USART1_RTS, SPI1_MOSI and USB_DP functions.
46 PA13 bidirectional 5 V tolerant I/O (FT) whose main function after reset is the JTMS-SWDIO serial wire debug data pin.
47 VSS_2 power_in Digital ground pin.
48 VDD_2 power_in Digital supply pin; the device power supply range is 1.65 V to 3.6 V.
49 PA14 bidirectional 5 V tolerant I/O (FT) whose main function after reset is the JTCK-SWCLK serial wire debug clock pin.
50 PA15 bidirectional 5 V tolerant I/O (FT) with JTDI, TIM2_CH1_ETR, SPI1_NSS and LCD_SEG17 functions.
51 PC10 bidirectional 5 V tolerant I/O (FT) with USART3_TX, LCD_SEG28, LCD_SEG40 and LCD_COM4 functions.
52 PC11 bidirectional 5 V tolerant I/O (FT) with USART3_RX, LCD_SEG29, LCD_SEG41 and LCD_COM5 functions.
53 PC12 bidirectional 5 V tolerant I/O (FT) with USART3_CK, LCD_SEG30, LCD_SEG42 and LCD_COM6 functions.
54 PD2 bidirectional 5 V tolerant I/O (FT) with TIM3_ETR, LCD_SEG31, LCD_SEG43 and LCD_COM7 functions.
55 PB3 bidirectional 5 V tolerant I/O (FT) whose main function after reset is JTDO, with TIM2_CH2, SPI1_SCK, LCD_SEG7 and COMP2_INM functions.
56 PB4 bidirectional 5 V tolerant I/O (FT) whose main function after reset is NJTRST, with TIM3_CH1, SPI1_MISO, LCD_SEG8 and COMP2_INP functions.
57 PB5 bidirectional 5 V tolerant I/O (FT) with I2C1_SMBA, TIM3_CH2, SPI1_MOSI, LCD_SEG9 and COMP2_INP functions.
58 PB6 bidirectional 5 V tolerant I/O (FT) with I2C1_SCL, TIM4_CH1 and USART1_TX functions.
59 PB7 bidirectional 5 V tolerant I/O (FT) with I2C1_SDA, TIM4_CH2, USART1_RX and PVD_IN functions.
60 BOOT0 input Dedicated BOOT0 input pin used to select the boot mode.
61 PB8 bidirectional 5 V tolerant I/O (FT) with TIM4_CH3, I2C1_SCL, LCD_SEG16 and TIM10_CH1 functions.
62 PB9 bidirectional 5 V tolerant I/O (FT) with TIM4_CH4, I2C1_SDA, LCD_COM3 and TIM11_CH1 functions.
63 VSS_3 power_in Digital ground pin.
64 VDD_3 power_in Digital supply pin; the device power supply range is 1.65 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32L152RBT6A
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32l152rbt6a-etched.step / stm32l152rbt6a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l152rbt6a.step / stm32l152rbt6a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (130 pp, sha256 e5e0ab791f4e7879, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF