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STM32L152CCT6

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by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32l152cct6factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Contents

README

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STM32L152CCT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32L152CCT6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VLCD power_in LCD power supply pin, applicable to STM32L152xC devices only; on STM32L151xC devices it must be connected to VDD.
2 PC13 bidirectional I/O (FT, 5 V tolerant), default function PC13 with WKUP2 wakeup and RTC_TAMP1/RTC_TS/RTC_OUT as additional functions.
3 PC14 bidirectional I/O (TC, standard 3.3 V) that is configured as OSC32_IN only when the LSE oscillator is on (LSEON in RCC_CSR); otherwise it is general-purpose PC14.
4 PC15 bidirectional I/O (TC, standard 3.3 V) that is configured as OSC32_OUT only when the LSE oscillator is on (LSEON in RCC_CSR); otherwise it is general-purpose PC15.
5 PH0 bidirectional I/O (TC, standard 3.3 V) that is configured as OSC_IN only when the HSE oscillator is on (HSEON in RCC_CR); otherwise it is general-purpose PH0.
6 PH1 bidirectional I/O (TC, standard 3.3 V) that is configured as OSC_OUT only when the HSE oscillator is on (HSEON in RCC_CR); otherwise it is general-purpose PH1.
7 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
8 VSSA power_in Analog ground pin; the ADC section requires VSSA or VREF- to be tied to ground.
9 VDDA power_in Analog supply pin; the ADC characteristics specify VDDA from 1.8 V to 3.6 V.
10 PA0 bidirectional I/O (FT, 5 V tolerant) with WKUP1 wakeup and ADC_IN0, COMP1_INP, TIM2_CH1_ETR, TIM5_CH1 and USART2_CTS alternate functions.
11 PA1 bidirectional I/O (FT, 5 V tolerant) with TIM2_CH2, TIM5_CH2, USART2_RTS, LCD_SEG0, ADC_IN1, COMP1_INP and OPAMP1_VINP alternate functions.
12 PA2 bidirectional I/O (FT, 5 V tolerant) with TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, LCD_SEG1, ADC_IN2, COMP1_INP and OPAMP1_VINM alternate functions.
13 PA3 bidirectional I/O (TC, standard 3.3 V) with TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_SEG2, ADC_IN3, COMP1_INP and OPAMP1_VOUT alternate functions.
14 PA4 bidirectional I/O (TC, standard 3.3 V) with SPI1_NSS, SPI3_NSS, I2S3_WS, USART2_CK, ADC_IN4, DAC_OUT1 and COMP1_INP alternate functions.
15 PA5 bidirectional I/O (TC, standard 3.3 V) with TIM2_CH1_ETR, SPI1_SCK, ADC_IN5, DAC_OUT2 and COMP1_INP alternate functions.
16 PA6 bidirectional I/O (FT, 5 V tolerant) with TIM3_CH1, TIM10_CH1, SPI1_MISO, LCD_SEG3, ADC_IN6, COMP1_INP and OPAMP2_VINP alternate functions.
17 PA7 bidirectional I/O (FT, 5 V tolerant) with TIM3_CH2, TIM11_CH1, SPI1_MOSI, LCD_SEG4, ADC_IN7, COMP1_INP and OPAMP2_VINM alternate functions.
18 PB0 bidirectional I/O (TC, standard 3.3 V) with TIM3_CH3, LCD_SEG5, ADC_IN8, COMP1_INP, OPAMP2_VOUT, VLCDRAIL3 and VREF_OUT alternate functions.
19 PB1 bidirectional I/O (FT, 5 V tolerant) with TIM3_CH4, LCD_SEG6, ADC_IN9, COMP1_INP and VREF_OUT alternate functions.
20 PB2 bidirectional I/O (FT, 5 V tolerant) whose alternate function is BOOT1, with VLCDRAIL1 and ADCIN0b also listed.
21 PB10 bidirectional I/O (FT, 5 V tolerant) with TIM2_CH3, I2C2_SCL, USART3_TX and LCD_SEG10 alternate functions.
22 PB11 bidirectional I/O (FT, 5 V tolerant) with TIM2_CH4, I2C2_SDA, USART3_RX and LCD_SEG11 alternate functions.
23 VSS_1 power_in Ground pin.
24 VDD_1 power_in Digital supply pin.
25 PB12 bidirectional I/O (FT, 5 V tolerant) with TIM10_CH1, I2C2_SMBA, SPI2_NSS, I2S2_WS, USART3_CK, LCD_SEG12, ADC_IN18, COMP1_INP and VLCDRAIL2 alternate functions.
26 PB13 bidirectional I/O (FT, 5 V tolerant) with TIM9_CH1, SPI2_SCK, I2S2_CK, USART3_CTS, LCD_SEG13, ADC_IN19 and COMP1_INP alternate functions.
27 PB14 bidirectional I/O (FT, 5 V tolerant) with TIM9_CH2, SPI2_MISO, USART3_RTS, LCD_SEG14, ADC_IN20 and COMP1_INP alternate functions.
28 PB15 bidirectional I/O (FT, 5 V tolerant) with TIM11_CH1, SPI2_MOSI, I2S2_SD, LCD_SEG15, ADC_IN21, COMP1_INP and RTC_REFIN alternate functions.
29 PA8 bidirectional I/O (FT, 5 V tolerant) with USART1_CK, MCO and LCD_COM0 alternate functions.
30 PA9 bidirectional I/O (FT, 5 V tolerant) with USART1_TX and LCD_COM1 alternate functions.
31 PA10 bidirectional I/O (FT, 5 V tolerant) with USART1_RX and LCD_COM2 alternate functions.
32 PA11 bidirectional I/O (FT, 5 V tolerant) with USART1_CTS, SPI1_MISO and USB_DM alternate functions.
33 PA12 bidirectional I/O (FT, 5 V tolerant) with USART1_RTS, SPI1_MOSI and USB_DP alternate functions.
34 PA13 bidirectional I/O (FT, 5 V tolerant) whose main function after reset is JTMS-SWDIO (serial wire debug data).
35 VSS_2 power_in Ground pin.
36 VDD_2 power_in Digital supply pin.
37 PA14 bidirectional I/O (FT, 5 V tolerant) whose main function after reset is JTCK-SWCLK (serial wire debug clock).
38 PA15 bidirectional I/O (FT, 5 V tolerant) whose main function after reset is JTDI, with TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, I2S3_WS and LCD_SEG17 alternate functions.
39 PB3 bidirectional I/O (FT, 5 V tolerant) whose main function after reset is JTDO, with TIM2_CH2, SPI1_SCK, SPI3_SCK, I2S3_CK, LCD_SEG7 and COMP2_INM alternate functions.
40 PB4 bidirectional I/O (FT, 5 V tolerant) whose main function after reset is NJTRST, with TIM3_CH1, SPI1_MISO, SPI3_MISO, LCD_SEG8 and COMP2_INP alternate functions.
41 PB5 bidirectional I/O (FT, 5 V tolerant) with TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, I2S3_SD, LCD_SEG9 and COMP2_INP alternate functions.
42 PB6 bidirectional I/O (FT, 5 V tolerant) with TIM4_CH1, I2C1_SCL, USART1_TX and COMP2_INP alternate functions.
43 PB7 bidirectional I/O (FT, 5 V tolerant) with TIM4_CH2, I2C1_SDA, USART1_RX, COMP2_INP and PVD_IN alternate functions.
44 BOOT0 input Dedicated BOOT0 input pin (input only).
45 PB8 bidirectional I/O (FT, 5 V tolerant) with TIM4_CH3, TIM10_CH1, I2C1_SCL and LCD_SEG16 alternate functions.
46 PB9 bidirectional I/O (FT, 5 V tolerant) with TIM4_CH4, TIM11_CH1, I2C1_SDA and LCD_COM3 alternate functions.
47 VSS_3 power_in Ground pin.
48 VDD_3 power_in Digital supply pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32L152CCT6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32l152cct6-etched.step / stm32l152cct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l152cct6.step / stm32l152cct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (136 pp, sha256 5e6d5674cd06c108, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF