component
STM32L152C6U6A
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
main
STM32L152C6U6A
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)
STM32L152C6U6A from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VLCD | power_in | LCD power supply pin, applicable to STM32L152xx devices only; on STM32L151xx devices this pin should be connected to VDD. |
| 2 | PC13-WKUP2 | bidirectional | Standard 5 V tolerant (FT) general-purpose I/O, also RTC_TAMP1/RTC_TS/RTC_OUT and WKUP2 wakeup input. |
| 3 | PC14-OSC32_IN | bidirectional | Standard 3.3 V (TC) general-purpose I/O, used as OSC32_IN only when the LSE oscillator is on (LSEON); the LSE has priority over the GPIO function. |
| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V (TC) general-purpose I/O, used as OSC32_OUT only when the LSE oscillator is on (LSEON); the LSE has priority over the GPIO function. |
| 5 | PH0-OSC_IN | bidirectional | Standard 3.3 V (TC) general-purpose I/O, used as OSC_IN only when the HSE oscillator is on (HSEON); the HSE has priority over the GPIO function. |
| 6 | PH1-OSC_OUT | bidirectional | Standard 3.3 V (TC) general-purpose I/O, used as OSC_OUT only when the HSE oscillator is on (HSEON); the HSE has priority over the GPIO function. |
| 7 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| 8 | VSSA | power_in | Analog ground pin; VSSA must be tied to ground. |
| 9 | VDDA | power_in | Analog supply pin; VDDA range is 1.8 V to 3.6 V per the ADC characteristics. |
| 10 | PA0-WKUP1 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also WKUP1 wakeup, ADC_IN0, COMP1_INP, USART2_CTS and TIM2_CH1_ETR. |
| 11 | PA1 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN1, COMP1_INP, USART2_RTS, TIM2_CH2 and LCD_SEG0. |
| 12 | PA2 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN2, COMP1_INP, USART2_TX, TIM2_CH3, TIM9_CH1 and LCD_SEG1. |
| 13 | PA3 | bidirectional | Standard 3.3 V (TC) general-purpose I/O, also ADC_IN3, COMP1_INP, USART2_RX, TIM2_CH4, TIM9_CH2 and LCD_SEG2. |
| 14 | PA4 | bidirectional | Standard 3.3 V (TC) general-purpose I/O, also ADC_IN4, DAC_OUT1, COMP1_INP, SPI1_NSS and USART2_CK. |
| 15 | PA5 | bidirectional | Standard 3.3 V (TC) general-purpose I/O, also ADC_IN5, DAC_OUT2, COMP1_INP, SPI1_SCK and TIM2_CH1_ETR. |
| 16 | PA6 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN6, COMP1_INP, SPI1_MISO, TIM3_CH1, LCD_SEG3 and TIM10_CH1. |
| 17 | PA7 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN7, COMP1_INP, SPI1_MOSI, TIM3_CH2, LCD_SEG4 and TIM11_CH1. |
| 18 | PB0 | bidirectional | Standard 3.3 V (TC) general-purpose I/O, also ADC_IN8, COMP1_INP, VREF_OUT, TIM3_CH3 and LCD_SEG5. |
| 19 | PB1 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN9, COMP1_INP, VREF_OUT, TIM3_CH4 and LCD_SEG6. |
| 20 | PB2/BOOT1 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also used as BOOT1 boot mode selection pin. |
| 21 | PB10 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C2_SCL, USART3_TX, TIM2_CH3 and LCD_SEG10. |
| 22 | PB11 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C2_SDA, USART3_RX, TIM2_CH4 and LCD_SEG11. |
| 23 | VSS_1 | power_in | Digital ground pin. |
| 24 | VDD_1 | power_in | Digital supply pin. |
| 25 | PB12 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN18, COMP1_INP, SPI2_NSS, I2C2_SMBA, USART3_CK, LCD_SEG12 and TIM10_CH1. |
| 26 | PB13 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN19, COMP1_INP, SPI2_SCK, USART3_CTS, LCD_SEG13 and TIM9_CH1. |
| 27 | PB14 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN20, COMP1_INP, SPI2_MISO, USART3_RTS, LCD_SEG14 and TIM9_CH2. |
| 28 | PB15 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN21, COMP1_INP, RTC_REFIN, SPI2_MOSI, LCD_SEG15 and TIM11_CH1. |
| 29 | PA8 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also MCO, USART1_CK and LCD_COM0. |
| 30 | PA9 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also USART1_TX and LCD_COM1. |
| 31 | PA10 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also USART1_RX and LCD_COM2. |
| 32 | PA11 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also USART1_CTS, SPI1_MISO and USB_DM. |
| 33 | PA12 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also USART1_RTS, SPI1_MOSI and USB_DP. |
| 34 | PA13 | bidirectional | 5 V tolerant (FT) pin, main function JTMS-SWDIO after reset (serial wire debug data I/O). |
| 35 | VSS_2 | power_in | Digital ground pin. |
| 36 | VDD_2 | power_in | Digital supply pin. |
| 37 | PA14 | bidirectional | 5 V tolerant (FT) pin, main function JTCK-SWCLK after reset (serial wire debug clock). |
| 38 | PA15 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also JTDI, TIM2_CH1_ETR, SPI1_NSS and LCD_SEG17. |
| 39 | PB3 | bidirectional | 5 V tolerant (FT) general-purpose I/O, main function JTDO after reset, also TIM2_CH2, SPI1_SCK, LCD_SEG7 and COMP2_INM. |
| 40 | PB4 | bidirectional | 5 V tolerant (FT) general-purpose I/O, main function NJTRST after reset, also TIM3_CH1, SPI1_MISO, LCD_SEG8 and COMP2_INP. |
| 41 | PB5 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C1_SMBA, TIM3_CH2, SPI1_MOSI, LCD_SEG9 and COMP2_INP. |
| 42 | PB6 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C1_SCL, TIM4_CH1 and USART1_TX. |
| 43 | PB7 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C1_SDA, TIM4_CH2, USART1_RX and PVD_IN. |
| 44 | BOOT0 | input | Dedicated BOOT0 input pin (standard 3.3 V input, type B) used for boot mode selection. |
| 45 | PB8 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also TIM4_CH3, I2C1_SCL, LCD_SEG16 and TIM10_CH1. |
| 46 | PB9 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also TIM4_CH4, I2C1_SDA, LCD_COM3 and TIM11_CH1. |
| 47 | VSS_3 | power_in | Digital ground pin. |
| 48 | VDD_3 | power_in | Digital supply pin. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
STM32L152C6U6A - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32l152c6u6a-etched.step/stm32l152c6u6a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l152c6u6a.step/stm32l152c6u6a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (133 pp, sha256
5223296de36fe904, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM32L152C6U6A
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)
STM32L152C6U6A from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VLCD | power_in | LCD power supply pin, applicable to STM32L152xx devices only; on STM32L151xx devices this pin should be connected to VDD. |
| 2 | PC13-WKUP2 | bidirectional | Standard 5 V tolerant (FT) general-purpose I/O, also RTC_TAMP1/RTC_TS/RTC_OUT and WKUP2 wakeup input. |
| 3 | PC14-OSC32_IN | bidirectional | Standard 3.3 V (TC) general-purpose I/O, used as OSC32_IN only when the LSE oscillator is on (LSEON); the LSE has priority over the GPIO function. |
| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V (TC) general-purpose I/O, used as OSC32_OUT only when the LSE oscillator is on (LSEON); the LSE has priority over the GPIO function. |
| 5 | PH0-OSC_IN | bidirectional | Standard 3.3 V (TC) general-purpose I/O, used as OSC_IN only when the HSE oscillator is on (HSEON); the HSE has priority over the GPIO function. |
| 6 | PH1-OSC_OUT | bidirectional | Standard 3.3 V (TC) general-purpose I/O, used as OSC_OUT only when the HSE oscillator is on (HSEON); the HSE has priority over the GPIO function. |
| 7 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| 8 | VSSA | power_in | Analog ground pin; VSSA must be tied to ground. |
| 9 | VDDA | power_in | Analog supply pin; VDDA range is 1.8 V to 3.6 V per the ADC characteristics. |
| 10 | PA0-WKUP1 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also WKUP1 wakeup, ADC_IN0, COMP1_INP, USART2_CTS and TIM2_CH1_ETR. |
| 11 | PA1 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN1, COMP1_INP, USART2_RTS, TIM2_CH2 and LCD_SEG0. |
| 12 | PA2 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN2, COMP1_INP, USART2_TX, TIM2_CH3, TIM9_CH1 and LCD_SEG1. |
| 13 | PA3 | bidirectional | Standard 3.3 V (TC) general-purpose I/O, also ADC_IN3, COMP1_INP, USART2_RX, TIM2_CH4, TIM9_CH2 and LCD_SEG2. |
| 14 | PA4 | bidirectional | Standard 3.3 V (TC) general-purpose I/O, also ADC_IN4, DAC_OUT1, COMP1_INP, SPI1_NSS and USART2_CK. |
| 15 | PA5 | bidirectional | Standard 3.3 V (TC) general-purpose I/O, also ADC_IN5, DAC_OUT2, COMP1_INP, SPI1_SCK and TIM2_CH1_ETR. |
| 16 | PA6 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN6, COMP1_INP, SPI1_MISO, TIM3_CH1, LCD_SEG3 and TIM10_CH1. |
| 17 | PA7 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN7, COMP1_INP, SPI1_MOSI, TIM3_CH2, LCD_SEG4 and TIM11_CH1. |
| 18 | PB0 | bidirectional | Standard 3.3 V (TC) general-purpose I/O, also ADC_IN8, COMP1_INP, VREF_OUT, TIM3_CH3 and LCD_SEG5. |
| 19 | PB1 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN9, COMP1_INP, VREF_OUT, TIM3_CH4 and LCD_SEG6. |
| 20 | PB2/BOOT1 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also used as BOOT1 boot mode selection pin. |
| 21 | PB10 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C2_SCL, USART3_TX, TIM2_CH3 and LCD_SEG10. |
| 22 | PB11 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C2_SDA, USART3_RX, TIM2_CH4 and LCD_SEG11. |
| 23 | VSS_1 | power_in | Digital ground pin. |
| 24 | VDD_1 | power_in | Digital supply pin. |
| 25 | PB12 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN18, COMP1_INP, SPI2_NSS, I2C2_SMBA, USART3_CK, LCD_SEG12 and TIM10_CH1. |
| 26 | PB13 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN19, COMP1_INP, SPI2_SCK, USART3_CTS, LCD_SEG13 and TIM9_CH1. |
| 27 | PB14 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN20, COMP1_INP, SPI2_MISO, USART3_RTS, LCD_SEG14 and TIM9_CH2. |
| 28 | PB15 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also ADC_IN21, COMP1_INP, RTC_REFIN, SPI2_MOSI, LCD_SEG15 and TIM11_CH1. |
| 29 | PA8 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also MCO, USART1_CK and LCD_COM0. |
| 30 | PA9 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also USART1_TX and LCD_COM1. |
| 31 | PA10 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also USART1_RX and LCD_COM2. |
| 32 | PA11 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also USART1_CTS, SPI1_MISO and USB_DM. |
| 33 | PA12 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also USART1_RTS, SPI1_MOSI and USB_DP. |
| 34 | PA13 | bidirectional | 5 V tolerant (FT) pin, main function JTMS-SWDIO after reset (serial wire debug data I/O). |
| 35 | VSS_2 | power_in | Digital ground pin. |
| 36 | VDD_2 | power_in | Digital supply pin. |
| 37 | PA14 | bidirectional | 5 V tolerant (FT) pin, main function JTCK-SWCLK after reset (serial wire debug clock). |
| 38 | PA15 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also JTDI, TIM2_CH1_ETR, SPI1_NSS and LCD_SEG17. |
| 39 | PB3 | bidirectional | 5 V tolerant (FT) general-purpose I/O, main function JTDO after reset, also TIM2_CH2, SPI1_SCK, LCD_SEG7 and COMP2_INM. |
| 40 | PB4 | bidirectional | 5 V tolerant (FT) general-purpose I/O, main function NJTRST after reset, also TIM3_CH1, SPI1_MISO, LCD_SEG8 and COMP2_INP. |
| 41 | PB5 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C1_SMBA, TIM3_CH2, SPI1_MOSI, LCD_SEG9 and COMP2_INP. |
| 42 | PB6 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C1_SCL, TIM4_CH1 and USART1_TX. |
| 43 | PB7 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also I2C1_SDA, TIM4_CH2, USART1_RX and PVD_IN. |
| 44 | BOOT0 | input | Dedicated BOOT0 input pin (standard 3.3 V input, type B) used for boot mode selection. |
| 45 | PB8 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also TIM4_CH3, I2C1_SCL, LCD_SEG16 and TIM10_CH1. |
| 46 | PB9 | bidirectional | 5 V tolerant (FT) general-purpose I/O, also TIM4_CH4, I2C1_SDA, LCD_COM3 and TIM11_CH1. |
| 47 | VSS_3 | power_in | Digital ground pin. |
| 48 | VDD_3 | power_in | Digital supply pin. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |
## CAD (KiCad official)
- Symbol: `STM32L152C6U6A`
- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`
- 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `stm32l152c6u6a-etched.step` / `stm32l152c6u6a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l152c6u6a.step` / `stm32l152c6u6a.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588924158793564160) (133 pp, sha256 `5223296de36fe904`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm32l152c6u6a-datasheet.pdf)