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STM32L151VDT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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docs stm32l151vdt6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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package.json Publish 0.1.0 · Ray 6d ago
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README.md Initial commit: component/stm32l151vdt6 · Ray 6d ago
stm32l151vdt6-etched.fit.json stm32l151vdt6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32l151vdt6-etched.glb stm32l151vdt6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32l151vdt6-etched.step stm32l151vdt6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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STM32L151VDT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32L151VDT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO port E pin 2, supports TIM3_ETR, LCD_SEG38, TRACECLK, FSMC_A23 alternate functions; 5V tolerant I/O.
2 PE3 bidirectional GPIO port E pin 3, supports TIM3_CH1, LCD_SEG39, TRACED0, FSMC_A19 alternate functions; 5V tolerant I/O.
3 PE4 bidirectional GPIO port E pin 4, supports TIM3_CH2, TRACED1, FSMC_A20 alternate functions; 5V tolerant I/O.
4 PE5 bidirectional GPIO port E pin 5, supports TIM9_CH1, TRACED2, FSMC_A21 alternate functions; 5V tolerant I/O.
5 PE6-WKUP3 bidirectional GPIO port E pin 6 with RTC wakeup capability (WKUP3), supports TIM9_CH2, TRACED3 alternate functions; 5V tolerant I/O.
6 VLCD power_in LCD voltage supply pin for STM32L152xD devices; connect to VDD in STM32L151xD devices.
7 PC13-WKUP2 bidirectional GPIO port C pin 13 with RTC wakeup, timestamp, and output capabilities (WKUP2/RTC_TAMP1/RTC_TS/RTC_OUT); standard 3.3V I/O.
8 PC14-OSC32_IN bidirectional GPIO port C pin 14 / 32 kHz oscillator input (OSC32_IN); standard 3.3V I/O, active when LSE oscillator enabled.
9 PC15-OSC32_OUT bidirectional GPIO port C pin 15 / 32 kHz oscillator output (OSC32_OUT); standard 3.3V I/O, active when LSE oscillator enabled.
10 VSS_5 power_in Ground (supply negative) pin 5; connect to system ground.
11 VDD_5 power_in Supply voltage (1.65-3.6 V) pin 5; bypass with 100 nF capacitor close to pin.
12 PH0-OSC_IN bidirectional GPIO port H pin 0 / High-speed external oscillator input (OSC_IN); standard 3.3V I/O, active when HSE oscillator enabled.
13 PH1-OSC_OUT bidirectional GPIO port H pin 1 / High-speed external oscillator output (OSC_OUT); standard 3.3V I/O, active when HSE oscillator enabled.
14 NRST input External reset pin with embedded weak pull-up resistor; active low asynchronous reset to internal logic.
15 PC0 bidirectional GPIO port C pin 0, supports LCD_SEG18, ADC_IN10/COMP1_INP alternate functions; 5V tolerant I/O.
16 PC1 bidirectional GPIO port C pin 1, supports LCD_SEG19, ADC_IN11/COMP1_INP/OPAMP3_VINP alternate functions; 5V tolerant I/O.
17 PC2 bidirectional GPIO port C pin 2, supports LCD_SEG20, ADC_IN12/COMP1_INP/OPAMP3_VINM alternate functions; 5V tolerant I/O.
18 PC3 bidirectional GPIO port C pin 3, supports LCD_SEG21, ADC_IN13/COMP1_INP/OPAMP3_VOUT alternate functions; standard 3.3V I/O.
19 VSSA power_in Analog ground (supply negative) for ADC, DAC, comparators, and operational amplifiers.
20 VREF- power_in Negative reference voltage for ADC and DAC; connect to VSSA or ground.
21 VREF+ power_in Positive reference voltage for ADC and DAC (1.8-3.6 V); bypass with 100 nF capacitor.
22 VDDA power_in Analog supply voltage (1.8-3.6 V) for ADC, DAC, comparators, and operational amplifiers; bypass with 100 nF capacitor.
23 PA0-WKUP1 bidirectional GPIO port A pin 0 with RTC wakeup capability (WKUP1/RTC_TAMP2), supports TIM2_CH1_ETR, TIM5_CH1, USART2_CTS, ADC_IN0/COMP1_INP alternate functions; 5V tolerant I/O.
24 PA1 bidirectional GPIO port A pin 1, supports TIM2_CH2, TIM5_CH2, USART2_RTS, LCD_SEG0, ADC_IN1/COMP1_INP/OPAMP1_VINP alternate functions; 5V tolerant I/O.
25 PA2 bidirectional GPIO port A pin 2, supports TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, LCD_SEG1, ADC_IN2/COMP1_INP/OPAMP1_VINM alternate functions; 5V tolerant I/O.
26 PA3 bidirectional GPIO port A pin 3, supports TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_SEG2, ADC_IN3/COMP1_INP/OPAMP1_VOUT alternate functions; standard 3.3V I/O.
27 VSS_4 power_in Ground (supply negative) pin 4; connect to system ground.
28 VDD_4 power_in Supply voltage (1.65-3.6 V) pin 4; bypass with 100 nF capacitor close to pin.
29 PA4 bidirectional GPIO port A pin 4, supports SPI1_NSS, SPI3_NSS, I2S3_WS, USART2_CK, ADC_IN4, DAC_OUT1, COMP1_INP alternate functions; standard 3.3V I/O.
30 PA5 bidirectional GPIO port A pin 5, supports TIM2_CH1_ETR, SPI1_SCK, ADC_IN5, DAC_OUT2, COMP1_INP alternate functions; standard 3.3V I/O.
31 PA6 bidirectional GPIO port A pin 6, supports TIM3_CH1, TIM10_CH1, SPI1_MISO, LCD_SEG3, ADC_IN6, COMP1_INP, OPAMP2_VINP alternate functions; 5V tolerant I/O.
32 PA7 bidirectional GPIO port A pin 7, supports TIM3_CH2, TIM11_CH1, SPI1_MOSI, LCD_SEG4, ADC_IN7, COMP1_INP, OPAMP2_VINM alternate functions; 5V tolerant I/O.
33 PC4 bidirectional GPIO port C pin 4, supports LCD_SEG22, ADC_IN14, COMP1_INP alternate functions; 5V tolerant I/O.
34 PC5 bidirectional GPIO port C pin 5, supports LCD_SEG23, ADC_IN15, COMP1_INP alternate functions; 5V tolerant I/O.
35 PB0 bidirectional GPIO port B pin 0, supports TIM3_CH3, LCD_SEG5, ADC_IN8, COMP1_INP, OPAMP2_VOUT, VREF_OUT alternate functions; standard 3.3V I/O.
36 PB1 bidirectional GPIO port B pin 1, supports TIM3_CH4, LCD_SEG6, ADC_IN9, COMP1_INP, VREF_OUT alternate functions; 5V tolerant I/O.
37 PB2/BOOT1 bidirectional GPIO port B pin 2 with BOOT1 functionality, supports ADC_IN0b alternate function; 5V tolerant I/O.
38 PE7 bidirectional GPIO port E pin 7, supports FSMC_D4, ADC_IN22, COMP1_INP alternate functions; standard 3.3V I/O.
39 PE8 bidirectional GPIO port E pin 8, supports FSMC_D5, ADC_IN23, COMP1_INP alternate functions; standard 3.3V I/O.
40 PE9 bidirectional GPIO port E pin 9, supports TIM2_CH1_ETR, FSMC_D6, ADC_IN24, COMP1_INP alternate functions; standard 3.3V I/O.
41 PE10 bidirectional GPIO port E pin 10, supports TIM2_CH2, FSMC_D7, ADC_IN25, COMP1_INP alternate functions; standard 3.3V I/O.
42 PE11 bidirectional GPIO port E pin 11, supports TIM2_CH3, FSMC_D8 alternate functions; 5V tolerant I/O.
43 PE12 bidirectional GPIO port E pin 12, supports TIM2_CH4, SPI1_NSS, FSMC_D9 alternate functions; 5V tolerant I/O.
44 PE13 bidirectional GPIO port E pin 13, supports SPI1_SCK, FSMC_D10 alternate functions; 5V tolerant I/O.
45 PE14 bidirectional GPIO port E pin 14, supports SPI1_MISO, FSMC_D11 alternate functions; 5V tolerant I/O.
46 PE15 bidirectional GPIO port E pin 15, supports SPI1_MOSI, FSMC_D12 alternate functions; 5V tolerant I/O.
47 PB10 bidirectional GPIO port B pin 10, supports TIM2_CH3, I2C2_SCL, USART3_TX, LCD_SEG10 alternate functions; 5V tolerant I/O.
48 PB11 bidirectional GPIO port B pin 11, supports TIM2_CH4, I2C2_SDA, USART3_RX, LCD_SEG11 alternate functions; 5V tolerant I/O.
49 VSS_1 power_in Ground (supply negative) pin 1; connect to system ground.
50 VDD_1 power_in Supply voltage (1.65-3.6 V) pin 1; bypass with 100 nF capacitor close to pin.
51 PB12 bidirectional GPIO port B pin 12, supports TIM10_CH1, I2C2_SMBA, SPI2_NSS, I2S2_WS, USART3_CK, LCD_SEG12, ADC_IN18, COMP1_INP alternate functions; 5V tolerant I/O.
52 PB13 bidirectional GPIO port B pin 13, supports TIM9_CH1, SPI2_SCK, I2S2_CK, USART3_CTS, LCD_SEG13, ADC_IN19, COMP1_INP alternate functions; 5V tolerant I/O.
53 PB14 bidirectional GPIO port B pin 14, supports TIM9_CH2, SPI2_MISO, USART3_RTS, LCD_SEG14, ADC_IN20, COMP1_INP alternate functions; 5V tolerant I/O.
54 PB15 bidirectional GPIO port B pin 15, supports TIM11_CH1, SPI2_MOSI, I2S2_SD, LCD_SEG15, ADC_IN21, COMP1_INP, RTC_REFIN alternate functions; 5V tolerant I/O.
55 PD8 bidirectional GPIO port D pin 8, supports USART3_TX, LCD_SEG28, FSMC_D13 alternate functions; 5V tolerant I/O.
56 PD9 bidirectional GPIO port D pin 9, supports USART3_RX, LCD_SEG29, FSMC_D14 alternate functions; 5V tolerant I/O.
57 PD10 bidirectional GPIO port D pin 10, supports USART3_CK, LCD_SEG30, FSMC_D15 alternate functions; 5V tolerant I/O.
58 PD11 bidirectional GPIO port D pin 11, supports USART3_CTS, LCD_SEG31, FSMC_A16 alternate functions; 5V tolerant I/O.
59 PD12 bidirectional GPIO port D pin 12, supports TIM4_CH1, USART3_RTS, LCD_SEG32, FSMC_A17 alternate functions; 5V tolerant I/O.
60 PD13 bidirectional GPIO port D pin 13, supports TIM4_CH2, LCD_SEG33, FSMC_A18 alternate functions; 5V tolerant I/O.
61 PD14 bidirectional GPIO port D pin 14, supports TIM4_CH3, LCD_SEG34, FSMC_D0 alternate functions; 5V tolerant I/O.
62 PD15 bidirectional GPIO port D pin 15, supports TIM4_CH4, LCD_SEG35, FSMC_D1 alternate functions; 5V tolerant I/O.
63 PC6 bidirectional GPIO port C pin 6, supports TIM3_CH1, I2S2_MCK, LCD_SEG24, SDIO_D6 alternate functions; 5V tolerant I/O.
64 PC7 bidirectional GPIO port C pin 7, supports TIM3_CH2, I2S3_MCK, LCD_SEG25, SDIO_D7 alternate functions; 5V tolerant I/O.
65 PC8 bidirectional GPIO port C pin 8, supports TIM3_CH3, LCD_SEG26, SDIO_D0 alternate functions; 5V tolerant I/O.
66 PC9 bidirectional GPIO port C pin 9, supports TIM3_CH4, LCD_SEG27, SDIO_D1 alternate functions; 5V tolerant I/O.
67 PA8 bidirectional GPIO port A pin 8, supports USART1_CK, MCO (microcontroller clock output), LCD_COM0 alternate functions; 5V tolerant I/O.
68 PA9 bidirectional GPIO port A pin 9, supports USART1_TX, LCD_COM1 alternate functions; 5V tolerant I/O.
69 PA10 bidirectional GPIO port A pin 10, supports USART1_RX, LCD_COM2 alternate functions; 5V tolerant I/O.
70 PA11 bidirectional GPIO port A pin 11, supports USART1_CTS, SPI1_MISO, USB_DM (USB D- line) alternate functions; 5V tolerant I/O.
71 PA12 bidirectional GPIO port A pin 12, supports USART1_RTS, SPI1_MOSI, USB_DP (USB D+ line) alternate functions; 5V tolerant I/O.
72 PA13 bidirectional JTAG Test Mode Select (JTMS) / Serial Wire Debug Data I/O (SWDIO) pin for debugging interface; 5V tolerant I/O.
73 PH2 bidirectional GPIO port H pin 2, supports FSMC_A22 alternate function; 5V tolerant I/O.
74 VSS_2 power_in Ground (supply negative) pin 2; connect to system ground.
75 VDD_2 power_in Supply voltage (1.65-3.6 V) pin 2; bypass with 100 nF capacitor close to pin.
76 PA14 bidirectional JTAG Test Clock (JTCK) / Serial Wire Debug Clock (SWCLK) pin for debugging interface; 5V tolerant I/O.
77 PA15 bidirectional GPIO port A pin 15, supports TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, I2S3_WS, LCD_SEG17, JTDI alternate functions; 5V tolerant I/O.
78 PC10 bidirectional GPIO port C pin 10, supports SPI3_SCK, I2S3_CK, USART3_TX, UART4_TX, LCD_SEG28/40, LCD_COM4, SDIO_D2 alternate functions; 5V tolerant I/O.
79 PC11 bidirectional GPIO port C pin 11, supports SPI3_MISO, USART3_RX, UART4_RX, LCD_SEG29/41, LCD_COM5, SDIO_D3 alternate functions; 5V tolerant I/O.
80 PC12 bidirectional GPIO port C pin 12, supports SPI3_MOSI, I2S3_SD, USART3_CK, UART5_TX, LCD_SEG30/42, LCD_COM6, SDIO_CK alternate functions; 5V tolerant I/O.
81 PD0 bidirectional GPIO port D pin 0, supports TIM9_CH1, SPI2_NSS, I2S2_WS, FSMC_D2 alternate functions; 5V tolerant I/O.
82 PD1 bidirectional GPIO port D pin 1, supports SPI2_SCK, I2S2_CK, FSMC_D3 alternate functions; 5V tolerant I/O.
83 PD2 bidirectional GPIO port D pin 2, supports TIM3_ETR, UART5_RX, LCD_SEG31/43, LCD_COM7, SDIO_CMD alternate functions; 5V tolerant I/O.
84 PD3 bidirectional GPIO port D pin 3, supports SPI2_MISO, USART2_CTS, FSMC_CLK alternate functions; 5V tolerant I/O.
85 PD4 bidirectional GPIO port D pin 4, supports SPI2_MOSI, I2S2_SD, USART2_RTS, FSMC_NOE alternate functions; 5V tolerant I/O.
86 PD5 bidirectional GPIO port D pin 5, supports USART2_TX, FSMC_NWE alternate functions; 5V tolerant I/O.
87 PD6 bidirectional GPIO port D pin 6, supports USART2_RX, FSMC_NWAIT alternate functions; 5V tolerant I/O.
88 PD7 bidirectional GPIO port D pin 7, supports TIM9_CH2, USART2_CK, FSMC_NE1 alternate functions; 5V tolerant I/O.
89 PB3 bidirectional GPIO port B pin 3, supports JTDO, TIM2_CH2, SPI1_SCK, SPI3_SCK, I2S3_CK, LCD_SEG7, COMP2_INM alternate functions; 5V tolerant I/O.
90 PB4 bidirectional GPIO port B pin 4, supports NJTRST, TIM3_CH1, SPI1_MISO, SPI3_MISO, LCD_SEG8, COMP2_INP alternate functions; 5V tolerant I/O.
91 PB5 bidirectional GPIO port B pin 5, supports TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, I2S3_SD, LCD_SEG9, COMP2_INP alternate functions; 5V tolerant I/O.
92 PB6 bidirectional GPIO port B pin 6, supports TIM4_CH1, I2C1_SCL, USART1_TX, COMP2_INP alternate functions; 5V tolerant I/O.
93 PB7 bidirectional GPIO port B pin 7, supports TIM4_CH2, I2C1_SDA, USART1_RX, FSMC_NADV, COMP2_INP, PVD_IN alternate functions; 5V tolerant I/O.
94 BOOT0 input Boot mode selection pin; selects between boot from Flash memory or system bootloader; pulled low internally, active high.
95 PB8 bidirectional GPIO port B pin 8, supports TIM4_CH3, TIM10_CH1, I2C1_SCL, LCD_SEG16, SDIO_D4 alternate functions; 5V tolerant I/O.
96 PB9 bidirectional GPIO port B pin 9, supports TIM4_CH4, TIM11_CH1, I2C1_SDA, LCD_COM3, SDIO_D5 alternate functions; 5V tolerant I/O.
97 PE0 bidirectional GPIO port E pin 0, supports TIM4_ETR, TIM10_CH1, LCD_SEG36, FSMC_NBL0 alternate functions; 5V tolerant I/O.
98 PE1 bidirectional GPIO port E pin 1, supports TIM11_CH1, LCD_SEG37, FSMC_NBL1 alternate functions; 5V tolerant I/O.
99 VSS_3 power_in Ground (supply negative) pin 3; connect to system ground.
100 VDD_3 power_in Supply voltage (1.65-3.6 V) pin 3; bypass with 100 nF capacitor close to pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32L151VDT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32l151vdt6-etched.step / stm32l151vdt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l151vdt6.step / stm32l151vdt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (155 pp, sha256 92c7b8f244edf6a6, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF