component
STM32L151VCH6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-100. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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STM32L151VCH6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFBGA-100
STM32L151VCH6 from STMicroelectronics, in a UFBGA-100. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| B2 | PE2 | bidirectional | 5 V tolerant (FT) I/O; default function PE2; alternates TIM3_ETR, LCD_SEG38, TRACECLK. |
| A1 | PE3 | bidirectional | 5 V tolerant (FT) I/O; default function PE3; alternates TIM3_CH1, LCD_SEG39, TRACED0. |
| B1 | PE4 | bidirectional | 5 V tolerant (FT) I/O; default function PE4; alternates TIM3_CH2, TRACED1. |
| C2 | PE5 | bidirectional | 5 V tolerant (FT) I/O; default function PE5; alternates TIM9_CH1, TRACED2. |
| D2 | PE6 | bidirectional | 5 V tolerant (FT) I/O; default function PE6; alternates TIM9_CH2, TRACED3; additional functions WKUP3 and RTC_TAMP3. |
| E2 | VLCD | power_in | LCD power supply pin; per the datasheet this pin applies to STM32L152xC devices only, and on STM32L151xC devices it should be connected to VDD. |
| C1 | PC13 | bidirectional | 5 V tolerant (FT) I/O; default function PC13; additional functions WKUP2, RTC_TAMP1, RTC_TS and RTC_OUT. |
| D1 | PC14 | bidirectional | Standard 3.3 V (TC) I/O; default function PC14; used as OSC32_IN only when the LSE oscillator is on (LSEON), otherwise available as GPIO. |
| E1 | PC15 | bidirectional | Standard 3.3 V (TC) I/O; default function PC15; used as OSC32_OUT only when the LSE oscillator is on (LSEON), otherwise available as GPIO. |
| F2 | VSS_5 | power_in | Ground pin; all voltages in the datasheet are referenced to VSS. |
| G2 | VDD_5 | power_in | Digital supply pin; device power supply range is 1.65 V to 3.6 V. |
| F1 | PH0 | bidirectional | Standard 3.3 V (TC) I/O; used as OSC_IN only when the HSE oscillator is on (HSEON), otherwise available as GPIO PH0. |
| G1 | PH1 | bidirectional | Standard 3.3 V (TC) I/O; used as OSC_OUT only when the HSE oscillator is on (HSEON), otherwise available as GPIO PH1. |
| H2 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| H1 | PC0 | bidirectional | 5 V tolerant (FT) I/O; default function PC0; alternates LCD_SEG18, ADC_IN10 and COMP1_INP. |
| J2 | PC1 | bidirectional | 5 V tolerant (FT) I/O; default function PC1; alternates LCD_SEG19, ADC_IN11 and COMP1_INP. |
| J3 | PC2 | bidirectional | 5 V tolerant (FT) I/O; default function PC2; alternates LCD_SEG20, ADC_IN12 and COMP1_INP. |
| K2 | PC3 | bidirectional | Standard 3.3 V (TC) I/O; default function PC3; alternates LCD_SEG21, ADC_IN13 and COMP1_INP. |
| J1 | VSSA | power_in | Analog ground pin; VSSA or VREF- must be tied to ground. |
| K1 | VREF- | power_in | Negative reference voltage for the ADC; VSSA or VREF- must be tied to ground. |
| L1 | VREF+ | power_in | Positive reference voltage for the ADC, minimum 1.8 V and up to VDDA; can be grounded if neither the ADC nor the DAC is used. |
| M1 | VDDA | power_in | Analog supply pin; ADC VDDA range is 1.8 V to 3.6 V. |
| L2 | PA0 | bidirectional | 5 V tolerant (FT) I/O; default function PA0; alternates TIM2_CH1_ETR, TIM5_CH1, USART2_CTS; additional functions WKUP1, RTC_TAMP2, ADC_IN0 and COMP1_INP. |
| M2 | PA1 | bidirectional | 5 V tolerant (FT) I/O; default function PA1; alternates TIM2_CH2, TIM5_CH2, USART2_RTS, LCD_SEG0; additional ADC_IN1, COMP1_INP and OPAMP1_VINP. |
| K3 | PA2 | bidirectional | 5 V tolerant (FT) I/O; default function PA2; alternates TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, LCD_SEG1; additional ADC_IN2, COMP1_INP and OPAMP1_VINM. |
| L3 | PA3 | bidirectional | Standard 3.3 V (TC) I/O; default function PA3; alternates TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_SEG2; additional ADC_IN3, COMP1_INP and OPAMP1_VOUT. |
| E3 | VSS_4 | power_in | Ground pin; all voltages in the datasheet are referenced to VSS. |
| H3 | VDD_4 | power_in | Digital supply pin; device power supply range is 1.65 V to 3.6 V. |
| M3 | PA4 | bidirectional | Standard 3.3 V (TC) I/O; default function PA4; alternates SPI1_NSS, SPI3_NSS, I2S3_WS, USART2_CK; additional ADC_IN4, DAC_OUT1 and COMP1_INP. |
| K4 | PA5 | bidirectional | Standard 3.3 V (TC) I/O; default function PA5; alternates TIM2_CH1_ETR and SPI1_SCK; additional ADC_IN5, DAC_OUT2 and COMP1_INP. |
| L4 | PA6 | bidirectional | 5 V tolerant (FT) I/O; default function PA6; alternates TIM3_CH1, TIM10_CH1, SPI1_MISO, LCD_SEG3; additional ADC_IN6, COMP1_INP and OPAMP2_VINP. |
| M4 | PA7 | bidirectional | 5 V tolerant (FT) I/O; default function PA7; alternates TIM3_CH2, TIM11_CH1, SPI1_MOSI, LCD_SEG4; additional ADC_IN7, COMP1_INP and OPAMP2_VINM. |
| K5 | PC4 | bidirectional | 5 V tolerant (FT) I/O; default function PC4; alternates LCD_SEG22; additional ADC_IN14 and COMP1_INP. |
| L5 | PC5 | bidirectional | 5 V tolerant (FT) I/O; default function PC5; alternates LCD_SEG23; additional ADC_IN15 and COMP1_INP. |
| M5 | PB0 | bidirectional | Standard 3.3 V (TC) I/O; default function PB0; alternates TIM3_CH3 and LCD_SEG5; additional ADC_IN8, COMP1_INP, OPAMP2_VOUT, VLCDRAIL3 and VREF_OUT. |
| M6 | PB1 | bidirectional | 5 V tolerant (FT) I/O; default function PB1; alternates TIM3_CH4 and LCD_SEG6; additional ADC_IN9, COMP1_INP and VREF_OUT. |
| L6 | PB2 | bidirectional | 5 V tolerant (FT) I/O; default function PB2; alternate BOOT1; additional functions VLCDRAIL1 and ADCIN0b. |
| M7 | PE7 | bidirectional | Standard 3.3 V (TC) I/O; default function PE7; additional functions ADC_IN22 and COMP1_INP. |
| L7 | PE8 | bidirectional | Standard 3.3 V (TC) I/O; default function PE8; additional functions ADC_IN23 and COMP1_INP. |
| M8 | PE9 | bidirectional | Standard 3.3 V (TC) I/O; default function PE9; alternates TIM2_CH1_ETR and TIM5_ETR; additional functions ADC_IN24 and COMP1_INP. |
| L8 | PE10 | bidirectional | Standard 3.3 V (TC) I/O; default function PE10; alternate TIM2_CH2; additional functions ADC_IN25 and COMP1_INP. |
| M9 | PE11 | bidirectional | 5 V tolerant (FT) I/O; default function PE11; alternate TIM2_CH3; additional function VLCDRAIL2. |
| L9 | PE12 | bidirectional | 5 V tolerant (FT) I/O; default function PE12; alternates TIM2_CH4 and SPI1_NSS; additional function VLCDRAIL3. |
| M10 | PE13 | bidirectional | 5 V tolerant (FT) I/O; default function PE13; alternate SPI1_SCK. |
| M11 | PE14 | bidirectional | 5 V tolerant (FT) I/O; default function PE14; alternate SPI1_MISO. |
| M12 | PE15 | bidirectional | 5 V tolerant (FT) I/O; default function PE15; alternate SPI1_MOSI. |
| L10 | PB10 | bidirectional | 5 V tolerant (FT) I/O; default function PB10; alternates TIM2_CH3, I2C2_SCL, USART3_TX and LCD_SEG10. |
| L11 | PB11 | bidirectional | 5 V tolerant (FT) I/O; default function PB11; alternates TIM2_CH4, I2C2_SDA, USART3_RX and LCD_SEG11. |
| F12 | VSS_1 | power_in | Ground pin; all voltages in the datasheet are referenced to VSS. |
| G12 | VDD_1 | power_in | Digital supply pin; device power supply range is 1.65 V to 3.6 V. |
| L12 | PB12 | bidirectional | 5 V tolerant (FT) I/O; default function PB12; alternates TIM10_CH1, I2C2_SMBA, SPI2_NSS, I2S2_WS, USART3_CK and LCD_SEG12; additional ADC_IN18, COMP1_INP and VLCDRAIL2. |
| K12 | PB13 | bidirectional | 5 V tolerant (FT) I/O; default function PB13; alternates TIM9_CH1, SPI2_SCK, I2S2_CK, USART3_CTS and LCD_SEG13; additional ADC_IN19 and COMP1_INP. |
| K11 | PB14 | bidirectional | 5 V tolerant (FT) I/O; default function PB14; alternates TIM9_CH2, SPI2_MISO, USART3_RTS and LCD_SEG14; additional ADC_IN20 and COMP1_INP. |
| K10 | PB15 | bidirectional | 5 V tolerant (FT) I/O; default function PB15; alternates TIM11_CH1, SPI2_MOSI, I2S2_SD and LCD_SEG15; additional ADC_IN21, COMP1_INP and RTC_REFIN. |
| K9 | PD8 | bidirectional | 5 V tolerant (FT) I/O; default function PD8; alternates USART3_TX and LCD_SEG28. |
| K8 | PD9 | bidirectional | 5 V tolerant (FT) I/O; default function PD9; alternates USART3_RX and LCD_SEG29. |
| J12 | PD10 | bidirectional | 5 V tolerant (FT) I/O; default function PD10; alternates USART3_CK and LCD_SEG30. |
| J11 | PD11 | bidirectional | 5 V tolerant (FT) I/O; default function PD11; alternates USART3_CTS and LCD_SEG31. |
| J10 | PD12 | bidirectional | 5 V tolerant (FT) I/O; default function PD12; alternates TIM4_CH1, USART3_RTS and LCD_SEG32. |
| H12 | PD13 | bidirectional | 5 V tolerant (FT) I/O; default function PD13; alternates TIM4_CH2 and LCD_SEG33. |
| H11 | PD14 | bidirectional | 5 V tolerant (FT) I/O; default function PD14; alternates TIM4_CH3 and LCD_SEG34. |
| H10 | PD15 | bidirectional | 5 V tolerant (FT) I/O; default function PD15; alternates TIM4_CH4 and LCD_SEG35. |
| E12 | PC6 | bidirectional | 5 V tolerant (FT) I/O; default function PC6; alternates TIM3_CH1, I2S2_MCK and LCD_SEG24. |
| E11 | PC7 | bidirectional | 5 V tolerant (FT) I/O; default function PC7; alternates TIM3_CH2, I2S3_MCK and LCD_SEG25. |
| E10 | PC8 | bidirectional | 5 V tolerant (FT) I/O; default function PC8; alternates TIM3_CH3 and LCD_SEG26. |
| D12 | PC9 | bidirectional | 5 V tolerant (FT) I/O; default function PC9; alternates TIM3_CH4 and LCD_SEG27. |
| D11 | PA8 | bidirectional | 5 V tolerant (FT) I/O; default function PA8; alternates USART1_CK, MCO and LCD_COM0. |
| D10 | PA9 | bidirectional | 5 V tolerant (FT) I/O; default function PA9; alternates USART1_TX and LCD_COM1. |
| C12 | PA10 | bidirectional | 5 V tolerant (FT) I/O; default function PA10; alternates USART1_RX and LCD_COM2. |
| B12 | PA11 | bidirectional | 5 V tolerant (FT) I/O; default function PA11; alternates USART1_CTS and SPI1_MISO; additional function USB_DM. |
| A12 | PA12 | bidirectional | 5 V tolerant (FT) I/O; default function PA12; alternates USART1_RTS and SPI1_MOSI; additional function USB_DP. |
| A11 | PA13 | bidirectional | 5 V tolerant (FT) I/O; default function JTMS-SWDIO (serial wire debug data), shared with the JTAG JTMS pin. |
| C11 | PH2 | bidirectional | 5 V tolerant (FT) I/O; default function PH2; no alternate function listed for this pin. |
| F11 | VSS_2 | power_in | Ground pin; all voltages in the datasheet are referenced to VSS. |
| G11 | VDD_2 | power_in | Digital supply pin; device power supply range is 1.65 V to 3.6 V. |
| A10 | PA14 | bidirectional | 5 V tolerant (FT) I/O; default function JTCK-SWCLK (serial wire clock), shared with the JTAG JTCK pin. |
| A9 | PA15 | bidirectional | 5 V tolerant (FT) I/O; default function JTDI; alternates TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, I2S3_WS and LCD_SEG17. |
| B11 | PC10 | bidirectional | 5 V tolerant (FT) I/O; default function PC10; alternates SPI3_SCK, I2S3_CK, USART3_TX, LCD_SEG28, LCD_SEG40 and LCD_COM4. |
| C10 | PC11 | bidirectional | 5 V tolerant (FT) I/O; default function PC11; alternates SPI3_MISO, USART3_RX, LCD_SEG29, LCD_SEG41 and LCD_COM5. |
| B10 | PC12 | bidirectional | 5 V tolerant (FT) I/O; default function PC12; alternates SPI3_MOSI, I2S3_SD, USART3_CK, LCD_SEG30, LCD_SEG42 and LCD_COM6. |
| C9 | PD0 | bidirectional | 5 V tolerant (FT) I/O; default function PD0; alternates TIM9_CH1, SPI2_NSS and I2S2_WS. |
| B9 | PD1 | bidirectional | 5 V tolerant (FT) I/O; default function PD1; alternates SPI2_SCK and I2S2_CK. |
| C8 | PD2 | bidirectional | 5 V tolerant (FT) I/O; default function PD2; alternates TIM3_ETR, LCD_SEG31, LCD_SEG43 and LCD_COM7. |
| B8 | PD3 | bidirectional | 5 V tolerant (FT) I/O; default function PD3; alternates SPI2_MISO and USART2_CTS. |
| B7 | PD4 | bidirectional | 5 V tolerant (FT) I/O; default function PD4; alternates SPI2_MOSI, I2S2_SD and USART2_RTS. |
| A6 | PD5 | bidirectional | 5 V tolerant (FT) I/O; default function PD5; alternate USART2_TX. |
| B6 | PD6 | bidirectional | 5 V tolerant (FT) I/O; default function PD6; alternate USART2_RX. |
| A5 | PD7 | bidirectional | 5 V tolerant (FT) I/O; default function PD7; alternates TIM9_CH2 and USART2_CK. |
| A8 | PB3 | bidirectional | 5 V tolerant (FT) I/O; default function JTDO (SWO trace output); alternates TIM2_CH2, SPI1_SCK, SPI3_SCK, I2S3_CK and LCD_SEG7; additional function COMP2_INM. |
| A7 | PB4 | bidirectional | 5 V tolerant (FT) I/O; default function NJTRST (JTAG reset); alternates TIM3_CH1, SPI1_MISO, SPI3_MISO and LCD_SEG8; additional function COMP2_INP. |
| C5 | PB5 | bidirectional | 5 V tolerant (FT) I/O; default function PB5; alternates TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, I2S3_SD and LCD_SEG9; additional function COMP2_INP. |
| B5 | PB6 | bidirectional | 5 V tolerant (FT) I/O; default function PB6; alternates TIM4_CH1, I2C1_SCL and USART1_TX; additional function COMP2_INP. |
| B4 | PB7 | bidirectional | 5 V tolerant (FT) I/O; default function PB7; alternates TIM4_CH2, I2C1_SDA and USART1_RX; additional functions COMP2_INP and PVD_IN. |
| A4 | BOOT0 | input | Dedicated BOOT0 input pin, used to select the boot mode. |
| A3 | PB8 | bidirectional | 5 V tolerant (FT) I/O; default function PB8; alternates TIM4_CH3, TIM10_CH1, I2C1_SCL and LCD_SEG16. |
| B3 | PB9 | bidirectional | 5 V tolerant (FT) I/O; default function PB9; alternates TIM4_CH4, TIM11_CH1, I2C1_SDA and LCD_COM3. |
| C3 | PE0 | bidirectional | 5 V tolerant (FT) I/O; default function PE0; alternates TIM4_ETR, TIM10_CH1 and LCD_SEG36. |
| A2 | PE1 | bidirectional | 5 V tolerant (FT) I/O; default function PE1; alternates TIM11_CH1 and LCD_SEG37. |
| D3 | VSS_3 | power_in | Ground pin; all voltages in the datasheet are referenced to VSS. |
| C4 | VDD_3 | power_in | Digital supply pin; device power supply range is 1.65 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFBGA-100 |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
STM32L151VCH6 - Footprint:
Package_BGA:UFBGA-100_7x7mm_Layout12x12_P0.5mm - 3D model: UFBGA-100 (KiCad packages3D, STEP)
- 3D model files:
stm32l151vch6-etched.step/stm32l151vch6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l151vch6.step/stm32l151vch6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (136 pp, sha256
5e6d5674cd06c108, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).