Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Download PDF

Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32L151CCT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32L151CCT6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VLCD	power_in	LCD power supply pin (VLCD); on STM32L151xC devices this pin should be connected to VDD.
2	PC13	bidirectional	5 V tolerant I/O (FT) that can also be used as wakeup pin WKUP2 or as RTC_TAMP1/RTC_TS/RTC_OUT.
3	PC14	bidirectional	Standard 3.3 V I/O (TC) that is used as OSC32_IN only when the LSE oscillator is on, otherwise it is general-purpose PC14.
4	PC15	bidirectional	Standard 3.3 V I/O (TC) that is used as OSC32_OUT only when the LSE oscillator is on, otherwise it is general-purpose PC15.
5	PH0	bidirectional	Standard 3.3 V I/O (TC) that is used as OSC_IN only when the HSE oscillator is on, otherwise it is general-purpose PH0.
6	PH1	bidirectional	Standard 3.3 V I/O (TC) that is used as OSC_OUT only when the HSE oscillator is on, otherwise it is general-purpose PH1.
7	NRST	bidirectional	Bidirectional reset pin with an embedded weak pull-up resistor.
8	VSSA	power_in	Analog ground pin; the ADC specifications require VSSA or VREF- to be tied to ground.
9	VDDA	power_in	Analog supply pin; the ADC specifications give VDDA from 1.8 V to 3.6 V.
10	PA0	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM2_CH1_ETR, TIM5_CH1 and USART2_CTS, and additional functions WKUP1, RTC_TAMP2, ADC_IN0 and COMP1_INP.
11	PA1	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS and LCD_SEG0, and additional functions ADC_IN1, COMP1_INP and OPAMP1_VINP.
12	PA2	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX and LCD_SEG1, and additional functions ADC_IN2, COMP1_INP and OPAMP1_VINM.
13	PA3	bidirectional	Standard 3.3 V I/O (TC) with alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX and LCD_SEG2, and additional functions ADC_IN3, COMP1_INP and OPAMP1_VOUT.
14	PA4	bidirectional	Standard 3.3 V I/O (TC) with alternate functions SPI1_NSS, SPI3_NSS, I2S3_WS and USART2_CK, and additional functions ADC_IN4, DAC_OUT1 and COMP1_INP.
15	PA5	bidirectional	Standard 3.3 V I/O (TC) with alternate functions TIM2_CH1_ETR and SPI1_SCK, and additional functions ADC_IN5, DAC_OUT2 and COMP1_INP.
16	PA6	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM3_CH1, TIM10_CH1, SPI1_MISO and LCD_SEG3, and additional functions ADC_IN6, COMP1_INP and OPAMP2_VINP.
17	PA7	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM3_CH2, TIM11_CH1, SPI1_MOSI and LCD_SEG4, and additional functions ADC_IN7, COMP1_INP and OPAMP2_VINM.
18	PB0	bidirectional	Standard 3.3 V I/O (TC) with alternate functions TIM3_CH3 and LCD_SEG5, and additional functions ADC_IN8, COMP1_INP, OPAMP2_VOUT, VLCDRAIL3 and VREF_OUT.
19	PB1	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM3_CH4 and LCD_SEG6, and additional functions ADC_IN9, COMP1_INP and VREF_OUT.
20	PB2	bidirectional	5 V tolerant I/O (FT) that is shared with the BOOT1 function, with additional functions VLCDRAIL1 and ADCIN0b.
21	PB10	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM2_CH3, I2C2_SCL, USART3_TX and LCD_SEG10.
22	PB11	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM2_CH4, I2C2_SDA, USART3_RX and LCD_SEG11.
23	VSS_1	power_in	Digital ground pin.
24	VDD_1	power_in	Digital supply pin.
25	PB12	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM10_CH1, I2C2_SMBA, SPI2_NSS, I2S2_WS, USART3_CK and LCD_SEG12, and additional functions ADC_IN18, COMP1_INP and VLCDRAIL2.
26	PB13	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM9_CH1, SPI2_SCK, I2S2_CK, USART3_CTS and LCD_SEG13, and additional functions ADC_IN19 and COMP1_INP.
27	PB14	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM9_CH2, SPI2_MISO, USART3_RTS and LCD_SEG14, and additional functions ADC_IN20 and COMP1_INP.
28	PB15	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM11_CH1, SPI2_MOSI, I2S2_SD and LCD_SEG15, and additional functions ADC_IN21, COMP1_INP and RTC_REFIN.
29	PA8	bidirectional	5 V tolerant I/O (FT) with alternate functions USART1_CK, MCO and LCD_COM0.
30	PA9	bidirectional	5 V tolerant I/O (FT) with alternate functions USART1_TX and LCD_COM1.
31	PA10	bidirectional	5 V tolerant I/O (FT) with alternate functions USART1_RX and LCD_COM2.
32	PA11	bidirectional	5 V tolerant I/O (FT) with alternate functions USART1_CTS and SPI1_MISO, and additional function USB_DM.
33	PA12	bidirectional	5 V tolerant I/O (FT) with alternate functions USART1_RTS and SPI1_MOSI, and additional function USB_DP.
34	PA13	bidirectional	5 V tolerant I/O (FT) whose default function is JTMS-SWDIO (serial wire debug data input/output).
35	VSS_2	power_in	Digital ground pin.
36	VDD_2	power_in	Digital supply pin.
37	PA14	bidirectional	5 V tolerant I/O (FT) whose default function is JTCK-SWCLK (serial wire debug clock).
38	PA15	bidirectional	5 V tolerant I/O (FT) whose default function is JTDI, with alternate functions TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, I2S3_WS and LCD_SEG17.
39	PB3	bidirectional	5 V tolerant I/O (FT) whose default function is JTDO, with alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK, I2S3_CK and LCD_SEG7, and additional function COMP2_INM.
40	PB4	bidirectional	5 V tolerant I/O (FT) whose default function is NJTRST, with alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO and LCD_SEG8, and additional function COMP2_INP.
41	PB5	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, I2S3_SD and LCD_SEG9, and additional function COMP2_INP.
42	PB6	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM4_CH1, I2C1_SCL and USART1_TX, and additional function COMP2_INP.
43	PB7	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM4_CH2, I2C1_SDA and USART1_RX, and additional functions COMP2_INP and PVD_IN.
44	BOOT0	input	Dedicated input-only BOOT0 pin; Table 9 lists no alternate functions for it.
45	PB8	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM4_CH3, TIM10_CH1, I2C1_SCL and LCD_SEG16.
46	PB9	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM4_CH4, TIM11_CH1, I2C1_SDA and LCD_COM3.
47	VSS_3	power_in	Digital ground pin.
48	VDD_3	power_in	Digital supply pin.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-48(7x7)
Category	Embedded Processors & Controllers
Pins	48

CAD (KiCad official)

Symbol: STM32L151CCT6
Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
3D model files: stm32l151cct6-etched.step / stm32l151cct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l151cct6.step / stm32l151cct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (136 pp, sha256 5e6d5674cd06c108, retrieved 2026-10-10, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF