component
STM32L151C8U6A
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
main
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{
"slug": "stm32l151c8u6a",
"version": "0.1.0",
"type": "component",
"description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"stm32l151c8u6a",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
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"README.md",
"stm32l151c8u6a.kicad_sym",
"stm32l151c8u6a.kicad_mod",
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"stm32l151c8u6a.step",
"stm32l151c8u6a.lbr",
"docs/hero.png",
"docs/stm32l151c8u6a-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"stm32l151c8u6a-hero.glb",
"stm32l151c8u6a-hero.overlay.json"
],
"component": {
"mpn": "STM32L151C8U6A",
"manufacturer": "STMicroelectronics",
"package": "UFQFPN-48(7x7)",
"pin_count": 49,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588933989025792000",
"parts": {
"symbol": "stm32l151c8u6a.kicad_sym",
"footprint": "stm32l151c8u6a.kicad_mod",
"model_3d": "stm32l151c8u6a-hero.glb",
"model_3d_plain": "stm32l151c8u6a.glb",
"model_3d_step": "stm32l151c8u6a-etched.step",
"model_3d_step_plain": "stm32l151c8u6a.step",
"lbr": "stm32l151c8u6a.lbr"
},
"distributor_links": {
"lcsc": "C1339205",
"digikey": "497-18952-ND",
"mouser": "511-STM32L151C8U6A"
},
"distributor_check": {
"checked_at": "2026-10-11T13:50:19Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "497-18952-ND",
"status": "found"
},
"mouser": {
"pn": "511-STM32L151C8U6A",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "VLCD",
"type": "power_in",
"description": "LCD controller supply rail; the datasheet states this pin applies to STM32L152 devices only and must be connected to VDD on STM32L151 devices."
},
{
"number": "2",
"name": "PC13-WKUP2",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions RTC_TAMP1, RTC_TS and RTC_OUT, and wakeup input WKUP2."
},
{
"number": "3",
"name": "PC14-OSC32_IN",
"type": "bidirectional",
"description": "Standard 3.3 V (TC) I/O that is OSC32_IN when the LSE oscillator is on and can be used as PC14 GPIO when the LSE is off."
},
{
"number": "4",
"name": "PC15-OSC32_OUT",
"type": "bidirectional",
"description": "Standard 3.3 V (TC) I/O that is OSC32_OUT when the LSE oscillator is on and can be used as PC15 GPIO when the LSE is off."
},
{
"number": "5",
"name": "PH0-OSC_IN",
"type": "bidirectional",
"description": "Standard 3.3 V (TC) I/O that is OSC_IN when the HSE oscillator is on and can be used as PH0 GPIO when the HSE is off."
},
{
"number": "6",
"name": "PH1-OSC_OUT",
"type": "bidirectional",
"description": "Standard 3.3 V (TC) I/O that is OSC_OUT when the HSE oscillator is on and can be used as PH1 GPIO when the HSE is off."
},
{
"number": "7",
"name": "NRST",
"type": "bidirectional",
"description": "Bidirectional reset pin with an embedded weak pull-up resistor."
},
{
"number": "8",
"name": "VSSA",
"type": "power_in",
"description": "Analog ground pin for the analog supply domain."
},
{
"number": "9",
"name": "VDDA",
"type": "power_in",
"description": "Analog supply pin for the analog blocks (ADC, DAC and comparators)."
},
{
"number": "10",
"name": "PA0-WKUP1",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions USART2_CTS, TIM2_CH1_ETR, ADC_IN0, COMP1_INP, wakeup WKUP1 and RTC_TAMP2."
},
{
"number": "11",
"name": "PA1",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions USART2_RTS, TIM2_CH2, LCD_SEG0, ADC_IN1 and COMP1_INP."
},
{
"number": "12",
"name": "PA2",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions USART2_TX, TIM2_CH3, TIM9_CH1, LCD_SEG1, ADC_IN2 and COMP1_INP."
},
{
"number": "13",
"name": "PA3",
"type": "bidirectional",
"description": "Standard 3.3 V (TC) I/O with alternate functions USART2_RX, TIM2_CH4, TIM9_CH2, LCD_SEG2, ADC_IN3 and COMP1_INP."
},
{
"number": "14",
"name": "PA4",
"type": "bidirectional",
"description": "Standard 3.3 V (TC) I/O with alternate functions SPI1_NSS, USART2_CK, ADC_IN4, DAC_OUT1 and COMP1_INP."
},
{
"number": "15",
"name": "PA5",
"type": "bidirectional",
"description": "Standard 3.3 V (TC) I/O with alternate functions SPI1_SCK, TIM2_CH1_ETR, ADC_IN5, DAC_OUT2 and COMP1_INP."
},
{
"number": "16",
"name": "PA6",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions SPI1_MISO, TIM3_CH1, LCD_SEG3, TIM10_CH1, ADC_IN6 and COMP1_INP."
},
{
"number": "17",
"name": "PA7",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions SPI1_MOSI, TIM3_CH2, LCD_SEG4, TIM11_CH1, ADC_IN7 and COMP1_INP."
},
{
"number": "18",
"name": "PB0",
"type": "bidirectional",
"description": "Standard 3.3 V (TC) I/O with alternate functions TIM3_CH3, LCD_SEG5, ADC_IN8, COMP1_INP, VREF_OUT and VLCDRAIL3."
},
{
"number": "19",
"name": "PB1",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions TIM3_CH4, LCD_SEG6, ADC_IN9, COMP1_INP and VREF_OUT."
},
{
"number": "20",
"name": "PB2/BOOT1",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O that also serves as the BOOT1 pin and the VLCDRAIL1 function."
},
{
"number": "21",
"name": "PB10",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions I2C2_SCL, USART3_TX, TIM2_CH3 and LCD_SEG10."
},
{
"number": "22",
"name": "PB11",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions I2C2_SDA, USART3_RX, TIM2_CH4 and LCD_SEG11."
},
{
"number": "23",
"name": "VSS_1",
"type": "power_in",
"description": "Ground pin of the digital supply domain."
},
{
"number": "24",
"name": "VDD_1",
"type": "power_in",
"description": "Digital power supply pin of the device."
},
{
"number": "25",
"name": "PB12",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions SPI2_NSS, I2C2_SMBA, USART3_CK, LCD_SEG12, TIM10_CH1, ADC_IN18, COMP1_INP and VLCDRAIL2."
},
{
"number": "26",
"name": "PB13",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions SPI2_SCK, USART3_CTS, LCD_SEG13, TIM9_CH1, ADC_IN19 and COMP1_INP."
},
{
"number": "27",
"name": "PB14",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions SPI2_MISO, USART3_RTS, LCD_SEG14, TIM9_CH2, ADC_IN20 and COMP1_INP."
},
{
"number": "28",
"name": "PB15",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions SPI2_MOSI, LCD_SEG15, TIM11_CH1, ADC_IN21, COMP1_INP and RTC_REFIN."
},
{
"number": "29",
"name": "PA8",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions USART1_CK, MCO and LCD_COM0."
},
{
"number": "30",
"name": "PA9",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions USART1_TX and LCD_COM1."
},
{
"number": "31",
"name": "PA10",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions USART1_RX and LCD_COM2."
},
{
"number": "32",
"name": "PA11",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions USART1_CTS, SPI1_MISO and USB_DM."
},
{
"number": "33",
"name": "PA12",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions USART1_RTS, SPI1_MOSI and USB_DP."
},
{
"number": "34",
"name": "PA13",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O whose main function after reset is JTMS-SWDIO (serial wire debug data)."
},
{
"number": "35",
"name": "VSS_2",
"type": "power_in",
"description": "Ground pin of the digital supply domain."
},
{
"number": "36",
"name": "VDD_2",
"type": "power_in",
"description": "Digital power supply pin of the device."
},
{
"number": "37",
"name": "PA14",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O whose main function after reset is JTCK-SWCLK (serial wire debug clock)."
},
{
"number": "38",
"name": "PA15",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions JTDI, TIM2_CH1_ETR, SPI1_NSS and LCD_SEG17."
},
{
"number": "39",
"name": "PB3",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions JTDO, TIM2_CH2, SPI1_SCK, LCD_SEG7 and COMP2_INM."
},
{
"number": "40",
"name": "PB4",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions NJTRST, TIM3_CH1, SPI1_MISO, LCD_SEG8 and COMP2_INP."
},
{
"number": "41",
"name": "PB5",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions I2C1_SMBA, TIM3_CH2, SPI1_MOSI, LCD_SEG9 and COMP2_INP."
},
{
"number": "42",
"name": "PB6",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions I2C1_SCL, TIM4_CH1 and USART1_TX."
},
{
"number": "43",
"name": "PB7",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions I2C1_SDA, TIM4_CH2, USART1_RX and PVD_IN."
},
{
"number": "44",
"name": "BOOT0",
"type": "input",
"description": "Dedicated BOOT0 pin (input-only, boot-mode selection)."
},
{
"number": "45",
"name": "PB8",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions TIM4_CH3, I2C1_SCL, LCD_SEG16 and TIM10_CH1."
},
{
"number": "46",
"name": "PB9",
"type": "bidirectional",
"description": "5 V tolerant (FT) I/O with alternate functions TIM4_CH4, I2C1_SDA, LCD_COM3 and TIM11_CH1."
},
{
"number": "47",
"name": "VSS_3",
"type": "power_in",
"description": "Ground pin of the digital supply domain."
},
{
"number": "48",
"name": "VDD_3",
"type": "power_in",
"description": "Digital power supply pin of the device."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The UFQFPN48 package has an exposed die pad on its underside (page 115, notes 2-3). It has no pin nu; Pin 1 (VLCD) is listed as a supply pin for STM32L152 only. Note 3 (page 45) states that on STM32L151; The UFQFPN48 pinout has no VREF+ or VREF- pin. Table 55 note 3 says VREF+ can be internally connecte",
"exposed pad 49 added from the footprint"
],
"pages_sent": 60,
"cost_usd": 0.2639,
"at": "2026-10-11T13:50:02"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588933989025792000",
"pages": 130,
"sha256": "e5e0ab791f4e7879",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
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"file": "stm32l151c8u6a.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-11",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "stm32l151c8u6a-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "7f9fbf71b1a42d7e6baaa7de82834662fb9cd97c360114f9399521ce97e06284",
"checked": "2026-10-11",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}