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STM32L151C8T6A

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32L151C8T6A

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32L151C8T6A from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VLCD power_in LCD external voltage. Applicable to STM32L152 only; on STM32L151 (this part) this pin must be tied to VDD.
2 PC13-WKUP2 bidirectional GPIO PC13 (FT - 5 V tolerant). Additional functions: RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2 wake-up input.
3 PC14-OSC32_IN bidirectional GPIO PC14 (TC - standard 3.3 V). Additional function OSC32_IN when the LSE 32.768 kHz oscillator is enabled.
4 PC15-OSC32_OUT bidirectional GPIO PC15 (TC). Additional function OSC32_OUT when the LSE 32.768 kHz oscillator is enabled.
5 PH0-OSC_IN bidirectional GPIO PH0 (TC). Additional function OSC_IN when the HSE 1-24 MHz oscillator is enabled.
6 PH1-OSC_OUT bidirectional GPIO PH1 (TC). Additional function OSC_OUT when the HSE crystal oscillator is enabled.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up. Drive low to reset the MCU; internally asserted during POR/BOR/watchdog resets.
8 VSSA power_in Analog ground reference for the ADC, DAC, comparators and internal reference. Must be connected to the system ground plane.
9 VDDA power_in Analog supply for ADC, DAC, comparators, reset block and PLL. 1.8 V to 3.6 V; decouple with 100 nF + 1 µF to VSSA.
10 PA0-WKUP1 bidirectional GPIO PA0 (FT). Alt: USART2_CTS, TIM2_CH1_ETR. Additional: WKUP1 wake-up input, ADC_IN0, COMP1_INP, RTC_TAMP2.
11 PA1 bidirectional GPIO PA1 (FT). Alt: USART2_RTS, TIM2_CH2, LCD_SEG0. Additional: ADC_IN1, COMP1_INP.
12 PA2 bidirectional GPIO PA2 (FT). Alt: USART2_TX, TIM2_CH3, TIM9_CH1, LCD_SEG1. Additional: ADC_IN2, COMP1_INP.
13 PA3 bidirectional GPIO PA3 (TC). Alt: USART2_RX, TIM2_CH4, TIM9_CH2, LCD_SEG2. Additional: ADC_IN3, COMP1_INP.
14 PA4 bidirectional GPIO PA4 (TC). Alt: SPI1_NSS, USART2_CK. Additional: ADC_IN4, DAC_OUT1, COMP1_INP.
15 PA5 bidirectional GPIO PA5 (TC). Alt: SPI1_SCK, TIM2_CH1_ETR. Additional: ADC_IN5, DAC_OUT2, COMP1_INP.
16 PA6 bidirectional GPIO PA6 (FT). Alt: SPI1_MISO, TIM3_CH1, LCD_SEG3, TIM10_CH1. Additional: ADC_IN6, COMP1_INP.
17 PA7 bidirectional GPIO PA7 (FT). Alt: SPI1_MOSI, TIM3_CH2, LCD_SEG4, TIM11_CH1. Additional: ADC_IN7, COMP1_INP.
18 PB0 bidirectional GPIO PB0 (TC). Alt: TIM3_CH3, LCD_SEG5. Additional: ADC_IN8, COMP1_INP, VREF_OUT, VLCDRAIL3.
19 PB1 bidirectional GPIO PB1 (FT). Alt: TIM3_CH4, LCD_SEG6. Additional: ADC_IN9, COMP1_INP, VREF_OUT.
20 PB2/BOOT1 bidirectional GPIO PB2 (FT) / BOOT1 select input. BOOT1 is sampled at reset together with BOOT0 to choose boot memory. Additional: VLCDRAIL1.
21 PB10 bidirectional GPIO PB10 (FT). Alt: I2C2_SCL, USART3_TX, TIM2_CH3, LCD_SEG10.
22 PB11 bidirectional GPIO PB11 (FT). Alt: I2C2_SDA, USART3_RX, TIM2_CH4, LCD_SEG11.
23 VSS_1 power_in Digital ground. Connect to system ground plane.
24 VDD_1 power_in Digital supply, 1.65 V to 3.6 V. Decouple to VSS_1 with 100 nF ceramic.
25 PB12 bidirectional GPIO PB12 (FT). Alt: SPI2_NSS, I2C2_SMBA, USART3_CK, LCD_SEG12, TIM10_CH1. Additional: ADC_IN18, COMP1_INP, VLCDRAIL2.
26 PB13 bidirectional GPIO PB13 (FT). Alt: SPI2_SCK, USART3_CTS, LCD_SEG13, TIM9_CH1. Additional: ADC_IN19, COMP1_INP.
27 PB14 bidirectional GPIO PB14 (FT). Alt: SPI2_MISO, USART3_RTS, LCD_SEG14, TIM9_CH2. Additional: ADC_IN20, COMP1_INP.
28 PB15 bidirectional GPIO PB15 (FT). Alt: SPI2_MOSI, LCD_SEG15, TIM11_CH1. Additional: ADC_IN21, COMP1_INP, RTC_REFIN.
29 PA8 bidirectional GPIO PA8 (FT). Alt: USART1_CK, MCO (microcontroller clock output), LCD_COM0.
30 PA9 bidirectional GPIO PA9 (FT). Alt: USART1_TX, LCD_COM1.
31 PA10 bidirectional GPIO PA10 (FT). Alt: USART1_RX, LCD_COM2.
32 PA11 bidirectional GPIO PA11 (FT). Alt: USART1_CTS, SPI1_MISO. Additional: USB_DM (USB full-speed D−).
33 PA12 bidirectional GPIO PA12 (FT). Alt: USART1_RTS, SPI1_MOSI. Additional: USB_DP (USB full-speed D+).
34 PA13/JTMS-SWDIO bidirectional GPIO PA13 (FT). Default after reset: JTMS-SWDIO (JTAG mode select / Serial-Wire data). Debug interface muxed with GPIO via alternate function registers.
35 VSS_2 power_in Digital ground.
36 VDD_2 power_in Digital supply, 1.65 V to 3.6 V. Decouple to VSS_2 with 100 nF ceramic.
37 PA14/JTCK-SWCLK bidirectional GPIO PA14 (FT). Default after reset: JTCK-SWCLK (JTAG / Serial-Wire clock).
38 PA15/JTDI bidirectional GPIO PA15 (FT). Default after reset: JTDI. Alt: TIM2_CH1_ETR, SPI1_NSS, LCD_SEG17.
39 PB3/JTDO bidirectional GPIO PB3 (FT). Default after reset: JTDO. Alt: TIM2_CH2, SPI1_SCK, LCD_SEG7. Additional: COMP2_INM.
40 PB4/NJTRST bidirectional GPIO PB4 (FT). Default after reset: NJTRST (JTAG reset, active low, internal pull-up). Alt: TIM3_CH1, SPI1_MISO, LCD_SEG8. Additional: COMP2_INP.
41 PB5 bidirectional GPIO PB5 (FT). Alt: I2C1_SMBA, TIM3_CH2, SPI1_MOSI, LCD_SEG9. Additional: COMP2_INP.
42 PB6 bidirectional GPIO PB6 (FT). Alt: I2C1_SCL, TIM4_CH1, USART1_TX.
43 PB7 bidirectional GPIO PB7 (FT). Alt: I2C1_SDA, TIM4_CH2, USART1_RX. Additional: PVD_IN.
44 BOOT0 input Dedicated boot-mode select input (type B). Sampled at reset together with BOOT1 (PB2) to choose Flash, System memory (bootloader) or SRAM boot.
45 PB8 bidirectional GPIO PB8 (FT). Alt: TIM4_CH3, I2C1_SCL, LCD_SEG16, TIM10_CH1.
46 PB9 bidirectional GPIO PB9 (FT). Alt: TIM4_CH4, I2C1_SDA, LCD_COM3, TIM11_CH1.
47 VSS_3 power_in Digital ground.
48 VDD_3 power_in Digital supply, 1.65 V to 3.6 V. Decouple to VSS_3 with 100 nF ceramic.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category MCU
Pins 48

Ordering variants

Same part, different packaging or reel option.

  • STM32L151C8T6A
  • STM32L151C8U6A
  • STM32L151R6T6A
  • STM32L151R8T6A
  • STM32L151RBT6A
  • STM32L151RBY6DTR
  • STM32L151V8T6A
  • STM32L151VBT6A
  • STM32L151VBH6A

CAD (KiCad official)

  • Symbol: STM32L151C8T6A
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32l151c8t6a-etched.step / stm32l151c8t6a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l151c8t6a.step / stm32l151c8t6a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (130 pp, sha256 e5e0ab791f4e7879, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF