component
STM32L083RZH6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TFBGA-64. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L083RZH6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TFBGA-64
STM32L083RZH6 from STMicroelectronics, in a TFBGA-64. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | PC14-OSC32_IN | bidirectional | 5 V tolerant GPIO (FT) that also serves as the 32.768 kHz LSE oscillator input OSC32_IN. |
| A2 | PC13 | bidirectional | 5 V tolerant GPIO (FT) with additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2. |
| A3 | PB9 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions LCD_COM3, EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS. |
| A4 | PB4 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions SPI1_MISO, LCD_SEG8, TIM3_CH1, TSC_G5_IO2, TIM22_CH1, USART1_CTS, USART5_RX and I2C3_SDA, and comparator input COMP2_INP. |
| A5 | PB3 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions SPI1_SCK, LCD_SEG7, TIM2_CH2, TSC_G5_IO1, EVENTOUT, USART1_RTS/USART1_DE and USART5_TX, and comparator input COMP2_INM. |
| A6 | PA15 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions SPI1_NSS, LCD_SEG17, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1 and USART4_RTS/USART4_DE. |
| A7 | PA14 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions SWCLK, USART2_TX and LPUART1_TX. |
| A8 | PA13 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions SWDIO, USB_NOE and LPUART1_RX. |
| B1 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V I/O (TC) that also serves as the LSE oscillator output OSC32_OUT. |
| B2 | VLCD | power_in | LCD power supply pin VLCD for the optional LCD power supply scheme. |
| B3 | PB8 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions LCD_SEG16, TSC_SYNC and I2C1_SCL. |
| B4 | BOOT0 | input | Dedicated BOOT0 input pin used to select the boot mode. |
| B5 | PD2 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions LPUART1_RTS/LPUART1_DE, LCD_COM7/LCD_SEG31/LCD_SEG51, TIM3_ETR and USART5_RX. |
| B6 | PC11 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions LPUART1_RX, LCD_COM5/LCD_SEG29/LCD_SEG49 and USART4_RX. |
| B7 | PC10 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions LPUART1_TX, LCD_COM4/LCD_SEG28/LCD_SEG48 and USART4_TX. |
| B8 | PA12 | bidirectional | 5 V tolerant GPIO (FT) powered by VDD_USB, with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE, COMP2_OUT and USB_DP. |
| C1 | PH0-OSC_IN | bidirectional | Standard 3.3 V I/O (TC) that also serves as the HSE oscillator input OSC_IN, with alternate function USB_CRS_SYNC. |
| C2 | VSS | power_in | Ground pin for the digital supply domain. |
| C3 | PB7 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4 and USART4_CTS, and additional functions COMP2_INP and PVD_IN. |
| C4 | PB5 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions SPI1_MOSI, LCD_SEG9, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK and USART5_RTS/USART5_DE, and comparator input COMP2_INP. |
| C5 | PC12 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions LCD_COM6/LCD_SEG30/LCD_SEG50, USART5_TX and USART4_CK. |
| C6 | PA10 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions LCD_COM2, TSC_G4_IO2, USART1_RX and I2C1_SDA. |
| C7 | PA9 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions MCO, LCD_COM1, TSC_G4_IO1, USART1_TX, I2C1_SCL and I2C3_SMBA. |
| C8 | PA11 | bidirectional | 5 V tolerant GPIO (FT) powered by VDD_USB, with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, and additional function USB_DM. |
| D1 | PH1-OSC_OUT | bidirectional | Standard 3.3 V I/O (TC) that also serves as the HSE oscillator output OSC_OUT. |
| D2 | VDD | power_in | Main digital supply pin of the device. |
| D3 | PB6 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP. |
| D4 | VSS | power_in | Ground pin for the digital supply domain. |
| D5 | VSS | power_in | Ground pin for the digital supply domain. |
| D6 | VSS | power_in | Ground pin for the digital supply domain. |
| D7 | PA8 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions MCO, LCD_COM0, USB_CRS_SYNC, EVENTOUT, USART1_CK and I2C3_SCL. |
| D8 | PC9 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions TIM21_ETR, LCD_SEG27, USB_NOE/TIM3_CH4, TSC_G8_IO4 and I2C3_SDA. |
| E1 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| E2 | PC1 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions LPTIM1_OUT, LCD_SEG19, EVENTOUT, TSC_G7_IO2, LPUART1_TX and I2C3_SDA, and additional function ADC_IN11. |
| E3 | PC0 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions LPTIM1_IN1, LCD_SEG18, EVENTOUT, TSC_G7_IO1, LPUART1_RX and I2C3_SCL, and additional function ADC_IN10. |
| E4 | VDD | power_in | Main digital supply pin of the device. |
| E5 | VDD | power_in | Main digital supply pin of the device. |
| E6 | VDD_USB | power_in | Supply pin for the USB-powered I/Os PA11 and PA12; for characteristics that refer to VDD of these pins, VDD_USB must be used instead. |
| E7 | PC7 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions TIM22_CH2, LCD_SEG25, TIM3_CH2 and TSC_G8_IO2. |
| E8 | PC8 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions TIM22_ETR, LCD_SEG26, TIM3_CH3 and TSC_G8_IO3. |
| F1 | VSSA | power_in | Ground pin for the analog domain (ADC, DAC, comparators and reference). |
| F2 | PC2 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions LPTIM1_IN2, LCD_SEG20, SPI2_MISO/I2S2_MCK and TSC_G7_IO3, and additional function ADC_IN12. |
| F3 | PA2 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions TIM21_CH1, LCD_SEG1, TIM2_CH3, TSC_G1_IO3, USART2_TX, LPUART1_TX and COMP2_OUT, and additional functions COMP2_INM and ADC_IN2. |
| F4 | PA5 | bidirectional | Standard 3.3 V I/O (TC) with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1, and additional functions COMP1_INM, COMP2_INM, ADC_IN5 and DAC_OUT2. |
| F5 | PB0 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions EVENTOUT, LCD_SEG5, TIM3_CH3 and TSC_G3_IO2, and additional functions LCD_VLCD3, ADC_IN8 and VREF_OUT. |
| F6 | PC6 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions TIM22_CH1, LCD_SEG24, TIM3_CH1 and TSC_G8_IO1. |
| F7 | PB15 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions SPI2_MOSI/I2S2_SD, LCD_SEG15 and RTC_REFIN. |
| F8 | PB14 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions SPI2_MISO/I2S2_MCK, LCD_SEG14, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2. |
| G1 | VREF+ | power_in | Positive reference voltage pin for the ADC and DAC. |
| G2 | PA0 | bidirectional | Standard 3.3 V I/O (TC) with alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, USART4_TX and COMP1_OUT, and additional functions COMP1_INM, ADC_IN0 and RTC_TAMP2/WKUP1. |
| G3 | PA3 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions TIM21_CH2, LCD_SEG2, TIM2_CH4, TSC_G1_IO4, USART2_RX and LPUART1_RX, and additional functions COMP2_INP and ADC_IN3. |
| G4 | PA6 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions SPI1_MISO, LCD_SEG3, TIM3_CH1, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and additional function ADC_IN6. |
| G5 | PB1 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions LCD_SEG6, TIM3_CH4, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE, and additional functions ADC_IN9 and VREF_OUT. |
| G6 | PB2 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions LPTIM1_OUT, TSC_G3_IO4 and I2C3_SMBA, and additional function LCD_VLCD2. |
| G7 | PB10 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions LCD_SEG10, TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK, I2C2_SCL and LPUART1_RX. |
| G8 | PB13 | bidirectional | 5 V tolerant, Fm+ capable GPIO (FTf) with alternate functions SPI2_SCK/I2S2_CK, LCD_SEG13, MCO, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1. |
| H1 | VDDA | power_in | Analog supply pin for the ADC, DAC, comparators and reference. |
| H2 | PA1 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions EVENTOUT, LCD_SEG0, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR and USART4_RX, and additional functions COMP1_INP and ADC_IN1. |
| H3 | PA4 | bidirectional | Standard 3.3 V I/O (TC) with reduced touch sensing sensitivity (recommended as sampling capacitor I/O), alternate functions SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR, and additional functions COMP1_INM, COMP2_INM, ADC_IN4 and DAC_OUT1. |
| H4 | PA7 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions SPI1_MOSI, LCD_SEG4, TIM3_CH2, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT, and additional function ADC_IN7. |
| H5 | PC4 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions EVENTOUT, LCD_SEG22 and LPUART1_TX, and additional function ADC_IN14. |
| H6 | PC5 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions LCD_SEG23, LPUART1_RX and TSC_G3_IO1, and additional function ADC_IN15. |
| H7 | PB11 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions EVENTOUT, LCD_SEG11, TIM2_CH4, TSC_G6_IO1, LPUART1_RX, I2C2_SDA and LPUART1_TX. |
| H8 | PB12 | bidirectional | 5 V tolerant GPIO (FT) with alternate functions SPI2_NSS/I2S2_WS, LCD_SEG12, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT, and additional function LCD_VLCD1. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TFBGA-64 |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L083RZH6 - Footprint:
Package_BGA:TFBGA-64_5x5mm_Layout8x8_P0.5mm - 3D model: TFBGA-64 (KiCad packages3D, STEP)
- 3D model files:
stm32l083rzh6-etched.step/stm32l083rzh6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l083rzh6.step/stm32l083rzh6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (149 pp, sha256
1462680d1cd25fe2, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).