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STM32L082KZU6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32l082kzu6factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32L082KZU6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)

STM32L082KZU6 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC14-OSC32_IN bidirectional PC14 general-purpose I/O with FT structure (5 V tolerant), floating input after reset, and additional function OSC32_IN for the 32.768 kHz low-speed oscillator.
2 PC15-OSC32_OUT bidirectional PC15 general-purpose I/O with TC structure (standard 3.3 V I/O), floating input after reset, and additional function OSC32_OUT for the 32.768 kHz low-speed oscillator.
3 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
4 VSSA power_in Analog ground supply pin, listed as a supply (S) pin in the pin definition table.
5 VDDA power_in Analog supply pin; the datasheet references VDDA for ADC accuracy and internal reference voltage measurements.
6 PA0 bidirectional PA0 I/O with TTa structure, also usable as COMP1_INM, ADC_IN0, RTC_TAMP2/WKUP1, TIM2_CH1 and USART2_CTS.
7 PA1 bidirectional PA1 I/O with FT structure (5 V tolerant), also usable as COMP1_INP, ADC_IN1, TIM2_CH2, USART2_RTS/USART2_DE and TIM21_ETR.
8 PA2 bidirectional PA2 I/O with FT structure (5 V tolerant), also usable as COMP2_INM, ADC_IN2, TIM21_CH1, USART2_TX and LPUART1_TX.
9 PA3 bidirectional PA3 I/O with FT structure (5 V tolerant), also usable as COMP2_INP, ADC_IN3, TIM21_CH2, USART2_RX and LPUART1_RX.
10 PA4 bidirectional PA4 I/O with TC structure, offering reduced touch sensing sensitivity so it is recommended as a sampling capacitor I/O; also usable as ADC_IN4, DAC_OUT1, SPI1_NSS and USART2_CK.
11 PA5 bidirectional PA5 I/O with TC structure (standard 3.3 V I/O), also usable as ADC_IN5, DAC_OUT2, SPI1_SCK and TIM2_CH1.
12 PA6 bidirectional PA6 I/O with FT structure (5 V tolerant), also usable as ADC_IN6, SPI1_MISO, TIM3_CH1, LPUART1_CTS and COMP1_OUT.
13 PA7 bidirectional PA7 I/O with FT structure (5 V tolerant), also usable as ADC_IN7, SPI1_MOSI, TIM3_CH2 and COMP2_OUT.
14 PB0 bidirectional PB0 I/O with FT structure (5 V tolerant), also usable as ADC_IN8, VREF_OUT, TIM3_CH3 and TSC_G3_IO2.
15 PB1 bidirectional PB1 I/O with FT structure (5 V tolerant), also usable as ADC_IN9, VREF_OUT, TIM3_CH4, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE.
16 VSS power_in Ground supply pin; all voltages in the datasheet are referenced to VSS.
17 VDD power_in Main supply pin; the device operates from a 1.65 V to 3.6 V power supply.
18 PA8 bidirectional PA8 I/O with FTf structure (5 V tolerant, Fast Mode Plus capable), also usable as MCO, USB_CRS_SYNC, USART1_CK and I2C3_SCL.
19 PA9 bidirectional PA9 I/O with FTf structure (5 V tolerant, Fast Mode Plus capable), also usable as MCO, TSC_G4_IO1, USART1_TX and I2C1_SCL.
20 PA10 bidirectional PA10 I/O with FTf structure (5 V tolerant, Fast Mode Plus capable), also usable as TSC_G4_IO2, USART1_RX and I2C1_SDA.
21 PA11 bidirectional PA11 I/O with FT structure (5 V tolerant), powered by VDD_USB, also usable as USB_DM, SPI1_MISO, USART1_CTS and COMP1_OUT.
22 PA12 bidirectional PA12 I/O with FT structure (5 V tolerant), powered by VDD_USB, also usable as USB_DP, SPI1_MOSI, USART1_RTS/USART1_DE and COMP2_OUT.
23 PA13 bidirectional PA13 I/O with FT structure (5 V tolerant), also usable as SWDIO, USB_NOE and LPUART1_RX.
24 VDD_USB power_in Supply pin for the USB-capable I/Os PA11 and PA12; characteristics that refer to VDD must use VDD_USB for these pins.
25 PA14 bidirectional PA14 I/O with FT structure (5 V tolerant), also usable as SWCLK, USART2_TX and LPUART1_TX.
26 PB4 bidirectional PB4 I/O with FTf structure (5 V tolerant, Fast Mode Plus capable), also usable as SPI1_MISO, TIM3_CH1, TSC_G5_IO2, USART5_RX, I2C3_SDA and COMP2_INP.
27 PB5 bidirectional PB5 I/O with FT structure (5 V tolerant), also usable as SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, USART1_CK, USART5_CK and COMP2_INP.
28 PB6 bidirectional PB6 I/O with FTf structure (5 V tolerant, Fast Mode Plus capable), also usable as USART1_TX, I2C1_SCL, LPTIM1_ETR, TSC_G5_IO3 and COMP2_INP.
29 PB7 bidirectional PB7 I/O with FTf structure (5 V tolerant, Fast Mode Plus capable), also usable as USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4, COMP2_INP and VREF_PVD_IN.
30 BOOT0 input Dedicated BOOT0 input-only pin used for boot mode selection.
31 VSS power_in Ground supply pin; all voltages in the datasheet are referenced to VSS.
32 VDD power_in Main supply pin; the device operates from a 1.65 V to 3.6 V power supply.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-32(5x5)
Category Embedded Processors & Controllers
Pins 33

CAD (KiCad official)

  • Symbol: STM32L082KZU6
  • Footprint: Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm
  • 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: stm32l082kzu6-etched.step / stm32l082kzu6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l082kzu6.step / stm32l082kzu6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (129 pp, sha256 41501e7bc01c7e79, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF