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STM32L073VZT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32l073vzt6factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32L073VZT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32L073VZT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO port E bit 2, 5V-tolerant; supports LCD segment 38 output or TIM3 external trigger input.
2 PE3 bidirectional GPIO port E bit 3, 5V-tolerant; supports LCD segment 39, TIM22 channel 1, or TIM3 channel 1 output.
3 PE4 bidirectional GPIO port E bit 4, 5V-tolerant; supports TIM22 channel 2 or TIM3 channel 2 output.
4 PE5 bidirectional GPIO port E bit 5, 5V-tolerant; supports TIM21 channel 1 or TIM3 channel 3 output.
5 PE6 bidirectional GPIO port E bit 6, 5V-tolerant; supports TIM21 channel 2, TIM3 channel 4, or RTC tamper/wakeup functions.
6 VLCD power_in LCD voltage supply pin for internal step-up converter or external LCD voltage input.
7 PC13 bidirectional GPIO port C bit 13, 5V-tolerant; supports RTC tamper detection, timestamp, or wakeup functions.
8 PC14-OSC32_IN bidirectional GPIO port C bit 14 or 32 kHz oscillator input; 5V-tolerant, supports external low-speed oscillator clock input.
9 PC15-OSC32_OUT bidirectional GPIO port C bit 15 or 32 kHz oscillator output; 3.3V I/O supporting external oscillator drive output.
10 PH9 bidirectional GPIO port H bit 9, 5V-tolerant; general-purpose I/O pin.
11 PH10 bidirectional GPIO port H bit 10, 5V-tolerant; general-purpose I/O pin.
12 PH0-OSC_IN bidirectional GPIO port H bit 0 or high-speed oscillator input; 3.3V I/O supporting external clock input or USB CRS synchronization.
13 PH1-OSC_OUT bidirectional GPIO port H bit 1 or high-speed oscillator output; 3.3V I/O supporting external oscillator drive output.
14 NRST bidirectional Reset input pin with integrated weak pull-up and glitch filter; active low with 50 ns spike filtering.
15 PC0 bidirectional GPIO port C bit 0, 5V-tolerant with FM+ capability; supports LPTIM1, LCD segment 18, TSC, LPUART1, I2C3, and ADC channel 10.
16 PC1 bidirectional GPIO port C bit 1, 5V-tolerant with FM+ capability; supports LPTIM1 output, LCD segment 19, TSC, LPUART1, I2C3, and ADC channel 11.
17 PC2 bidirectional GPIO port C bit 2, 5V-tolerant with FM+ capability; supports LPTIM1, LCD segment 20, SPI2/I2S2, TSC, and ADC channel 12.
18 PC3 bidirectional GPIO port C bit 3, 5V-tolerant; supports LPTIM1 external trigger, LCD segment 21, SPI2/I2S2, TSC, and ADC channel 13.
19 VSSA power_in Analog ground supply pin; must be connected to VSS.
20 VREF- power_in Negative reference voltage pin; typically connected to VSSA/VSS (0 V reference).
21 VREF+ power_in Positive reference voltage supply pin for ADC and DAC; range 1.65 V to VDDA with ±5 mV factory calibration.
22 VDDA power_in Analog power supply pin; range 1.8 V to 3.6 V for full ADC/DAC/comparator operation, must be same as VDD (±300 mV).
23 PA0 bidirectional GPIO port A bit 0, 3.3V I/O; supports TIM2 channel 1, TSC group 1, USART2/USART4, comparator 1, ADC channel 0, and RTC wakeup.
24 PA1 bidirectional GPIO port A bit 1, 5V-tolerant; supports LCD segment 0, TIM2 channel 2, TSC, USART2/USART4, comparator 1, and ADC channel 1.
25 PA2 bidirectional GPIO port A bit 2, 5V-tolerant; supports TIM21/TIM2 channels, LCD segment 1, TSC, USART2, LPUART1, comparator 2, and ADC channel 2.
26 PA3 bidirectional GPIO port A bit 3, 5V-tolerant; supports TIM21/TIM2 channels, LCD segment 2, TSC, USART2, LPUART1, comparator 2, and ADC channel 3.
27 VSS power_in Ground supply pin; must be connected to external power supply ground.
28 VDD power_in Positive power supply pin; range 1.65 V to 3.6 V (1.8 V with BOR enabled).
29 PA4 bidirectional GPIO port A bit 4, 3.3V I/O with reduced TSC sensitivity; supports SPI1 NSS, USART2 clock, TIM22, comparators, ADC channel 4, and DAC output 1.
30 PA5 bidirectional GPIO port A bit 5, 3.3V I/O; supports SPI1 clock, TIM2 functions, TSC, comparators, ADC channel 5, and DAC output 2.
31 PA6 bidirectional GPIO port A bit 6, 5V-tolerant; supports SPI1 MISO, LCD segment 3, TIM3/TIM22 channels, TSC, LPUART1 CTS, comparator 1, and ADC channel 6.
32 PA7 bidirectional GPIO port A bit 7, 5V-tolerant; supports SPI1 MOSI, LCD segment 4, TIM3/TIM22 channels, TSC, comparator 2, and ADC channel 7.
33 PC4 bidirectional GPIO port C bit 4, 5V-tolerant; supports LPUART1 transmit output and LCD segment 22 output.
34 PC5 bidirectional GPIO port C bit 5, 5V-tolerant; supports LPUART1 receive input, LCD segment 23, and TSC group 3.
35 PB0 bidirectional GPIO port B bit 0, 5V-tolerant; supports LCD segment 5 and voltage output, TIM3 channel 3, TSC, ADC channel 8, and reference voltage output.
36 PB1 bidirectional GPIO port B bit 1, 5V-tolerant; supports LCD segment 6 and voltage 2, TIM3 channel 4, TSC, LPUART1 control, ADC channel 9, and reference voltage output.
37 PB2 bidirectional GPIO port B bit 2, 5V-tolerant; supports LPTIM1 output, TSC group 3, I2C3, and LCD voltage 2.
38 PE7 bidirectional GPIO port E bit 7, 5V-tolerant; supports LCD segment 45 and USART5 clock/control functions.
39 PE8 bidirectional GPIO port E bit 8, 5V-tolerant; supports LCD segment 46 and USART4 transmit output.
40 PE9 bidirectional GPIO port E bit 9, 5V-tolerant; supports TIM2 channel 1, LCD segment 47, and USART4 receive input.
41 PE10 bidirectional GPIO port E bit 10, 5V-tolerant; supports TIM2 channel 2, LCD segment 40, and USART5 transmit output.
42 PE11 bidirectional GPIO port E bit 11, 5V-tolerant; supports TIM2 channel 3, USART5 receive input, and LCD voltage 1.
43 PE12 bidirectional GPIO port E bit 12, 5V-tolerant; supports TIM2 channel 4, SPI1 NSS, and LCD voltage 3.
44 PE13 bidirectional GPIO port E bit 13, 5V-tolerant; supports LCD segment 41 and SPI1 clock output.
45 PE14 bidirectional GPIO port E bit 14, 5V-tolerant; supports LCD segment 42 and SPI1 MISO input.
46 PE15 bidirectional GPIO port E bit 15, 5V-tolerant; supports LCD segment 43 and SPI1 MOSI output.
47 PB10 bidirectional GPIO port B bit 10, 5V-tolerant; supports LCD segment 10, TIM2 channel 3, TSC synchronization, LPUART1, SPI2 clock, and I2C2 clock.
48 PB11 bidirectional GPIO port B bit 11, 5V-tolerant; supports LCD segment 11, TIM2 channel 4, TSC group 6, LPUART1, and I2C2 data.
49 VSS power_in Ground supply pin; must be connected to external power supply ground.
50 VDD power_in Positive power supply pin; range 1.65 V to 3.6 V (1.8 V with BOR enabled).
51 PB12 bidirectional GPIO port B bit 12, 5V-tolerant; supports SPI2/I2S2, LCD segment 12 and voltage 1, LPUART1 control, TSC, I2C2, and event output.
52 PB13 bidirectional GPIO port B bit 13, 5V-tolerant FM+ capable; supports SPI2/I2S2 clock, LCD segment 13, MCO output, LPUART1 CTS, TSC, and I2C2.
53 PB14 bidirectional GPIO port B bit 14, 5V-tolerant FM+ capable; supports SPI2/I2S2 MISO, LCD segment 14, RTC output, LPUART1 control, TSC, and I2C2.
54 PB15 bidirectional GPIO port B bit 15, 5V-tolerant; supports SPI2/I2S2 MOSI, LCD segment 15, and RTC reference input.
55 PD8 bidirectional GPIO port D bit 8, 5V-tolerant; supports LPUART1 transmit output and LCD segment 28.
56 PD9 bidirectional GPIO port D bit 9, 5V-tolerant; supports LPUART1 receive input and LCD segment 29.
57 PD10 bidirectional GPIO port D bit 10, 5V-tolerant; supports LCD segment 30 output.
58 PD11 bidirectional GPIO port D bit 11, 5V-tolerant; supports LPUART1 CTS input and LCD segment 31 output.
59 PD12 bidirectional GPIO port D bit 12, 5V-tolerant; supports LPUART1 control functions and LCD segment 32 output.
60 PD13 bidirectional GPIO port D bit 13, 5V-tolerant; supports LCD segment 33 output.
61 PD14 bidirectional GPIO port D bit 14, 5V-tolerant; supports LCD segment 34 output.
62 PD15 bidirectional GPIO port D bit 15, 5V-tolerant; supports USB CRS synchronization and LCD segment 35 output.
63 PC6 bidirectional GPIO port C bit 6, 5V-tolerant; supports TIM22 channel 1, LCD segment 24, TIM3 channel 1, and TSC group 8.
64 PC7 bidirectional GPIO port C bit 7, 5V-tolerant; supports TIM22 channel 2, LCD segment 25, TIM3 channel 2, and TSC group 8.
65 PC8 bidirectional GPIO port C bit 8, 5V-tolerant; supports TIM22 external trigger, LCD segment 26, TIM3 channel 3, and TSC group 8.
66 PC9 bidirectional GPIO port C bit 9, 5V-tolerant FM+ capable; supports TIM21 trigger, LCD segment 27, USB NOE, TSC, I2C3, and ADC channel 13.
67 PA8 bidirectional GPIO port A bit 8, 5V-tolerant FM+ capable; supports MCO output, LCD common 0, USB CRS synchronization, USART1 clock, and I2C3 clock.
68 PA9 bidirectional GPIO port A bit 9, 5V-tolerant FM+ capable; supports MCO output, LCD common 1, TSC, USART1, I2C1, and I2C3.
69 PA10 bidirectional GPIO port A bit 10, 5V-tolerant FM+ capable; supports LCD common 2, TSC, USART1 receive, and I2C1 data.
70 PA11 bidirectional GPIO port A bit 11, 5V-tolerant powered by VDD_USB; supports SPI1 MISO, TSC, USART1 CTS, comparator 1, or USB differential minus data line.
71 PA12 bidirectional GPIO port A bit 12, 5V-tolerant powered by VDD_USB; supports SPI1 MOSI, TSC, USART1 control, comparator 2, or USB differential plus data line.
72 PA13 bidirectional GPIO port A bit 13, 5V-tolerant; supports serial wire debug I/O (SWDIO), USB NOE, and LPUART1 receive.
73 VDD power_in Positive power supply pin; range 1.65 V to 3.6 V (1.8 V with BOR enabled).
74 VSS power_in Ground supply pin; must be connected to external power supply ground.
75 VDD_USB power_in USB power supply pin; range 3.0 V to 3.6 V for USB compliance, powers USB transceiver and PA11/PA12.
76 PA14 bidirectional GPIO port A bit 14, 5V-tolerant; supports serial wire debug clock (SWCLK), USART2 transmit, and LPUART1 transmit.
77 PA15 bidirectional GPIO port A bit 15, 5V-tolerant; supports SPI1 NSS, LCD segment 17, TIM2 functions, USART2, and USART4 control functions.
78 PC10 bidirectional GPIO port C bit 10, 5V-tolerant; supports LPUART1 transmit, LCD common/segment output, and USART4 transmit.
79 PC11 bidirectional GPIO port C bit 11, 5V-tolerant; supports LPUART1 receive, LCD common/segment output, and USART4 receive.
80 PC12 bidirectional GPIO port C bit 12, 5V-tolerant; supports LCD common/segment output, USART5 transmit, and USART4 clock.
81 PD0 bidirectional GPIO port D bit 0, 5V-tolerant; supports TIM21 channel 1 and SPI2/I2S2 chip select.
82 PD1 bidirectional GPIO port D bit 1, 5V-tolerant; supports SPI2/I2S2 clock output.
83 PD2 bidirectional GPIO port D bit 2, 5V-tolerant; supports LPUART1 control, LCD common/segment, TIM3 trigger, and USART5 receive.
84 PD3 bidirectional GPIO port D bit 3, 5V-tolerant; supports USART2 CTS, LCD segment 44, and SPI2/I2S2 MISO.
85 PD4 bidirectional GPIO port D bit 4, 5V-tolerant; supports USART2 control functions and SPI2/I2S2 MOSI.
86 PD5 bidirectional GPIO port D bit 5, 5V-tolerant; supports USART2 transmit output.
87 PD6 bidirectional GPIO port D bit 6, 5V-tolerant; supports USART2 receive input.
88 PD7 bidirectional GPIO port D bit 7, 5V-tolerant; supports USART2 clock and TIM21 channel 2.
89 PB3 bidirectional GPIO port B bit 3, 5V-tolerant; supports SPI1 clock, LCD segment 7, TIM2 channel 2, TSC, USART1 control, and USART5 transmit.
90 PB4 bidirectional GPIO port B bit 4, 5V-tolerant FM+ capable; supports SPI1 MISO, LCD segment 8, TIM3 channel 1, TSC, USART1, USART5, and I2C3.
91 PB5 bidirectional GPIO port B bit 5, 5V-tolerant; supports SPI1 MOSI, LCD segment 9, LPTIM1, I2C1, TIM3/TIM22 functions, and USART5 control.
92 PB6 bidirectional GPIO port B bit 6, 5V-tolerant FM+ capable; supports USART1 transmit, I2C1 clock, LPTIM1 external trigger, and TSC.
93 PB7 bidirectional GPIO port B bit 7, 5V-tolerant FM+ capable; supports USART1 receive, I2C1 data, LPTIM1, TSC, USART4 CTS, and programmable voltage detector input.
94 BOOT0 input Dedicated boot pin for selecting boot source (Flash memory, system memory, or embedded RAM) at device reset; no internal pull-up.
95 PB8 bidirectional GPIO port B bit 8, 5V-tolerant FM+ capable; supports LCD segment 16, TSC synchronization, and I2C1 clock.
96 PB9 bidirectional GPIO port B bit 9, 5V-tolerant FM+ capable; supports LCD common 3, event output, I2C1 data, and SPI2/I2S2 chip select.
97 PE0 bidirectional GPIO port E bit 0, 5V-tolerant; supports LCD segment 36 and event output.
98 PE1 bidirectional GPIO port E bit 1, 5V-tolerant; supports LCD segment 37 and event output.
99 VSS power_in Ground supply pin; must be connected to external power supply ground.
100 VDD power_in Positive power supply pin; range 1.65 V to 3.6 V (1.8 V with BOR enabled).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32L073VZT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32l073vzt6-etched.step / stm32l073vzt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l073vzt6.step / stm32l073vzt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (157 pp, sha256 d574d5fba68fb5bd, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF