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STM32L073RZT6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L073RZT6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32L073RZT6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VLCD | power_in | LCD supply pin; its voltage can be monitored through ADC_IN16 via LCD_VLCD1. |
| 2 | PC13 | bidirectional | 5 V tolerant I/O; additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant I/O (PC14) with OSC32_IN additional function for the 32 kHz oscillator. |
| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V I/O (PC15) with OSC32_OUT additional function for the 32 kHz oscillator. |
| 5 | PH0-OSC_IN | bidirectional | Standard 3.3 V I/O (PH0) with OSC_IN crystal oscillator input; alternate function USB_CRS_SYNC. |
| 6 | PH1-OSC_OUT | bidirectional | Standard 3.3 V I/O (PH1) with OSC_OUT crystal oscillator output. |
| 7 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| 8 | PC0 | bidirectional | 5 V tolerant FM+ capable I/O; LPTIM1_IN1, LCD_SEG18, TSC_G7_IO1, LPUART1_RX, I2C3_SCL, ADC_IN10. |
| 9 | PC1 | bidirectional | 5 V tolerant FM+ capable I/O; LPTIM1_OUT, LCD_SEG19, TSC_G7_IO2, LPUART1_TX, I2C3_SDA, ADC_IN11. |
| 10 | PC2 | bidirectional | 5 V tolerant FM+ capable I/O; LPTIM1_IN2, LCD_SEG20, SPI2_MISO/I2S2_MCK, TSC_G7_IO3, ADC_IN12. |
| 11 | PC3 | bidirectional | 5 V tolerant I/O; LPTIM1_ETR, LCD_SEG21, SPI2_MOSI/I2S2_SD, TSC_G7_IO4, ADC_IN13. |
| 12 | VSSA | power_in | Analog ground supply pin. |
| 13 | VDDA | power_in | Analog supply pin. |
| 14 | PA0 | bidirectional | Standard 3.3 V I/O; TIM2_CH1, TSC_G1_IO1, USART2_CTS, USART4_TX, COMP1_OUT, COMP1_INM, ADC_IN0, RTC_TAMP2/WKUP1. |
| 15 | PA1 | bidirectional | 5 V tolerant I/O; LCD_SEG0, TIM2_CH2, USART2_RTS/DE, USART4_RX, COMP1_INP, ADC_IN1. |
| 16 | PA2 | bidirectional | 5 V tolerant I/O; TIM21_CH1, LCD_SEG1, TIM2_CH3, USART2_TX, LPUART1_TX, COMP2_OUT, COMP2_INM, ADC_IN2. |
| 17 | PA3 | bidirectional | 5 V tolerant I/O; TIM21_CH2, LCD_SEG2, TIM2_CH4, USART2_RX, LPUART1_RX, COMP2_INP, ADC_IN3. |
| 18 | VSS | power_in | Digital ground supply pin. |
| 19 | VDD | power_in | Digital supply pin. |
| 20 | PA4 | bidirectional | Standard 3.3 V I/O; SPI1_NSS, USART2_CK, ADC_IN4, DAC_OUT1; reduced touch sensing sensitivity, use as sampling capacitor I/O. |
| 21 | PA5 | bidirectional | Standard 3.3 V I/O; SPI1_SCK, TIM2_ETR, ADC_IN5, DAC_OUT2; reduced touch sensing sensitivity, use as sampling capacitor I/O. |
| 22 | PA6 | bidirectional | 5 V tolerant I/O; SPI1_MISO, LCD_SEG3, TIM3_CH1, LPUART1_CTS, TIM22_CH1, COMP1_OUT, ADC_IN6. |
| 23 | PA7 | bidirectional | 5 V tolerant I/O; SPI1_MOSI, LCD_SEG4, TIM3_CH2, TIM22_CH2, COMP2_OUT, ADC_IN7. |
| 24 | PC4 | bidirectional | 5 V tolerant I/O; LCD_SEG22, LPUART1_TX, ADC_IN14. |
| 25 | PC5 | bidirectional | 5 V tolerant I/O; LCD_SEG23, LPUART1_RX, TSC_G3_IO1, ADC_IN15. |
| 26 | PB0 | bidirectional | 5 V tolerant I/O; LCD_SEG5, TIM3_CH3, TSC_G3_IO2, LCD_VLCD3, ADC_IN8, VREF_OUT. |
| 27 | PB1 | bidirectional | 5 V tolerant I/O; LCD_SEG6, TIM3_CH4, LPUART1_RTS/DE, ADC_IN9, VREF_OUT. |
| 28 | PB2 | bidirectional | 5 V tolerant I/O; LPTIM1_OUT, TSC_G3_IO4, I2C3_SMBA, LCD_VLCD2. |
| 29 | PB10 | bidirectional | 5 V tolerant I/O; LCD_SEG10, TIM2_CH3, TSC_SYNC, LPUART1_TX/RX, SPI2_SCK, I2C2_SCL. |
| 30 | PB11 | bidirectional | 5 V tolerant I/O; LCD_SEG11, TIM2_CH4, TSC_G6_IO1, LPUART1_RX/TX, I2C2_SDA. |
| 31 | VSS | power_in | Digital ground supply pin. |
| 32 | VDD | power_in | Digital supply pin. |
| 33 | PB12 | bidirectional | 5 V tolerant I/O; SPI2_NSS/I2S2_WS, LCD_SEG12, LPUART1_RTS/DE, I2C2_SMBA, LCD_VLCD1. |
| 34 | PB13 | bidirectional | 5 V tolerant FM+ capable I/O; SPI2_SCK/I2S2_CK, LCD_SEG13, MCO, LPUART1_CTS, I2C2_SCL, TIM21_CH1. |
| 35 | PB14 | bidirectional | 5 V tolerant FM+ capable I/O; SPI2_MISO/I2S2_MCK, LCD_SEG14, RTC_OUT, LPUART1_RTS/DE, I2C2_SDA, TIM21_CH2. |
| 36 | PB15 | bidirectional | 5 V tolerant I/O; SPI2_MOSI/I2S2_SD, LCD_SEG15, RTC_REFIN. |
| 37 | PC6 | bidirectional | 5 V tolerant I/O; TIM22_CH1, LCD_SEG24, TIM3_CH1, TSC_G8_IO1. |
| 38 | PC7 | bidirectional | 5 V tolerant I/O; TIM22_CH2, LCD_SEG25, TIM3_CH2, TSC_G8_IO2. |
| 39 | PC8 | bidirectional | 5 V tolerant I/O; TIM22_ETR, LCD_SEG26, TIM3_CH3, TSC_G8_IO3. |
| 40 | PC9 | bidirectional | 5 V tolerant FM+ capable I/O; TIM21_ETR, LCD_SEG27, USB_NOE/TIM3_CH4, I2C3_SDA. |
| 41 | PA8 | bidirectional | 5 V tolerant FM+ capable I/O; MCO, LCD_COM0, USB_CRS_SYNC, USART1_CK, I2C3_SCL. |
| 42 | PA9 | bidirectional | 5 V tolerant FM+ capable I/O; MCO, LCD_COM1, TSC_G4_IO1, USART1_TX, I2C1_SCL, I2C3_SMBA. |
| 43 | PA10 | bidirectional | 5 V tolerant FM+ capable I/O; LCD_COM2, TSC_G4_IO2, USART1_RX, I2C1_SDA. |
| 44 | PA11 | bidirectional | 5 V tolerant I/O powered by VDD_USB; USB_DM, SPI1_MISO, USART1_CTS, COMP1_OUT. |
| 45 | PA12 | bidirectional | 5 V tolerant I/O powered by VDD_USB; USB_DP, SPI1_MOSI, USART1_RTS/DE, COMP2_OUT. |
| 46 | PA13 | bidirectional | 5 V tolerant I/O; SWDIO after reset, USB_NOE, LPUART1_RX. |
| 47 | VSS | power_in | Digital ground supply pin. |
| 48 | VDD_USB | power_in | Supply pin for the USB I/Os (PA11/PA12); VDD_USB must be used instead of VDD for their characteristics. |
| 49 | PA14 | bidirectional | 5 V tolerant I/O; SWCLK after reset, USART2_TX, LPUART1_TX. |
| 50 | PA15 | bidirectional | 5 V tolerant I/O; SPI1_NSS, LCD_SEG17, TIM2_ETR, USART2_RX, TIM2_CH1, USART4_RTS/DE. |
| 51 | PC10 | bidirectional | 5 V tolerant I/O; LPUART1_TX, LCD_COM4/LCD_SEG28/LCD_SEG48, USART4_TX. |
| 52 | PC11 | bidirectional | 5 V tolerant I/O; LPUART1_RX, LCD_COM5/LCD_SEG29/LCD_SEG49, USART4_RX. |
| 53 | PC12 | bidirectional | 5 V tolerant I/O; LCD_COM6/LCD_SEG30/LCD_SEG50, USART5_TX, USART4_CK. |
| 54 | PD2 | bidirectional | 5 V tolerant I/O; LPUART1_RTS/DE, LCD_COM7/LCD_SEG31/LCD_SEG51, TIM3_ETR, USART5_RX. |
| 55 | PB3 | bidirectional | 5 V tolerant I/O; SPI1_SCK, LCD_SEG7, TIM2_CH2, USART1_RTS/DE, USART5_TX, COMP2_INM. |
| 56 | PB4 | bidirectional | 5 V tolerant FM+ capable I/O; SPI1_MISO, LCD_SEG8, TIM3_CH1, TIM22_CH1, USART1_CTS, USART5_RX, I2C3_SDA, COMP2_INP. |
| 57 | PB5 | bidirectional | 5 V tolerant I/O; SPI1_MOSI, LCD_SEG9, LPTIM1_IN1, I2C1_SMBA, USART1_CK, USART5_CK, COMP2_INP. |
| 58 | PB6 | bidirectional | 5 V tolerant FM+ capable I/O; USART1_TX, I2C1_SCL, LPTIM1_ETR, TSC_G5_IO3, COMP2_INP. |
| 59 | PB7 | bidirectional | 5 V tolerant FM+ capable I/O; USART1_RX, I2C1_SDA, LPTIM1_IN2, USART4_CTS, COMP2_INP, PVD_IN. |
| 60 | BOOT0 | input | Dedicated BOOT0 input pin selecting boot mode. |
| 61 | PB8 | bidirectional | 5 V tolerant FM+ capable I/O; LCD_SEG16, TSC_SYNC, I2C1_SCL. |
| 62 | PB9 | bidirectional | 5 V tolerant FM+ capable I/O; LCD_COM3, I2C1_SDA, SPI2_NSS/I2S2_WS. |
| 63 | VSS | power_in | Digital ground supply pin. |
| 64 | VDD | power_in | Digital supply pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L073RZT6TR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32l073rzt6tr-etched.step/stm32l073rzt6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l073rzt6tr.step/stm32l073rzt6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (163 pp, sha256
2453eed55752e9c7, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).