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STM32L073RZT3

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32l073rzt3factory-2.0.0extractor-text
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STM32L073RZT3

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L073RZT3 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VLCD power_in LCD power supply pin; per Section 3.13.2 VLCD may be higher than VDDA.
2 PC13 bidirectional 5 V tolerant I/O (FT) with RTC functions RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2.
3 PC14-OSC32_IN bidirectional 5 V tolerant I/O (FT) that is also the 32 kHz oscillator input OSC32_IN.
4 PC15-OSC32_OUT bidirectional Standard 3.3 V I/O (TC) that is also the 32 kHz oscillator output OSC32_OUT.
5 PH0-OSC_IN bidirectional Standard 3.3 V I/O (TC) that is also the HSE oscillator input OSC_IN, with alternate function USB_CRS_SYNC.
6 PH1-OSC_OUT bidirectional Standard 3.3 V I/O (TC) that is also the HSE oscillator output OSC_OUT.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
8 PC0 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions LPTIM1_IN1, LCD_SEG18, EVENTOUT, TSC_G7_IO1, LPUART1_RX, I2C3_SCL and analog input ADC_IN10.
9 PC1 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions LPTIM1_OUT, LCD_SEG19, EVENTOUT, TSC_G7_IO2, LPUART1_TX, I2C3_SDA and analog input ADC_IN11.
10 PC2 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions LPTIM1_IN2, LCD_SEG20, SPI2_MISO/I2S2_MCK, TSC_G7_IO3 and analog input ADC_IN12.
11 PC3 bidirectional 5 V tolerant I/O (FT) with alternate functions LPTIM1_ETR, LCD_SEG21, SPI2_MOSI/I2S2_SD, TSC_G7_IO4 and analog input ADC_IN13.
12 VSSA power_in Analog ground pin.
13 VDDA power_in Analog supply pin; the ADC and other analog parameters are specified against VDDA.
14 PA0 bidirectional Standard 3.3 V I/O (TC) with alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, USART4_TX and COMP1_OUT, plus COMP1_INM, ADC_IN0 and RTC_TAMP2/WKUP1.
15 PA1 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT, LCD_SEG0, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR and USART4_RX, plus COMP1_INP and ADC_IN1.
16 PA2 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM21_CH1, LCD_SEG1, TIM2_CH3, TSC_G1_IO3, USART2_TX, LPUART1_TX and COMP2_OUT, plus COMP2_INM and ADC_IN2.
17 PA3 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM21_CH2, LCD_SEG2, TIM2_CH4, TSC_G1_IO4, USART2_RX and LPUART1_RX, plus COMP2_INP and ADC_IN3.
18 VSS power_in Ground pin.
19 VDD power_in Digital supply pin; the device operates from 1.65 V to 3.6 V.
20 PA4 bidirectional Standard 3.3 V I/O (TC) with reduced touch sensing sensitivity (recommended for use as sampling capacitor I/O), alternate functions SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR, plus COMP1_INM, COMP2_INM, ADC_IN4 and DAC_OUT1.
21 PA5 bidirectional Standard 3.3 V I/O (TC) with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1, plus COMP1_INM, COMP2_INM, ADC_IN5 and DAC_OUT2.
22 PA6 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MISO, LCD_SEG3, TIM3_CH1, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, plus ADC_IN6.
23 PA7 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, LCD_SEG4, TIM3_CH2, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT, plus ADC_IN7.
24 PC4 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT, LCD_SEG22 and LPUART1_TX, plus ADC_IN14.
25 PC5 bidirectional 5 V tolerant I/O (FT) with alternate functions LCD_SEG23, LPUART1_RX and TSC_G3_IO1, plus ADC_IN15.
26 PB0 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT, LCD_SEG5, TIM3_CH3 and TSC_G3_IO2, plus LCD_VLCD3, ADC_IN8 and VREF_OUT.
27 PB1 bidirectional 5 V tolerant I/O (FT) with alternate functions LCD_SEG6, TIM3_CH4, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE, plus ADC_IN9 and VREF_OUT.
28 PB2 bidirectional 5 V tolerant I/O (FT) with alternate functions LPTIM1_OUT, TSC_G3_IO4 and I2C3_SMBA, plus LCD_VLCD2.
29 PB10 bidirectional 5 V tolerant I/O (FT) with alternate functions LCD_SEG10, TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK, I2C2_SCL and LPUART1_RX.
30 PB11 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT, LCD_SEG11, TIM2_CH4, TSC_G6_IO1, LPUART1_RX, I2C2_SDA and LPUART1_TX.
31 VSS power_in Ground pin.
32 VDD power_in Digital supply pin; the device operates from 1.65 V to 3.6 V.
33 PB12 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI2_NSS/I2S2_WS, LCD_SEG12, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT, plus LCD_VLCD1.
34 PB13 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions SPI2_SCK/I2S2_CK, LCD_SEG13, MCO, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1.
35 PB14 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions SPI2_MISO/I2S2_MCK, LCD_SEG14, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2.
36 PB15 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI2_MOSI/I2S2_SD, LCD_SEG15 and RTC_REFIN.
37 PC6 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM22_CH1, LCD_SEG24, TIM3_CH1 and TSC_G8_IO1.
38 PC7 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM22_CH2, LCD_SEG25, TIM3_CH2 and TSC_G8_IO2.
39 PC8 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM22_ETR, LCD_SEG26, TIM3_CH3 and TSC_G8_IO3.
40 PC9 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions TIM21_ETR, LCD_SEG27, USB_NOE/TIM3_CH4, TSC_G8_IO4 and I2C3_SDA.
41 PA8 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions MCO, LCD_COM0, USB_CRS_SYNC, EVENTOUT, USART1_CK and I2C3_SCL.
42 PA9 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions MCO, LCD_COM1, TSC_G4_IO1, USART1_TX, I2C1_SCL and I2C3_SMBA.
43 PA10 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions LCD_COM2, TSC_G4_IO2, USART1_RX and I2C1_SDA.
44 PA11 bidirectional 5 V tolerant I/O (FT) powered by VDD_USB, with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, plus USB_DM.
45 PA12 bidirectional 5 V tolerant I/O (FT) powered by VDD_USB, with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT, plus USB_DP.
46 PA13 bidirectional 5 V tolerant I/O (FT) with alternate functions SWDIO, USB_NOE and LPUART1_RX.
47 VSS power_in Ground pin.
48 VDD_USB power_in Supply pin for the USB-powered I/Os PA11 and PA12; for characteristics that refer to VDD on these pins, VDD_USB must be used.
49 PA14 bidirectional 5 V tolerant I/O (FT) with alternate functions SWCLK, USART2_TX and LPUART1_TX.
50 PA15 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_NSS, LCD_SEG17, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1 and USART4_RTS/USART4_DE.
51 PC10 bidirectional 5 V tolerant I/O (FT) with alternate functions LPUART1_TX, LCD_COM4/LCD_SEG28/LCD_SEG48 and USART4_TX.
52 PC11 bidirectional 5 V tolerant I/O (FT) with alternate functions LPUART1_RX, LCD_COM5/LCD_SEG29/LCD_SEG49 and USART4_RX.
53 PC12 bidirectional 5 V tolerant I/O (FT) with alternate functions LCD_COM6/LCD_SEG30/LCD_SEG50, USART5_TX and USART4_CK.
54 PD2 bidirectional 5 V tolerant I/O (FT) with alternate functions LPUART1_RTS/LPUART1_DE, LCD_COM7/LCD_SEG31/LCD_SEG51, TIM3_ETR and USART5_RX.
55 PB3 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_SCK, LCD_SEG7, TIM2_CH2, TSC_G5_IO1, EVENTOUT, USART1_RTS/USART1_DE and USART5_TX, plus COMP2_INM.
56 PB4 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions SPI1_MISO, LCD_SEG8, TIM3_CH1, TSC_G5_IO2, TIM22_CH1, USART1_CTS, USART5_RX and I2C3_SDA, plus COMP2_INP.
57 PB5 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, LCD_SEG9, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK and USART5_RTS/USART5_DE, plus COMP2_INP.
58 PB6 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, plus COMP2_INP.
59 PB7 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4 and USART4_CTS, plus COMP2_INP and PVD_IN.
60 BOOT0 input Dedicated BOOT0 pin (input only).
61 PB8 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions LCD_SEG16, TSC_SYNC and I2C1_SCL.
62 PB9 bidirectional 5 V tolerant, Fm+ capable I/O (FTf) with alternate functions LCD_COM3, EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS.
63 VSS power_in Ground pin.
64 VDD power_in Digital supply pin; the device operates from 1.65 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32L073RZT3
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32l073rzt3-etched.step / stm32l073rzt3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l073rzt3.step / stm32l073rzt3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (157 pp, sha256 d574d5fba68fb5bd, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF