component
STM32L073RBT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L073RBT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32L073RBT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VLCD | power_out | LCD voltage supply output for internal or external LCD bias generation |
| 2 | PC13 | bidirectional | GPIO 5V tolerant; RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2 |
| 3 | PC14-OSC32_IN | bidirectional | 32 kHz oscillator input; OSC32_IN |
| 4 | PC15-OSC32_OUT | bidirectional | 32 kHz oscillator output; OSC32_OUT |
| 5 | PH0-OSC_IN | bidirectional | High-speed oscillator input 1-25MHz; USB_CRS_SYNC; OSC_IN |
| 6 | PH1-OSC_OUT | bidirectional | High-speed oscillator output; OSC_OUT |
| 7 | NRST | bidirectional | Reset pin with integrated pull-up and filter; external or internal reset trigger |
| 8 | PC0 | bidirectional | GPIO 5V tolerant FM+ capable; ADC_IN10; LPTIM1_IN1, LCD_SEG18, I2C3_SCL |
| 9 | PC1 | bidirectional | GPIO 5V tolerant FM+ capable; ADC_IN11; LPTIM1_OUT, LCD_SEG19, I2C3_SDA |
| 10 | PC2 | bidirectional | GPIO 5V tolerant FM+ capable; ADC_IN12; LPTIM1_IN2, SPI2_MISO/I2S2_MCK |
| 11 | PC3 | bidirectional | GPIO 5V tolerant; ADC_IN13; LPTIM1_ETR, SPI2_MOSI/I2S2_SD |
| 12 | VSSA | power_in | Analog ground reference for ADC, DAC, comparators and RCs |
| 13 | VDDA | power_in | Analog power supply 1.65 to 3.6V for ADC, DAC, comparators and oscillators |
| 14 | PA0 | bidirectional | GPIO standard CMOS; ADC_IN0, COMP1_INM, RTC_TAMP2/WKUP1; TIM2_CH1, USART2_CTS |
| 15 | PA1 | bidirectional | GPIO 5V tolerant; ADC_IN1, COMP1_INP; TIM2_CH2, USART2_RTS/DE |
| 16 | PA2 | bidirectional | GPIO 5V tolerant; ADC_IN2, COMP2_INM; TIM2_CH3, USART2_TX, LPUART1_TX |
| 17 | PA3 | bidirectional | GPIO 5V tolerant; ADC_IN3, COMP2_INP; TIM2_CH4, USART2_RX, LPUART1_RX |
| 18 | VSS | power_in | Digital ground for core logic and I/O circuits |
| 19 | VDD | power_in | Main digital power supply 1.65 to 3.6V for core and I/O |
| 20 | PA4 | bidirectional | GPIO standard CMOS; ADC_IN4, DAC_OUT1, COMP1_INM, COMP2_INM; SPI1_NSS, USART2_CK |
| 21 | PA5 | bidirectional | GPIO standard CMOS; ADC_IN5, DAC_OUT2, COMP1_INM, COMP2_INM; SPI1_SCK, TIM2_ETR |
| 22 | PA6 | bidirectional | GPIO 5V tolerant; ADC_IN6; SPI1_MISO, TIM3_CH1, LPUART1_CTS, COMP1_OUT |
| 23 | PA7 | bidirectional | GPIO 5V tolerant; ADC_IN7; SPI1_MOSI, TIM3_CH2, COMP2_OUT |
| 24 | PC4 | bidirectional | GPIO 5V tolerant; ADC_IN14; LCD_SEG22, LPUART1_TX |
| 25 | PC5 | bidirectional | GPIO 5V tolerant; ADC_IN15; LCD_SEG23, LPUART1_RX, TSC_G3_IO1 |
| 26 | PB0 | bidirectional | GPIO 5V tolerant; ADC_IN8, VREF_OUT, LCD_VLCD3; TIM3_CH3, TSC_G3_IO2 |
| 27 | PB1 | bidirectional | GPIO 5V tolerant; ADC_IN9, VREF_OUT; TIM3_CH4, TSC_G3_IO3, LPUART1_RTS/DE |
| 28 | PB2 | bidirectional | GPIO 5V tolerant; LCD_VLCD2; LPTIM1_OUT, TSC_G3_IO4, I2C3_SMBA |
| 29 | PB10 | bidirectional | GPIO 5V tolerant; LCD_SEG10, I2C2_SCL; TIM2_CH3, LPUART1_TX, SPI2_SCK |
| 30 | PB11 | bidirectional | GPIO 5V tolerant; LCD_SEG11, I2C2_SDA; TIM2_CH4, TSC_G6_IO1, LPUART1_RX |
| 31 | VSS | power_in | Digital ground for core logic and I/O circuits |
| 32 | VDD | power_in | Main digital power supply 1.65 to 3.6V for core and I/O |
| 33 | PB12 | bidirectional | GPIO 5V tolerant; LCD_VLCD1, LCD_SEG12; SPI2_NSS/I2S2_WS, LPUART1_RTS/DE, I2C2_SMBA |
| 34 | PB13 | bidirectional | GPIO 5V tolerant FM+ capable; LCD_SEG13, I2C2_SCL; SPI2_SCK/I2S2_CK, MCO, TIM21_CH1 |
| 35 | PB14 | bidirectional | GPIO 5V tolerant FM+ capable; LCD_SEG14, I2C2_SDA; SPI2_MISO/I2S2_MCK, RTC_OUT, TIM21_CH2 |
| 36 | PB15 | bidirectional | GPIO 5V tolerant; LCD_SEG15; SPI2_MOSI/I2S2_SD, RTC_REFIN |
| 37 | PC6 | bidirectional | GPIO 5V tolerant; LCD_SEG24; TIM22_CH1, TIM3_CH1, TSC_G8_IO1 |
| 38 | PC7 | bidirectional | GPIO 5V tolerant; LCD_SEG25; TIM22_CH2, TIM3_CH2, TSC_G8_IO2 |
| 39 | PC8 | bidirectional | GPIO 5V tolerant; LCD_SEG26; TIM22_ETR, TIM3_CH3, TSC_G8_IO3 |
| 40 | PC9 | bidirectional | GPIO 5V tolerant FM+ capable; LCD_SEG27, I2C3_SDA; TIM21_ETR, USB_NOE/TIM3_CH4, TSC_G8_IO4 |
| 41 | PA8 | bidirectional | GPIO 5V tolerant FM+ capable; LCD_COM0, I2C3_SCL; MCO, USB_CRS_SYNC, USART1_CK |
| 42 | PA9 | bidirectional | GPIO 5V tolerant FM+ capable; LCD_COM1, I2C1_SCL, I2C3_SMBA; MCO, TSC_G4_IO1, USART1_TX |
| 43 | PA10 | bidirectional | GPIO 5V tolerant FM+ capable; LCD_COM2, I2C1_SDA; TSC_G4_IO2, USART1_RX |
| 44 | PA11 | bidirectional | GPIO 5V tolerant; USB_DM; SPI1_MISO, TSC_G4_IO3, USART1_CTS, COMP1_OUT |
| 45 | PA12 | bidirectional | GPIO 5V tolerant; USB_DP; SPI1_MOSI, TSC_G4_IO4, USART1_RTS/DE, COMP2_OUT |
| 46 | PA13 | bidirectional | GPIO 5V tolerant; SWDIO, USB_NOE; LPUART1_RX; debug/programming interface |
| 47 | VSS | power_in | Digital ground for core logic and I/O circuits |
| 48 | VDD_USB | power_in | USB transceiver power supply 3.0 to 3.6V; can be connected to VDD or separate supply |
| 49 | PA14 | bidirectional | GPIO 5V tolerant; SWCLK, LPUART1_TX; USART2_TX; debug/programming interface |
| 50 | PA15 | bidirectional | GPIO 5V tolerant; LCD_SEG17, TIM2_ETR; SPI1_NSS, USART2_RX, TIM2_CH1, USART4_RTS/DE |
| 51 | PC10 | bidirectional | GPIO 5V tolerant; LCD_COM4/LCD_SEG28/LCD_SEG48; LPUART1_TX, USART4_TX |
| 52 | PC11 | bidirectional | GPIO 5V tolerant; LCD_COM5/LCD_SEG29/LCD_SEG49; LPUART1_RX, USART4_RX |
| 53 | PC12 | bidirectional | GPIO 5V tolerant; LCD_COM6/LCD_SEG30/LCD_SEG50; USART5_TX, USART4_CK |
| 54 | PD2 | bidirectional | GPIO 5V tolerant; LCD_COM7/LCD_SEG31/LCD_SEG51; LPUART1_RTS/DE, TIM3_ETR, USART5_RX |
| 55 | PB3 | bidirectional | GPIO 5V tolerant; COMP2_INM; SPI1_SCK, LCD_SEG7, TIM2_CH2, TSC_G5_IO1, USART1_RTS/DE, USART5_TX |
| 56 | PB4 | bidirectional | GPIO 5V tolerant FM+ capable; COMP2_INP; SPI1_MISO, LCD_SEG8, TIM3_CH1, TSC_G5_IO2, TIM22_CH1, USART1_CTS, USART5_RX, I2C3_SDA |
| 57 | PB5 | bidirectional | GPIO 5V tolerant; COMP2_INP; SPI1_MOSI, LCD_SEG9, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK, USART5_RTS/DE |
| 58 | PB6 | bidirectional | GPIO 5V tolerant FM+ capable; COMP2_INP; USART1_TX, I2C1_SCL, LPTIM1_ETR, TSC_G5_IO3 |
| 59 | PB7 | bidirectional | GPIO 5V tolerant FM+ capable; COMP2_INP, PVD_IN; USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4, USART4_CTS |
| 60 | BOOT0 | input | Boot configuration input pin for selecting boot source (Flash, System memory, or embedded RAM) |
| 61 | PB8 | bidirectional | GPIO 5V tolerant FM+ capable; LCD_SEG16; I2C1_SCL, TSC_SYNC |
| 62 | PB9 | bidirectional | GPIO 5V tolerant FM+ capable; LCD_COM3; I2C1_SDA, SPI2_NSS/I2S2_WS |
| 63 | VSS | power_in | Digital ground for core logic and I/O circuits |
| 64 | VDD | power_in | Main digital power supply 1.65 to 3.6V for core and I/O |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L073RBT6 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32l073rbt6-etched.step/stm32l073rbt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l073rbt6.step/stm32l073rbt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (149 pp, sha256
0de78f6f5282a2f1, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).