component
STM32L072RBI6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-64. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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STM32L072RBI6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFBGA-64
STM32L072RBI6 from STMicroelectronics, in a UFBGA-64. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | PC14-OSC32_IN | bidirectional | FT (5 V tolerant) GPIO PC14, also the OSC32_IN input of the 32 kHz oscillator. |
| A2 | PC13 | bidirectional | FT (5 V tolerant) GPIO PC13 with RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2 additional functions. |
| A3 | PB9 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS alternate functions. |
| A4 | PB4 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with SPI1_MISO, TIM3_CH1, TSC_G5_IO2, TIM22_CH1, USART1_CTS, USART5_RX and I2C3_SDA alternate functions, plus COMP2_INP. |
| A5 | PB3 | bidirectional | FT (5 V tolerant) GPIO with SPI1_SCK, TIM2_CH2, TSC_G5_IO1, EVENTOUT, USART1_RTS/USART1_DE and USART5_TX alternate functions, plus COMP2_INM. |
| A6 | PA15 | bidirectional | FT (5 V tolerant) GPIO with SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1 and USART4_RTS/USART4_DE alternate functions. |
| A7 | PA14 | bidirectional | FT (5 V tolerant) GPIO with SWCLK (serial wire clock), USART2_TX and LPUART1_TX alternate functions. |
| A8 | PA13 | bidirectional | FT (5 V tolerant) GPIO with SWDIO (serial wire data), USB_NOE and LPUART1_RX alternate functions. |
| B1 | PC15-OSC32_OUT | bidirectional | TC (standard 3.3 V) GPIO PC15, also the OSC32_OUT output of the 32 kHz oscillator. |
| B2 | VDD | power_in | Main digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply range. |
| B3 | PB8 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with TSC_SYNC and I2C1_SCL alternate functions. |
| B4 | BOOT0 | input | Dedicated BOOT0 boot-mode selection input pin. |
| B5 | PD2 | bidirectional | FT (5 V tolerant) GPIO with LPUART1_RTS/LPUART1_DE, TIM3_ETR and USART5_RX alternate functions. |
| B6 | PC11 | bidirectional | FT (5 V tolerant) GPIO with LPUART1_RX and USART4_RX alternate functions. |
| B7 | PC10 | bidirectional | FT (5 V tolerant) GPIO with LPUART1_TX and USART4_TX alternate functions. |
| B8 | PA12 | bidirectional | FT (5 V tolerant) GPIO powered by VDD_USB, with SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT alternate functions and USB_DP. |
| C1 | PH0-OSC_IN | bidirectional | TC (standard 3.3 V) GPIO PH0, also the OSC_IN input of the 1 to 25 MHz crystal oscillator and USB_CRS_SYNC alternate function. |
| C2 | VSS | power_in | Ground pin of the device. |
| C3 | PB7 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4 and USART4_CTS alternate functions, plus COMP2_INP and VREF_PVD_IN. |
| C4 | PB5 | bidirectional | FT (5 V tolerant) GPIO with SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK and USART5_RTS/USART5_DE alternate functions, plus COMP2_INP. |
| C5 | PC12 | bidirectional | FT (5 V tolerant) GPIO with USART5_TX and USART4_CK alternate functions. |
| C6 | PA10 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with TSC_G4_IO2, USART1_RX and I2C1_SDA alternate functions. |
| C7 | PA9 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with MCO, TSC_G4_IO1, USART1_TX, I2C1_SCL and I2C3_SMBA alternate functions. |
| C8 | PA11 | bidirectional | FT (5 V tolerant) GPIO powered by VDD_USB, with SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT alternate functions and USB_DM. |
| D1 | PH1-OSC_OUT | bidirectional | TC (standard 3.3 V) GPIO PH1, also the OSC_OUT output of the crystal oscillator. |
| D2 | VDD | power_in | Main digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply range. |
| D3 | PB6 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3 alternate functions, plus COMP2_INP. |
| D4 | VSS | power_in | Ground pin of the device. |
| D5 | VSS | power_in | Ground pin of the device. |
| D6 | VSS | power_in | Ground pin of the device. |
| D7 | PA8 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with MCO, USB_CRS_SYNC, EVENTOUT, USART1_CK and I2C3_SCL alternate functions. |
| D8 | PC9 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with TIM21_ETR, USB_NOE/TIM3_CH4, TSC_G8_IO4 and I2C3_SDA alternate functions. |
| E1 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| E2 | PC1 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with LPTIM1_OUT, EVENTOUT, TSC_G7_IO2, LPUART1_TX and I2C3_SDA alternate functions, plus ADC_IN11. |
| E3 | PC0 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with LPTIM1_IN1, EVENTOUT, TSC_G7_IO1, LPUART1_RX and I2C3_SCL alternate functions, plus ADC_IN10. |
| E4 | VDD | power_in | Main digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply range. |
| E5 | VDD | power_in | Main digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply range. |
| E6 | VDD_USB | power_in | Supply pin for the USB-related I/Os PA11 and PA12; for characteristics that refer to VDD, VDD_USB must be used instead. |
| E7 | PC7 | bidirectional | FT (5 V tolerant) GPIO with TIM22_CH2, TIM3_CH2 and TSC_G8_IO2 alternate functions. |
| E8 | PC8 | bidirectional | FT (5 V tolerant) GPIO with TIM22_ETR, TIM3_CH3 and TSC_G8_IO3 alternate functions. |
| F1 | VSSA | power_in | Analog ground pin. |
| F2 | PC2 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with LPTIM1_IN2, SPI2_MISO/I2S2_MCK and TSC_G7_IO3 alternate functions, plus ADC_IN12. |
| F3 | PA2 | bidirectional | FT (5 V tolerant) GPIO with TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX, LPUART1_TX and COMP2_OUT alternate functions, plus COMP2_INM and ADC_IN2. |
| F4 | PA5 | bidirectional | TC (standard 3.3 V) GPIO with SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1 alternate functions, plus COMP1_INM, COMP2_INM, ADC_IN5 and DAC_OUT2. |
| F5 | PB0 | bidirectional | FT (5 V tolerant) GPIO with EVENTOUT, TIM3_CH3 and TSC_G3_IO2 alternate functions, plus ADC_IN8 and VREF_OUT. |
| F6 | PC6 | bidirectional | FT (5 V tolerant) GPIO with TIM22_CH1, TIM3_CH1 and TSC_G8_IO1 alternate functions. |
| F7 | PB15 | bidirectional | FT (5 V tolerant) GPIO with SPI2_MOSI/I2S2_SD and RTC_REFIN alternate functions. |
| F8 | PB14 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with SPI2_MISO/I2S2_MCK, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2 alternate functions. |
| G1 | VREF+ | power_in | Positive reference voltage input for the ADC (listed as a supply pin only in the pin table; no limits given in the extract); this pin is only present on the UFBGA64/TFBGA64 ballout. |
| G2 | PA0 | bidirectional | TT I/O structure GPIO with TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, USART4_TX and COMP1_OUT alternate functions, plus COMP1_INM, ADC_IN0 and RTC_TAMP2/WKUP1. |
| G3 | PA3 | bidirectional | FT (5 V tolerant) GPIO with TIM21_CH2, TIM2_CH4, TSC_G1_IO4, USART2_RX and LPUART1_RX alternate functions, plus COMP2_INP and ADC_IN3. |
| G4 | PA6 | bidirectional | FT (5 V tolerant) GPIO with SPI1_MISO, TIM3_CH1, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT alternate functions, plus ADC_IN6. |
| G5 | PB1 | bidirectional | FT (5 V tolerant) GPIO with TIM3_CH4, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE alternate functions, plus ADC_IN9 and VREF_OUT. |
| G6 | PB2 | bidirectional | FT (5 V tolerant) GPIO with LPTIM1_OUT, TSC_G3_IO4 and I2C3_SMBA alternate functions. |
| G7 | PB10 | bidirectional | FT (5 V tolerant) GPIO with TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK, I2C2_SCL and LPUART1_RX alternate functions. |
| G8 | PB13 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with SPI2_SCK/I2S2_CK, MCO, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1 alternate functions. |
| H1 | VDDA | power_in | Analog supply pin (listed as type S in the pin table; no further limits given in the extract). |
| H2 | PA1 | bidirectional | FT (5 V tolerant) GPIO with EVENTOUT, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR and USART4_RX alternate functions, plus COMP1_INP and ADC_IN1. |
| H3 | PA4 | bidirectional | TC (standard 3.3 V) GPIO with SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR alternate functions, plus COMP1_INM, COMP2_INM, ADC_IN4 and DAC_OUT1; it offers reduced touch sensing sensitivity and is recommended as sampling capacitor I/O. |
| H4 | PA7 | bidirectional | FT (5 V tolerant) GPIO with SPI1_MOSI, TIM3_CH2, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT alternate functions, plus ADC_IN7. |
| H5 | PC4 | bidirectional | FT (5 V tolerant) GPIO with EVENTOUT and LPUART1_TX alternate functions, plus ADC_IN14. |
| H6 | PC5 | bidirectional | FT (5 V tolerant) GPIO with LPUART1_RX and TSC_G3_IO1 alternate functions, plus ADC_IN15. |
| H7 | PB11 | bidirectional | FT (5 V tolerant) GPIO with EVENTOUT, TIM2_CH4, TSC_G6_IO1, LPUART1_RX, I2C2_SDA and LPUART1_TX alternate functions. |
| H8 | PB12 | bidirectional | FT (5 V tolerant) GPIO with SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT alternate functions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFBGA-64 |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L072RBI6 - Footprint:
Package_BGA:UFBGA-64_5x5mm_Layout8x8_P0.5mm - 3D model: UFBGA-64 (KiCad packages3D, STEP)
- 3D model files:
stm32l072rbi6-etched.step/stm32l072rbi6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l072rbi6.step/stm32l072rbi6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (160 pp, sha256
13ea53054244ac9d, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM32L072RBI6
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFBGA-64
STM32L072RBI6 from STMicroelectronics, in a UFBGA-64. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | PC14-OSC32_IN | bidirectional | FT (5 V tolerant) GPIO PC14, also the OSC32_IN input of the 32 kHz oscillator. |
| A2 | PC13 | bidirectional | FT (5 V tolerant) GPIO PC13 with RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2 additional functions. |
| A3 | PB9 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS alternate functions. |
| A4 | PB4 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with SPI1_MISO, TIM3_CH1, TSC_G5_IO2, TIM22_CH1, USART1_CTS, USART5_RX and I2C3_SDA alternate functions, plus COMP2_INP. |
| A5 | PB3 | bidirectional | FT (5 V tolerant) GPIO with SPI1_SCK, TIM2_CH2, TSC_G5_IO1, EVENTOUT, USART1_RTS/USART1_DE and USART5_TX alternate functions, plus COMP2_INM. |
| A6 | PA15 | bidirectional | FT (5 V tolerant) GPIO with SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1 and USART4_RTS/USART4_DE alternate functions. |
| A7 | PA14 | bidirectional | FT (5 V tolerant) GPIO with SWCLK (serial wire clock), USART2_TX and LPUART1_TX alternate functions. |
| A8 | PA13 | bidirectional | FT (5 V tolerant) GPIO with SWDIO (serial wire data), USB_NOE and LPUART1_RX alternate functions. |
| B1 | PC15-OSC32_OUT | bidirectional | TC (standard 3.3 V) GPIO PC15, also the OSC32_OUT output of the 32 kHz oscillator. |
| B2 | VDD | power_in | Main digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply range. |
| B3 | PB8 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with TSC_SYNC and I2C1_SCL alternate functions. |
| B4 | BOOT0 | input | Dedicated BOOT0 boot-mode selection input pin. |
| B5 | PD2 | bidirectional | FT (5 V tolerant) GPIO with LPUART1_RTS/LPUART1_DE, TIM3_ETR and USART5_RX alternate functions. |
| B6 | PC11 | bidirectional | FT (5 V tolerant) GPIO with LPUART1_RX and USART4_RX alternate functions. |
| B7 | PC10 | bidirectional | FT (5 V tolerant) GPIO with LPUART1_TX and USART4_TX alternate functions. |
| B8 | PA12 | bidirectional | FT (5 V tolerant) GPIO powered by VDD_USB, with SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT alternate functions and USB_DP. |
| C1 | PH0-OSC_IN | bidirectional | TC (standard 3.3 V) GPIO PH0, also the OSC_IN input of the 1 to 25 MHz crystal oscillator and USB_CRS_SYNC alternate function. |
| C2 | VSS | power_in | Ground pin of the device. |
| C3 | PB7 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4 and USART4_CTS alternate functions, plus COMP2_INP and VREF_PVD_IN. |
| C4 | PB5 | bidirectional | FT (5 V tolerant) GPIO with SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK and USART5_RTS/USART5_DE alternate functions, plus COMP2_INP. |
| C5 | PC12 | bidirectional | FT (5 V tolerant) GPIO with USART5_TX and USART4_CK alternate functions. |
| C6 | PA10 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with TSC_G4_IO2, USART1_RX and I2C1_SDA alternate functions. |
| C7 | PA9 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with MCO, TSC_G4_IO1, USART1_TX, I2C1_SCL and I2C3_SMBA alternate functions. |
| C8 | PA11 | bidirectional | FT (5 V tolerant) GPIO powered by VDD_USB, with SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT alternate functions and USB_DM. |
| D1 | PH1-OSC_OUT | bidirectional | TC (standard 3.3 V) GPIO PH1, also the OSC_OUT output of the crystal oscillator. |
| D2 | VDD | power_in | Main digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply range. |
| D3 | PB6 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3 alternate functions, plus COMP2_INP. |
| D4 | VSS | power_in | Ground pin of the device. |
| D5 | VSS | power_in | Ground pin of the device. |
| D6 | VSS | power_in | Ground pin of the device. |
| D7 | PA8 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with MCO, USB_CRS_SYNC, EVENTOUT, USART1_CK and I2C3_SCL alternate functions. |
| D8 | PC9 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with TIM21_ETR, USB_NOE/TIM3_CH4, TSC_G8_IO4 and I2C3_SDA alternate functions. |
| E1 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| E2 | PC1 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with LPTIM1_OUT, EVENTOUT, TSC_G7_IO2, LPUART1_TX and I2C3_SDA alternate functions, plus ADC_IN11. |
| E3 | PC0 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with LPTIM1_IN1, EVENTOUT, TSC_G7_IO1, LPUART1_RX and I2C3_SCL alternate functions, plus ADC_IN10. |
| E4 | VDD | power_in | Main digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply range. |
| E5 | VDD | power_in | Main digital supply pin; the datasheet specifies a 1.65 V to 3.6 V power supply range. |
| E6 | VDD_USB | power_in | Supply pin for the USB-related I/Os PA11 and PA12; for characteristics that refer to VDD, VDD_USB must be used instead. |
| E7 | PC7 | bidirectional | FT (5 V tolerant) GPIO with TIM22_CH2, TIM3_CH2 and TSC_G8_IO2 alternate functions. |
| E8 | PC8 | bidirectional | FT (5 V tolerant) GPIO with TIM22_ETR, TIM3_CH3 and TSC_G8_IO3 alternate functions. |
| F1 | VSSA | power_in | Analog ground pin. |
| F2 | PC2 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with LPTIM1_IN2, SPI2_MISO/I2S2_MCK and TSC_G7_IO3 alternate functions, plus ADC_IN12. |
| F3 | PA2 | bidirectional | FT (5 V tolerant) GPIO with TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX, LPUART1_TX and COMP2_OUT alternate functions, plus COMP2_INM and ADC_IN2. |
| F4 | PA5 | bidirectional | TC (standard 3.3 V) GPIO with SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1 alternate functions, plus COMP1_INM, COMP2_INM, ADC_IN5 and DAC_OUT2. |
| F5 | PB0 | bidirectional | FT (5 V tolerant) GPIO with EVENTOUT, TIM3_CH3 and TSC_G3_IO2 alternate functions, plus ADC_IN8 and VREF_OUT. |
| F6 | PC6 | bidirectional | FT (5 V tolerant) GPIO with TIM22_CH1, TIM3_CH1 and TSC_G8_IO1 alternate functions. |
| F7 | PB15 | bidirectional | FT (5 V tolerant) GPIO with SPI2_MOSI/I2S2_SD and RTC_REFIN alternate functions. |
| F8 | PB14 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with SPI2_MISO/I2S2_MCK, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2 alternate functions. |
| G1 | VREF+ | power_in | Positive reference voltage input for the ADC (listed as a supply pin only in the pin table; no limits given in the extract); this pin is only present on the UFBGA64/TFBGA64 ballout. |
| G2 | PA0 | bidirectional | TT I/O structure GPIO with TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, USART4_TX and COMP1_OUT alternate functions, plus COMP1_INM, ADC_IN0 and RTC_TAMP2/WKUP1. |
| G3 | PA3 | bidirectional | FT (5 V tolerant) GPIO with TIM21_CH2, TIM2_CH4, TSC_G1_IO4, USART2_RX and LPUART1_RX alternate functions, plus COMP2_INP and ADC_IN3. |
| G4 | PA6 | bidirectional | FT (5 V tolerant) GPIO with SPI1_MISO, TIM3_CH1, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT alternate functions, plus ADC_IN6. |
| G5 | PB1 | bidirectional | FT (5 V tolerant) GPIO with TIM3_CH4, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE alternate functions, plus ADC_IN9 and VREF_OUT. |
| G6 | PB2 | bidirectional | FT (5 V tolerant) GPIO with LPTIM1_OUT, TSC_G3_IO4 and I2C3_SMBA alternate functions. |
| G7 | PB10 | bidirectional | FT (5 V tolerant) GPIO with TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK, I2C2_SCL and LPUART1_RX alternate functions. |
| G8 | PB13 | bidirectional | FTf (5 V tolerant, Fast Mode Plus capable) GPIO with SPI2_SCK/I2S2_CK, MCO, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1 alternate functions. |
| H1 | VDDA | power_in | Analog supply pin (listed as type S in the pin table; no further limits given in the extract). |
| H2 | PA1 | bidirectional | FT (5 V tolerant) GPIO with EVENTOUT, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR and USART4_RX alternate functions, plus COMP1_INP and ADC_IN1. |
| H3 | PA4 | bidirectional | TC (standard 3.3 V) GPIO with SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR alternate functions, plus COMP1_INM, COMP2_INM, ADC_IN4 and DAC_OUT1; it offers reduced touch sensing sensitivity and is recommended as sampling capacitor I/O. |
| H4 | PA7 | bidirectional | FT (5 V tolerant) GPIO with SPI1_MOSI, TIM3_CH2, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT alternate functions, plus ADC_IN7. |
| H5 | PC4 | bidirectional | FT (5 V tolerant) GPIO with EVENTOUT and LPUART1_TX alternate functions, plus ADC_IN14. |
| H6 | PC5 | bidirectional | FT (5 V tolerant) GPIO with LPUART1_RX and TSC_G3_IO1 alternate functions, plus ADC_IN15. |
| H7 | PB11 | bidirectional | FT (5 V tolerant) GPIO with EVENTOUT, TIM2_CH4, TSC_G6_IO1, LPUART1_RX, I2C2_SDA and LPUART1_TX alternate functions. |
| H8 | PB12 | bidirectional | FT (5 V tolerant) GPIO with SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT alternate functions. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFBGA-64 |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
## CAD (KiCad official)
- Symbol: `STM32L072RBI6`
- Footprint: `Package_BGA:UFBGA-64_5x5mm_Layout8x8_P0.5mm`
- 3D model: UFBGA-64 (KiCad packages3D, STEP)
- 3D model files: `stm32l072rbi6-etched.step` / `stm32l072rbi6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l072rbi6.step` / `stm32l072rbi6.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588952154685628416) (160 pp, sha256 `13ea53054244ac9d`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm32l072rbi6-datasheet.pdf)