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Contents

README

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STM32L072KBU7

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)

STM32L072KBU7 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC14-OSC32_IN bidirectional 5 V tolerant (FT) I/O, also the 32.768 kHz LSE oscillator input OSC32_IN.
2 PC15-OSC32_OUT bidirectional Standard 3.3 V (TC) I/O, also the 32.768 kHz LSE oscillator output OSC32_OUT.
3 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
4 VSSA power_in Analog ground pin of the device.
5 VDDA power_in Analog supply pin of the device, used with VREF+ for the ADC and DAC references.
6 PA0 bidirectional I/O (TT structure) with alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, USART4_TX and COMP1_OUT, and additional functions ADC_IN0, COMP1_INM and RTC_TAMP2/WKUP1.
7 PA1 bidirectional 5 V tolerant (FT) I/O with alternate functions EVENTOUT, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR and USART4_RX, and additional functions COMP1_INP and ADC_IN1.
8 PA2 bidirectional 5 V tolerant (FT) I/O with alternate functions TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX, LPUART1_TX and COMP2_OUT, and additional functions COMP2_INM and ADC_IN2.
9 PA3 bidirectional 5 V tolerant (FT) I/O with alternate functions TIM21_CH2, TIM2_CH4, TSC_G1_IO4, USART2_RX and LPUART1_RX, and additional functions COMP2_INP and ADC_IN3.
10 PA4 bidirectional Standard 3.3 V (TC) I/O with alternate functions SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR, and additional functions COMP1_INM, COMP2_INM, ADC_IN4 and DAC_OUT1; it has reduced touch sensing sensitivity and is recommended as a sampling capacitor I/O.
11 PA5 bidirectional Standard 3.3 V (TC) I/O with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1, and additional functions COMP1_INM, COMP2_INM, ADC_IN5 and DAC_OUT2.
12 PA6 bidirectional 5 V tolerant (FT) I/O with alternate functions SPI1_MISO, TIM3_CH1, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and additional function ADC_IN6.
13 PA7 bidirectional 5 V tolerant (FT) I/O with alternate functions SPI1_MOSI, TIM3_CH2, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT, and additional function ADC_IN7.
14 PB0 bidirectional 5 V tolerant (FT) I/O with alternate functions EVENTOUT, TIM3_CH3 and TSC_G3_IO2, and additional functions ADC_IN8 and VREF_OUT.
15 PB1 bidirectional 5 V tolerant (FT) I/O with alternate functions TIM3_CH4, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE, and additional functions ADC_IN9 and VREF_OUT.
16 VSS power_in Ground pin of the device.
17 VDD power_in Main supply pin; the device operates from 1.65 V to 3.6 V.
18 PA8 bidirectional 5 V tolerant, Fast Mode Plus capable (FTf) I/O with alternate functions MCO, USB_CRS_SYNC, EVENTOUT, USART1_CK and I2C3_SCL.
19 PA9 bidirectional 5 V tolerant, Fast Mode Plus capable (FTf) I/O with alternate functions MCO, TSC_G4_IO1, USART1_TX, I2C1_SCL and I2C3_SMBA.
20 PA10 bidirectional 5 V tolerant, Fast Mode Plus capable (FTf) I/O with alternate functions TSC_G4_IO2, USART1_RX and I2C1_SDA.
21 PA11 bidirectional 5 V tolerant (FT) I/O powered by VDD_USB, with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, and additional function USB_DM.
22 PA12 bidirectional 5 V tolerant (FT) I/O powered by VDD_USB, with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT, and additional function USB_DP.
23 PA13 bidirectional 5 V tolerant (FT) I/O with alternate functions SWDIO, USB_NOE and LPUART1_RX.
24 VDD_USB power_in Supply pin for the USB I/Os (PA11, PA12); for characteristics that refer to VDD, VDD_USB must be used for these pins.
25 PA14 bidirectional 5 V tolerant (FT) I/O with alternate functions SWCLK, USART2_TX and LPUART1_TX.
26 PB4 bidirectional 5 V tolerant, Fast Mode Plus capable (FTf) I/O with alternate functions SPI1_MISO, TIM3_CH1, TSC_G5_IO2, TIM22_CH1, USART1_CTS, USART5_RX and I2C3_SDA, and additional function COMP2_INP.
27 PB5 bidirectional 5 V tolerant (FT) I/O with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK and USART5_RTS/USART5_DE, and additional function COMP2_INP.
28 PB6 bidirectional 5 V tolerant, Fast Mode Plus capable (FTf) I/O with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP.
29 PB7 bidirectional 5 V tolerant, Fast Mode Plus capable (FTf) I/O with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4 and USART4_CTS, and additional functions COMP2_INP and VREF_PVD_IN.
30 BOOT0 input Dedicated BOOT0 input pin (input only, type B in Table 15).
31 VSS power_in Ground pin of the device.
32 VDD power_in Main supply pin; the device operates from 1.65 V to 3.6 V.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-32(5x5)
Category Embedded Processors & Controllers
Pins 33

CAD (KiCad official)

  • Symbol: STM32L072KBU7
  • Footprint: Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm
  • 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: stm32l072kbu7-etched.step / stm32l072kbu7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l072kbu7.step / stm32l072kbu7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (160 pp, sha256 13ea53054244ac9d, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF