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STM32L072CZT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+84@@ -0,0 +1,84 @@+# STM32L072CZT6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)++STM32L072CZT6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Main MCU supply pin; the device operates from a 1.65 V to 3.6 V power supply. |+| 2 | PC13 | bidirectional | 5 V tolerant general-purpose I/O (FT structure) with no alternate or additional function listed in Table 16. |+| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant I/O (FT structure) that is also the 32 kHz oscillator input OSC32_IN. |+| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V I/O (TC structure) that is also the 32 kHz oscillator output OSC32_OUT. |+| 5 | PH0-OSC_IN | bidirectional | Standard 3.3 V I/O (TC structure) that is also the high-speed oscillator input OSC_IN, with alternate function USB_CRS_SYNC. |+| 6 | PH1-OSC_OUT | bidirectional | Standard 3.3 V I/O (TC structure) that is also the high-speed oscillator output OSC_OUT. |+| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |+| 8 | VSSA | power_in | Analog ground pin for the analog peripherals of the device. |+| 9 | VDDA | power_in | Analog supply pin for the analog peripherals, including the ADC, DAC and comparators. |+| 10 | PA0 | bidirectional | I/O with TT structure (see review_required) with alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, USART4_TX and COMP1_OUT, and additional functions COMP1_INM, ADC_IN0 and RTC_TAMP2/WKUP1. |+| 11 | PA1 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions EVENTOUT, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR and USART4_RX, and additional functions COMP1_INP and ADC_IN1. |+| 12 | PA2 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX, LPUART1_TX and COMP2_OUT, and additional functions COMP2_INM and ADC_IN2. |+| 13 | PA3 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions TIM21_CH2, TIM2_CH4, TSC_G1_IO4, USART2_RX and LPUART1_RX, and additional functions COMP2_INP and ADC_IN3. |+| 14 | PA4 | bidirectional | Standard 3.3 V I/O (TC structure) with reduced touch sensing sensitivity, recommended for use as a sampling capacitor I/O, with alternate functions SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR, and additional functions COMP1_INM, COMP2_INM, ADC_IN4 and DAC_OUT1. |+| 15 | PA5 | bidirectional | Standard 3.3 V I/O (TC structure) with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1, and additional functions COMP1_INM, COMP2_INM, ADC_IN5 and DAC_OUT2. |+| 16 | PA6 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_MISO, TIM3_CH1, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and additional function ADC_IN6. |+| 17 | PA7 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_MOSI, TIM3_CH2, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT, and additional function ADC_IN7. |+| 18 | PB0 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions EVENTOUT, TIM3_CH3 and TSC_G3_IO2, and additional functions ADC_IN8 and VREF_OUT. |+| 19 | PB1 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions TIM3_CH4, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE, and additional functions ADC_IN9 and VREF_OUT. |+| 20 | PB2 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions LPTIM1_OUT, TSC_G3_IO4 and I2C3_SMBA. |+| 21 | PB10 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK, I2C2_SCL and LPUART1_RX. |+| 22 | PB11 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions EVENTOUT, TIM2_CH4, TSC_G6_IO1, LPUART1_RX, I2C2_SDA and LPUART1_TX. |+| 23 | VSS | power_in | Ground pin of the device. |+| 24 | VDD | power_in | Main MCU supply pin; the device operates from a 1.65 V to 3.6 V power supply. |+| 25 | PB12 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT. |+| 26 | PB13 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions SPI2_SCK/I2S2_CK, MCO, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1. |+| 27 | PB14 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions SPI2_MISO/I2S2_MCK, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2. |+| 28 | PB15 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI2_MOSI/I2S2_SD and RTC_REFIN. |+| 29 | PA8 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions MCO, USB_CRS_SYNC, EVENTOUT, USART1_CK and I2C3_SCL. |+| 30 | PA9 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions MCO, TSC_G4_IO1, USART1_TX, I2C1_SCL and I2C3_SMBA. |+| 31 | PA10 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions TSC_G4_IO2, USART1_RX and I2C1_SDA. |+| 32 | PA11 | bidirectional | 5 V tolerant I/O (FT structure) powered by VDD_USB, with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, and additional function USB_DM. |+| 33 | PA12 | bidirectional | 5 V tolerant I/O (FT structure) powered by VDD_USB, with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT, and additional function USB_DP. |+| 34 | PA13 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SWDIO, USB_NOE and LPUART1_RX. |+| 35 | VSS | power_in | Ground pin of the device. |+| 36 | VDD_USB | power_in | Supply pin for the USB-related I/Os PA11 and PA12; for characteristics referenced to VDD, VDD_USB must be used instead. |+| 37 | PA14 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SWCLK, USART2_TX and LPUART1_TX. |+| 38 | PA15 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1 and USART4_RTS/USART4_DE. |+| 39 | PB3 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_SCK, TIM2_CH2, TSC_G5_IO1, EVENTOUT, USART1_RTS/USART1_DE and USART5_TX, and additional function COMP2_INM. |+| 40 | PB4 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions SPI1_MISO, TIM3_CH1, TSC_G5_IO2, TIM22_CH1, USART1_CTS, USART5_RX and I2C3_SDA, and additional function COMP2_INP. |+| 41 | PB5 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK and USART5_RTS/USART5_DE, and additional function COMP2_INP. |+| 42 | PB6 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP. |+| 43 | PB7 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4 and USART4_CTS, and additional functions COMP2_INP and VREF_PVD_IN. |+| 44 | BOOT0 | input | Dedicated BOOT0 input pin (B structure) that selects the boot mode. |+| 45 | PB8 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions TSC_SYNC and I2C1_SCL. |+| 46 | PB9 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS. |+| 47 | VSS | power_in | Ground pin of the device. |+| 48 | VDD | power_in | Main MCU supply pin; the device operates from a 1.65 V to 3.6 V power supply. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-48(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 48 |++## CAD (KiCad official)++- Symbol: `STM32L072CZT6`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32l072czt6-etched.step` / `stm32l072czt6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l072czt6.step` / `stm32l072czt6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922318509264896) (160 pp, sha256 `13ea53054244ac9d`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32l072czt6-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32l072czt6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32l072czt6.kicad_sym",+ "stm32l072czt6.kicad_mod",+ "stm32l072czt6.glb",+ "stm32l072czt6.step",+ "stm32l072czt6.lbr",+ "docs/hero.png",+ "docs/stm32l072czt6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32l072czt6-hero.glb",+ "stm32l072czt6-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32L072CZT6",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-48(7x7)",+ "pin_count": 48,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922318509264896",+ "parts": {+ "symbol": "stm32l072czt6.kicad_sym",+ "footprint": "stm32l072czt6.kicad_mod",+ "model_3d": "stm32l072czt6-hero.glb",+ "model_3d_plain": "stm32l072czt6.glb",+ "model_3d_step": "stm32l072czt6-etched.step",+ "model_3d_step_plain": "stm32l072czt6.step",+ "lbr": "stm32l072czt6.lbr"+ },+ "distributor_links": {+ "lcsc": "C1337587",+ "digikey": "497-18580-ND",+ "mouser": "511-STM32L072CZT6"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T02:57:26Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-18580-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32L072CZT6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "Main MCU supply pin; the device operates from a 1.65 V to 3.6 V power supply."+ },+ {+ "number": "2",+ "name": "PC13",+ "type": "bidirectional",+ "description": "5 V tolerant general-purpose I/O (FT structure) with no alternate or additional function listed in Table 16."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) that is also the 32 kHz oscillator input OSC32_IN."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "Standard 3.3 V I/O (TC structure) that is also the 32 kHz oscillator output OSC32_OUT."+ },+ {+ "number": "5",+ "name": "PH0-OSC_IN",+ "type": "bidirectional",+ "description": "Standard 3.3 V I/O (TC structure) that is also the high-speed oscillator input OSC_IN, with alternate function USB_CRS_SYNC."+ },+ {+ "number": "6",+ "name": "PH1-OSC_OUT",+ "type": "bidirectional",+ "description": "Standard 3.3 V I/O (TC structure) that is also the high-speed oscillator output OSC_OUT."+ },+ {+ "number": "7",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with an embedded weak pull-up resistor."+ },+ {+ "number": "8",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground pin for the analog peripherals of the device."+ },+ {+ "number": "9",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply pin for the analog peripherals, including the ADC, DAC and comparators."+ },+ {+ "number": "10",+ "name": "PA0",+ "type": "bidirectional",+ "description": "I/O with TT structure (see review_required) with alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, USART4_TX and COMP1_OUT, and additional functions COMP1_INM, ADC_IN0 and RTC_TAMP2/WKUP1."+ },+ {+ "number": "11",+ "name": "PA1",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions EVENTOUT, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR and USART4_RX, and additional functions COMP1_INP and ADC_IN1."+ },+ {+ "number": "12",+ "name": "PA2",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX, LPUART1_TX and COMP2_OUT, and additional functions COMP2_INM and ADC_IN2."+ },+ {+ "number": "13",+ "name": "PA3",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions TIM21_CH2, TIM2_CH4, TSC_G1_IO4, USART2_RX and LPUART1_RX, and additional functions COMP2_INP and ADC_IN3."+ },+ {+ "number": "14",+ "name": "PA4",+ "type": "bidirectional",+ "description": "Standard 3.3 V I/O (TC structure) with reduced touch sensing sensitivity, recommended for use as a sampling capacitor I/O, with alternate functions SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR, and additional functions COMP1_INM, COMP2_INM, ADC_IN4 and DAC_OUT1."+ },+ {+ "number": "15",+ "name": "PA5",+ "type": "bidirectional",+ "description": "Standard 3.3 V I/O (TC structure) with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1, and additional functions COMP1_INM, COMP2_INM, ADC_IN5 and DAC_OUT2."+ },+ {+ "number": "16",+ "name": "PA6",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions SPI1_MISO, TIM3_CH1, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and additional function ADC_IN6."+ },+ {+ "number": "17",+ "name": "PA7",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions SPI1_MOSI, TIM3_CH2, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT, and additional function ADC_IN7."+ },+ {+ "number": "18",+ "name": "PB0",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions EVENTOUT, TIM3_CH3 and TSC_G3_IO2, and additional functions ADC_IN8 and VREF_OUT."+ },+ {+ "number": "19",+ "name": "PB1",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions TIM3_CH4, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE, and additional functions ADC_IN9 and VREF_OUT."+ },+ {+ "number": "20",+ "name": "PB2",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions LPTIM1_OUT, TSC_G3_IO4 and I2C3_SMBA."+ },+ {+ "number": "21",+ "name": "PB10",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK, I2C2_SCL and LPUART1_RX."+ },+ {+ "number": "22",+ "name": "PB11",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions EVENTOUT, TIM2_CH4, TSC_G6_IO1, LPUART1_RX, I2C2_SDA and LPUART1_TX."+ },+ {+ "number": "23",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin of the device."+ },+ {+ "number": "24",+ "name": "VDD",+ "type": "power_in",+ "description": "Main MCU supply pin; the device operates from a 1.65 V to 3.6 V power supply."+ },+ {+ "number": "25",+ "name": "PB12",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT."+ },+ {+ "number": "26",+ "name": "PB13",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions SPI2_SCK/I2S2_CK, MCO, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1."+ },+ {+ "number": "27",+ "name": "PB14",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions SPI2_MISO/I2S2_MCK, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2."+ },+ {+ "number": "28",+ "name": "PB15",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions SPI2_MOSI/I2S2_SD and RTC_REFIN."+ },+ {+ "number": "29",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions MCO, USB_CRS_SYNC, EVENTOUT, USART1_CK and I2C3_SCL."+ },+ {+ "number": "30",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions MCO, TSC_G4_IO1, USART1_TX, I2C1_SCL and I2C3_SMBA."+ },+ {+ "number": "31",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions TSC_G4_IO2, USART1_RX and I2C1_SDA."+ },+ {+ "number": "32",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) powered by VDD_USB, with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, and additional function USB_DM."+ },+ {+ "number": "33",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) powered by VDD_USB, with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT, and additional function USB_DP."+ },+ {+ "number": "34",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions SWDIO, USB_NOE and LPUART1_RX."+ },+ {+ "number": "35",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin of the device."+ },+ {+ "number": "36",+ "name": "VDD_USB",+ "type": "power_in",+ "description": "Supply pin for the USB-related I/Os PA11 and PA12; for characteristics referenced to VDD, VDD_USB must be used instead."+ },+ {+ "number": "37",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions SWCLK, USART2_TX and LPUART1_TX."+ },+ {+ "number": "38",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1 and USART4_RTS/USART4_DE."+ },+ {+ "number": "39",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions SPI1_SCK, TIM2_CH2, TSC_G5_IO1, EVENTOUT, USART1_RTS/USART1_DE and USART5_TX, and additional function COMP2_INM."+ },+ {+ "number": "40",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions SPI1_MISO, TIM3_CH1, TSC_G5_IO2, TIM22_CH1, USART1_CTS, USART5_RX and I2C3_SDA, and additional function COMP2_INP."+ },+ {+ "number": "41",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT structure) with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK and USART5_RTS/USART5_DE, and additional function COMP2_INP."+ },+ {+ "number": "42",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP."+ },+ {+ "number": "43",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4 and USART4_CTS, and additional functions COMP2_INP and VREF_PVD_IN."+ },+ {+ "number": "44",+ "name": "BOOT0",+ "type": "input",+ "description": "Dedicated BOOT0 input pin (B structure) that selects the boot mode."+ },+ {+ "number": "45",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions TSC_SYNC and I2C1_SCL."+ },+ {+ "number": "46",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS."+ },+ {+ "number": "47",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin of the device."+ },+ {+ "number": "48",+ "name": "VDD",+ "type": "power_in",+ "description": "Main MCU supply pin; the device operates from a 1.65 V to 3.6 V power supply."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: PA0 is listed with I/O structure 'TT' in Table 16, which is not defined in the Table 15 legend. Its "+ ],+ "pages_sent": 80,+ "cost_usd": 0.3377,+ "at": "2026-10-08T02:57:03"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588922318509264896",+ "pages": 160,+ "sha256": "13ea53054244ac9d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 48,+ "described": 48,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32l072czt6.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32l072czt6-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "e29354189d0cda404d49eaa497d2ff376a3a0e54c646a625937541eea1d12a25",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}