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STM32L072CZT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L072CZT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
STM32L072CZT6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Main MCU supply pin; the device operates from a 1.65 V to 3.6 V power supply. |
| 2 | PC13 | bidirectional | 5 V tolerant general-purpose I/O (FT structure) with no alternate or additional function listed in Table 16. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant I/O (FT structure) that is also the 32 kHz oscillator input OSC32_IN. |
| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V I/O (TC structure) that is also the 32 kHz oscillator output OSC32_OUT. |
| 5 | PH0-OSC_IN | bidirectional | Standard 3.3 V I/O (TC structure) that is also the high-speed oscillator input OSC_IN, with alternate function USB_CRS_SYNC. |
| 6 | PH1-OSC_OUT | bidirectional | Standard 3.3 V I/O (TC structure) that is also the high-speed oscillator output OSC_OUT. |
| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |
| 8 | VSSA | power_in | Analog ground pin for the analog peripherals of the device. |
| 9 | VDDA | power_in | Analog supply pin for the analog peripherals, including the ADC, DAC and comparators. |
| 10 | PA0 | bidirectional | I/O with TT structure (see review_required) with alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, USART4_TX and COMP1_OUT, and additional functions COMP1_INM, ADC_IN0 and RTC_TAMP2/WKUP1. |
| 11 | PA1 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions EVENTOUT, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR and USART4_RX, and additional functions COMP1_INP and ADC_IN1. |
| 12 | PA2 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX, LPUART1_TX and COMP2_OUT, and additional functions COMP2_INM and ADC_IN2. |
| 13 | PA3 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions TIM21_CH2, TIM2_CH4, TSC_G1_IO4, USART2_RX and LPUART1_RX, and additional functions COMP2_INP and ADC_IN3. |
| 14 | PA4 | bidirectional | Standard 3.3 V I/O (TC structure) with reduced touch sensing sensitivity, recommended for use as a sampling capacitor I/O, with alternate functions SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR, and additional functions COMP1_INM, COMP2_INM, ADC_IN4 and DAC_OUT1. |
| 15 | PA5 | bidirectional | Standard 3.3 V I/O (TC structure) with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1, and additional functions COMP1_INM, COMP2_INM, ADC_IN5 and DAC_OUT2. |
| 16 | PA6 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_MISO, TIM3_CH1, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and additional function ADC_IN6. |
| 17 | PA7 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_MOSI, TIM3_CH2, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT, and additional function ADC_IN7. |
| 18 | PB0 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions EVENTOUT, TIM3_CH3 and TSC_G3_IO2, and additional functions ADC_IN8 and VREF_OUT. |
| 19 | PB1 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions TIM3_CH4, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE, and additional functions ADC_IN9 and VREF_OUT. |
| 20 | PB2 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions LPTIM1_OUT, TSC_G3_IO4 and I2C3_SMBA. |
| 21 | PB10 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK, I2C2_SCL and LPUART1_RX. |
| 22 | PB11 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions EVENTOUT, TIM2_CH4, TSC_G6_IO1, LPUART1_RX, I2C2_SDA and LPUART1_TX. |
| 23 | VSS | power_in | Ground pin of the device. |
| 24 | VDD | power_in | Main MCU supply pin; the device operates from a 1.65 V to 3.6 V power supply. |
| 25 | PB12 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT. |
| 26 | PB13 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions SPI2_SCK/I2S2_CK, MCO, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1. |
| 27 | PB14 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions SPI2_MISO/I2S2_MCK, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2. |
| 28 | PB15 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI2_MOSI/I2S2_SD and RTC_REFIN. |
| 29 | PA8 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions MCO, USB_CRS_SYNC, EVENTOUT, USART1_CK and I2C3_SCL. |
| 30 | PA9 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions MCO, TSC_G4_IO1, USART1_TX, I2C1_SCL and I2C3_SMBA. |
| 31 | PA10 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions TSC_G4_IO2, USART1_RX and I2C1_SDA. |
| 32 | PA11 | bidirectional | 5 V tolerant I/O (FT structure) powered by VDD_USB, with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, and additional function USB_DM. |
| 33 | PA12 | bidirectional | 5 V tolerant I/O (FT structure) powered by VDD_USB, with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT, and additional function USB_DP. |
| 34 | PA13 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SWDIO, USB_NOE and LPUART1_RX. |
| 35 | VSS | power_in | Ground pin of the device. |
| 36 | VDD_USB | power_in | Supply pin for the USB-related I/Os PA11 and PA12; for characteristics referenced to VDD, VDD_USB must be used instead. |
| 37 | PA14 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SWCLK, USART2_TX and LPUART1_TX. |
| 38 | PA15 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1 and USART4_RTS/USART4_DE. |
| 39 | PB3 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_SCK, TIM2_CH2, TSC_G5_IO1, EVENTOUT, USART1_RTS/USART1_DE and USART5_TX, and additional function COMP2_INM. |
| 40 | PB4 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions SPI1_MISO, TIM3_CH1, TSC_G5_IO2, TIM22_CH1, USART1_CTS, USART5_RX and I2C3_SDA, and additional function COMP2_INP. |
| 41 | PB5 | bidirectional | 5 V tolerant I/O (FT structure) with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK and USART5_RTS/USART5_DE, and additional function COMP2_INP. |
| 42 | PB6 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP. |
| 43 | PB7 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4 and USART4_CTS, and additional functions COMP2_INP and VREF_PVD_IN. |
| 44 | BOOT0 | input | Dedicated BOOT0 input pin (B structure) that selects the boot mode. |
| 45 | PB8 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions TSC_SYNC and I2C1_SCL. |
| 46 | PB9 | bidirectional | 5 V tolerant I/O with FM+ capability (FTf structure) with alternate functions EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS. |
| 47 | VSS | power_in | Ground pin of the device. |
| 48 | VDD | power_in | Main MCU supply pin; the device operates from a 1.65 V to 3.6 V power supply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
STM32L072CZT6 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32l072czt6-etched.step/stm32l072czt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l072czt6.step/stm32l072czt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (160 pp, sha256
13ea53054244ac9d, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).