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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32L071KBU3

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)

STM32L071KBU3 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PC14-OSC32_IN	bidirectional	5 V tolerant (FT) I/O with function after reset PC14, and OSC32_IN as the 32 kHz oscillator input (additional function).
2	PC15-OSC32_OUT	bidirectional	Standard 3.3 V I/O (TC) with function after reset PC15, and OSC32_OUT as the 32 kHz oscillator output (additional function).
3	NRST	bidirectional	Bidirectional reset pin with embedded weak pull-up resistor.
4	VSSA	power_in	Analog ground supply pin.
5	VDDA	power_in	Analog supply pin.
6	PA0	bidirectional	TTa I/O (footnote 'a' not included in the extracted text) with alternate functions TIM2_CH1, USART2_CTS, TIM2_ETR, USART4_TX, COMP1_OUT and additional functions COMP1_INM, ADC_IN0, RTC_TAMP2/WKUP1.
7	PA1	bidirectional	5 V tolerant (FT) I/O with alternate functions EVENTOUT, TIM2_CH2, USART2_RTS/USART2_DE, TIM21_ETR, USART4_RX and additional functions COMP1_INP, ADC_IN1.
8	PA2	bidirectional	5 V tolerant (FT) I/O with alternate functions TIM21_CH1, TIM2_CH3, USART2_TX, LPUART1_TX, COMP2_OUT and additional functions COMP2_INM, ADC_IN2.
9	PA3	bidirectional	5 V tolerant (FT) I/O with alternate functions TIM21_CH2, TIM2_CH4, USART2_RX, LPUART1_RX and additional functions COMP2_INP, ADC_IN3.
10	PA4	bidirectional	Standard 3.3 V I/O (TC) with alternate functions SPI1_NSS, USART2_CK, TIM22_ETR and additional functions COMP1_INM, COMP2_INM, ADC_IN4.
11	PA5	bidirectional	Standard 3.3 V I/O (TC) with alternate functions SPI1_SCK, TIM2_ETR, TIM2_CH1 and additional functions COMP1_INM, COMP2_INM, ADC_IN5.
12	PA6	bidirectional	5 V tolerant (FT) I/O with alternate functions SPI1_MISO, TIM3_CH1, LPUART1_CTS, TIM22_CH1, EVENTOUT, COMP1_OUT and additional function ADC_IN6.
13	PA7	bidirectional	5 V tolerant (FT) I/O with alternate functions SPI1_MOSI, TIM3_CH2, TIM22_CH2, EVENTOUT, COMP2_OUT and additional function ADC_IN7.
14	PB0	bidirectional	5 V tolerant (FT) I/O with alternate functions EVENTOUT, TIM3_CH3 and additional functions ADC_IN8, VREF_OUT.
15	PB1	bidirectional	5 V tolerant (FT) I/O with alternate functions TIM3_CH4, LPUART1_RTS/LPUART1_DE and additional functions ADC_IN9, VREF_OUT.
16	VSS	power_in	Ground pin.
17	VDD	power_in	Digital supply pin.
18	PA8	bidirectional	5 V tolerant, Fm+ capable (FTf) I/O with alternate functions MCO, EVENTOUT, USART1_CK, I2C3_SCL.
19	PA9	bidirectional	5 V tolerant, Fm+ capable (FTf) I/O with alternate functions MCO, USART1_TX, I2C1_SCL, I2C3_SMBA.
20	PA10	bidirectional	5 V tolerant, Fm+ capable (FTf) I/O with alternate functions USART1_RX, I2C1_SDA.
21	PA11	bidirectional	5 V tolerant (FT) I/O supplied by VDDIO2 (per note 2 of the pinout figures) with alternate functions SPI1_MISO, EVENTOUT, USART1_CTS, COMP1_OUT.
22	PA12	bidirectional	5 V tolerant (FT) I/O supplied by VDDIO2 (per note 2 of the pinout figures) with alternate functions SPI1_MOSI, EVENTOUT, USART1_RTS/USART1_DE, COMP2_OUT.
23	PA13	bidirectional	5 V tolerant (FT) I/O with alternate functions SWDIO and LPUART1_RX.
24	VDDIO2	power_in	I/O supply pin for PA11 and PA12.
25	PA14	bidirectional	5 V tolerant (FT) I/O with alternate functions SWCLK, USART2_TX, LPUART1_TX.
26	PB4	bidirectional	5 V tolerant, Fm+ capable (FTf) I/O with alternate functions SPI1_MISO, TIM3_CH1, TIM22_CH1, USART1_CTS, USART5_RX, I2C3_SDA and additional function COMP2_INP.
27	PB5	bidirectional	5 V tolerant (FT) I/O with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK, USART5_RTS/USART5_DE and additional function COMP2_INP.
28	PB6	bidirectional	5 V tolerant, Fm+ capable (FTf) I/O with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and additional function COMP2_INP.
29	PB7	bidirectional	5 V tolerant, Fm+ capable (FTf) I/O with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, USART4_CTS and additional functions COMP2_INP, VREF_PVD_IN.
30	BOOT0	input	Dedicated BOOT0 pin (input only).
31	VSS	power_in	Ground pin.
32	VDD	power_in	Digital supply pin.
33	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	UFQFPN-32(5x5)
Category	Embedded Processors & Controllers
Pins	33

CAD (KiCad official)

Symbol: STM32L071KBU3
Footprint: Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm
3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
3D model files: stm32l071kbu3-etched.step / stm32l071kbu3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l071kbu3.step / stm32l071kbu3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (148 pp, sha256 f413c7ce36b98e6c, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF