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STM32L071CZU6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32L071CZU6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)

STM32L071CZU6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Main supply pin; the family supply range is 1.65 V to 3.6 V, while orderable parts without the 'D' option are specified at 1.8 V to 3.6 V with BOR enabled.
2 PC13 bidirectional 5 V tolerant FT I/O (additional function RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2); like all I/Os it is a floating input during and after reset unless noted.
3 PC14-OSC32_IN bidirectional 5 V tolerant FT I/O whose additional function is OSC32_IN, the 32.768 kHz LSE oscillator input.
4 PC15-OSC32_OUT bidirectional Standard 3.3 V TC I/O whose additional function is OSC32_OUT, the 32.768 kHz LSE oscillator output.
5 PH0-OSC_IN bidirectional Standard 3.3 V TC I/O whose additional function is OSC_IN, the 1 to 25 MHz HSE crystal oscillator input.
6 PH1-OSC_OUT bidirectional Standard 3.3 V TC I/O whose additional function is OSC_OUT, the 1 to 25 MHz HSE crystal oscillator output.
7 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
8 VSSA power_in Analog ground pin for the ADC, comparators and reference circuitry.
9 VDDA power_in Analog supply pin for the ADC, comparators and internal reference.
10 PA0 bidirectional I/O with structure printed as TTa; alternate functions TIM2_CH1, USART2_CTS, TIM2_ETR, USART4_TX, COMP1_OUT; additional functions COMP1_INM, ADC_IN0, RTC_TAMP2/WKUP1.
11 PA1 bidirectional 5 V tolerant FT I/O; alternate functions EVENTOUT, TIM2_CH2, USART2_RTS/USART2_DE, TIM21_ETR, USART4_RX; additional functions COMP1_INP, ADC_IN1.
12 PA2 bidirectional 5 V tolerant FT I/O; alternate functions TIM21_CH1, TIM2_CH3, USART2_TX, LPUART1_TX, COMP2_OUT; additional functions COMP2_INM, ADC_IN2.
13 PA3 bidirectional 5 V tolerant FT I/O; alternate functions TIM21_CH2, TIM2_CH4, USART2_RX, LPUART1_RX; additional functions COMP2_INP, ADC_IN3.
14 PA4 bidirectional Standard 3.3 V TC I/O; alternate functions SPI1_NSS, USART2_CK, TIM22_ETR; additional functions COMP1_INM, COMP2_INM, ADC_IN4.
15 PA5 bidirectional Standard 3.3 V TC I/O; alternate functions SPI1_SCK, TIM2_ETR, TIM2_CH1; additional functions COMP1_INM, COMP2_INM, ADC_IN5.
16 PA6 bidirectional 5 V tolerant FT I/O; alternate functions SPI1_MISO, TIM3_CH1, LPUART1_CTS, TIM22_CH1, EVENTOUT, COMP1_OUT; additional function ADC_IN6.
17 PA7 bidirectional 5 V tolerant FT I/O; alternate functions SPI1_MOSI, TIM3_CH2, TIM22_CH2, EVENTOUT, COMP2_OUT; additional function ADC_IN7.
18 PB0 bidirectional 5 V tolerant FT I/O; alternate functions EVENTOUT, TIM3_CH3; additional functions ADC_IN8 and VREF_OUT.
19 PB1 bidirectional 5 V tolerant FT I/O; alternate functions TIM3_CH4, LPUART1_RTS/LPUART1_DE; additional functions ADC_IN9 and VREF_OUT.
20 PB2 bidirectional 5 V tolerant FT I/O; alternate functions LPTIM1_OUT and I2C3_SMBA.
21 PB10 bidirectional 5 V tolerant FT I/O; alternate functions TIM2_CH3, LPUART1_TX, SPI2_SCK, I2C2_SCL, LPUART1_RX.
22 PB11 bidirectional 5 V tolerant FT I/O; alternate functions EVENTOUT, TIM2_CH4, LPUART1_RX, I2C2_SDA, LPUART1_TX.
23 VSS power_in Ground pin for the digital supply domain.
24 VDD power_in Digital supply pin; see pin 1 for the supply range.
25 PB12 bidirectional 5 V tolerant FT I/O; alternate functions SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, I2C2_SMBA, EVENTOUT.
26 PB13 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate functions SPI2_SCK/I2S2_CK, MCO, LPUART1_CTS, I2C2_SCL, TIM21_CH1.
27 PB14 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate functions SPI2_MISO/I2S2_MCK, RTC_OUT, LPUART1_RTS/LPUART1_DE, I2C2_SDA, TIM21_CH2.
28 PB15 bidirectional 5 V tolerant FT I/O; alternate functions SPI2_MOSI/I2S2_SD and RTC_REFIN.
29 PA8 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate functions MCO, EVENTOUT, USART1_CK, I2C3_SCL.
30 PA9 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate functions MCO, USART1_TX, I2C1_SCL, I2C3_SMBA.
31 PA10 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate functions USART1_RX and I2C1_SDA.
32 PA11 bidirectional 5 V tolerant FT I/O supplied by VDDIO2; alternate functions SPI1_MISO, EVENTOUT, USART1_CTS, COMP1_OUT.
33 PA12 bidirectional 5 V tolerant FT I/O supplied by VDDIO2; alternate functions SPI1_MOSI, EVENTOUT, USART1_RTS/USART1_DE, COMP2_OUT.
34 PA13 bidirectional 5 V tolerant FT I/O; alternate functions SWDIO (serial wire debug data) and LPUART1_RX.
35 VSS power_in Ground pin for the digital supply domain.
36 VDDIO2 power_in Supply pin for the PA11 and PA12 I/Os, per the datasheet note on the pinout figures.
37 PA14 bidirectional 5 V tolerant FT I/O; alternate functions SWCLK (serial wire debug clock), USART2_TX, LPUART1_TX.
38 PA15 bidirectional 5 V tolerant FT I/O; alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1, USART4_RTS/USART4_DE.
39 PB3 bidirectional 5 V tolerant FT I/O; alternate functions SPI1_SCK, TIM2_CH2, EVENTOUT, USART1_RTS/USART1_DE, USART5_TX; additional function COMP2_INM.
40 PB4 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate functions SPI1_MISO, TIM3_CH1, TIM22_CH1, USART1_CTS, USART5_RX, I2C3_SDA; additional function COMP2_INP.
41 PB5 bidirectional 5 V tolerant FT I/O; alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK, USART5_RTS/USART5_DE; additional function COMP2_INP.
42 PB6 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR; additional function COMP2_INP.
43 PB7 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, USART4_CTS; additional functions COMP2_INP and VREF_PVD_IN.
44 BOOT0 input Dedicated BOOT0 boot-mode selection pin (type I, no alternate functions listed).
45 PB8 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate function I2C1_SCL.
46 PB9 bidirectional 5 V tolerant FTf I/O (Fm+ capable); alternate functions EVENTOUT, I2C1_SDA, SPI2_NSS/I2S2_WS.
47 VSS power_in Ground pin for the digital supply domain.
48 VDD power_in Digital supply pin; see pin 1 for the supply range.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-48(7x7)
Category Embedded Processors & Controllers
Pins 49

CAD (KiCad official)

  • Symbol: STM32L071CZU6
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32l071czu6-etched.step / stm32l071czu6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l071czu6.step / stm32l071czu6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (148 pp, sha256 f413c7ce36b98e6c, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF