component
STM32L071CZU6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# STM32L071CZU6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)++STM32L071CZU6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Main supply pin; the family supply range is 1.65 V to 3.6 V, while orderable parts without the 'D' option are specified at 1.8 V to 3.6 V with BOR enabled. |+| 2 | PC13 | bidirectional | 5 V tolerant FT I/O (additional function RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2); like all I/Os it is a floating input during and after reset unless noted. |+| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant FT I/O whose additional function is OSC32_IN, the 32.768 kHz LSE oscillator input. |+| 4 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V TC I/O whose additional function is OSC32_OUT, the 32.768 kHz LSE oscillator output. |+| 5 | PH0-OSC_IN | bidirectional | Standard 3.3 V TC I/O whose additional function is OSC_IN, the 1 to 25 MHz HSE crystal oscillator input. |+| 6 | PH1-OSC_OUT | bidirectional | Standard 3.3 V TC I/O whose additional function is OSC_OUT, the 1 to 25 MHz HSE crystal oscillator output. |+| 7 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |+| 8 | VSSA | power_in | Analog ground pin for the ADC, comparators and reference circuitry. |+| 9 | VDDA | power_in | Analog supply pin for the ADC, comparators and internal reference. |+| 10 | PA0 | bidirectional | I/O with structure printed as TTa; alternate functions TIM2_CH1, USART2_CTS, TIM2_ETR, USART4_TX, COMP1_OUT; additional functions COMP1_INM, ADC_IN0, RTC_TAMP2/WKUP1. |+| 11 | PA1 | bidirectional | 5 V tolerant FT I/O; alternate functions EVENTOUT, TIM2_CH2, USART2_RTS/USART2_DE, TIM21_ETR, USART4_RX; additional functions COMP1_INP, ADC_IN1. |+| 12 | PA2 | bidirectional | 5 V tolerant FT I/O; alternate functions TIM21_CH1, TIM2_CH3, USART2_TX, LPUART1_TX, COMP2_OUT; additional functions COMP2_INM, ADC_IN2. |+| 13 | PA3 | bidirectional | 5 V tolerant FT I/O; alternate functions TIM21_CH2, TIM2_CH4, USART2_RX, LPUART1_RX; additional functions COMP2_INP, ADC_IN3. |+| 14 | PA4 | bidirectional | Standard 3.3 V TC I/O; alternate functions SPI1_NSS, USART2_CK, TIM22_ETR; additional functions COMP1_INM, COMP2_INM, ADC_IN4. |+| 15 | PA5 | bidirectional | Standard 3.3 V TC I/O; alternate functions SPI1_SCK, TIM2_ETR, TIM2_CH1; additional functions COMP1_INM, COMP2_INM, ADC_IN5. |+| 16 | PA6 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_MISO, TIM3_CH1, LPUART1_CTS, TIM22_CH1, EVENTOUT, COMP1_OUT; additional function ADC_IN6. |+| 17 | PA7 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_MOSI, TIM3_CH2, TIM22_CH2, EVENTOUT, COMP2_OUT; additional function ADC_IN7. |+| 18 | PB0 | bidirectional | 5 V tolerant FT I/O; alternate functions EVENTOUT, TIM3_CH3; additional functions ADC_IN8 and VREF_OUT. |+| 19 | PB1 | bidirectional | 5 V tolerant FT I/O; alternate functions TIM3_CH4, LPUART1_RTS/LPUART1_DE; additional functions ADC_IN9 and VREF_OUT. |+| 20 | PB2 | bidirectional | 5 V tolerant FT I/O; alternate functions LPTIM1_OUT and I2C3_SMBA. |+| 21 | PB10 | bidirectional | 5 V tolerant FT I/O; alternate functions TIM2_CH3, LPUART1_TX, SPI2_SCK, I2C2_SCL, LPUART1_RX. |+| 22 | PB11 | bidirectional | 5 V tolerant FT I/O; alternate functions EVENTOUT, TIM2_CH4, LPUART1_RX, I2C2_SDA, LPUART1_TX. |+| 23 | VSS | power_in | Ground pin for the digital supply domain. |+| 24 | VDD | power_in | Digital supply pin; see pin 1 for the supply range. |+| 25 | PB12 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, I2C2_SMBA, EVENTOUT. |+| 26 | PB13 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate functions SPI2_SCK/I2S2_CK, MCO, LPUART1_CTS, I2C2_SCL, TIM21_CH1. |+| 27 | PB14 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate functions SPI2_MISO/I2S2_MCK, RTC_OUT, LPUART1_RTS/LPUART1_DE, I2C2_SDA, TIM21_CH2. |+| 28 | PB15 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI2_MOSI/I2S2_SD and RTC_REFIN. |+| 29 | PA8 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate functions MCO, EVENTOUT, USART1_CK, I2C3_SCL. |+| 30 | PA9 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate functions MCO, USART1_TX, I2C1_SCL, I2C3_SMBA. |+| 31 | PA10 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate functions USART1_RX and I2C1_SDA. |+| 32 | PA11 | bidirectional | 5 V tolerant FT I/O supplied by VDDIO2; alternate functions SPI1_MISO, EVENTOUT, USART1_CTS, COMP1_OUT. |+| 33 | PA12 | bidirectional | 5 V tolerant FT I/O supplied by VDDIO2; alternate functions SPI1_MOSI, EVENTOUT, USART1_RTS/USART1_DE, COMP2_OUT. |+| 34 | PA13 | bidirectional | 5 V tolerant FT I/O; alternate functions SWDIO (serial wire debug data) and LPUART1_RX. |+| 35 | VSS | power_in | Ground pin for the digital supply domain. |+| 36 | VDDIO2 | power_in | Supply pin for the PA11 and PA12 I/Os, per the datasheet note on the pinout figures. |+| 37 | PA14 | bidirectional | 5 V tolerant FT I/O; alternate functions SWCLK (serial wire debug clock), USART2_TX, LPUART1_TX. |+| 38 | PA15 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1, USART4_RTS/USART4_DE. |+| 39 | PB3 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_SCK, TIM2_CH2, EVENTOUT, USART1_RTS/USART1_DE, USART5_TX; additional function COMP2_INM. |+| 40 | PB4 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate functions SPI1_MISO, TIM3_CH1, TIM22_CH1, USART1_CTS, USART5_RX, I2C3_SDA; additional function COMP2_INP. |+| 41 | PB5 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK, USART5_RTS/USART5_DE; additional function COMP2_INP. |+| 42 | PB6 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR; additional function COMP2_INP. |+| 43 | PB7 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, USART4_CTS; additional functions COMP2_INP and VREF_PVD_IN. |+| 44 | BOOT0 | input | Dedicated BOOT0 boot-mode selection pin (type I, no alternate functions listed). |+| 45 | PB8 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate function I2C1_SCL. |+| 46 | PB9 | bidirectional | 5 V tolerant FTf I/O (Fm+ capable); alternate functions EVENTOUT, I2C1_SDA, SPI2_NSS/I2S2_WS. |+| 47 | VSS | power_in | Ground pin for the digital supply domain. |+| 48 | VDD | power_in | Digital supply pin; see pin 1 for the supply range. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | UFQFPN-48(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `STM32L071CZU6`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32l071czu6-etched.step` / `stm32l071czu6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32l071czu6.step` / `stm32l071czu6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886252883599360) (148 pp, sha256 `f413c7ce36b98e6c`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32l071czu6-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32l071czu6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32l071czu6.kicad_sym",+ "stm32l071czu6.kicad_mod",+ "stm32l071czu6.glb",+ "stm32l071czu6.step",+ "stm32l071czu6.lbr",+ "docs/hero.png",+ "docs/stm32l071czu6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32l071czu6-hero.glb",+ "stm32l071czu6-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32L071CZU6",+ "manufacturer": "STMicroelectronics",+ "package": "UFQFPN-48(7x7)",+ "pin_count": 49,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886252883599360",+ "parts": {+ "symbol": "stm32l071czu6.kicad_sym",+ "footprint": "stm32l071czu6.kicad_mod",+ "model_3d": "stm32l071czu6-hero.glb",+ "model_3d_plain": "stm32l071czu6.glb",+ "model_3d_step": "stm32l071czu6-etched.step",+ "model_3d_step_plain": "stm32l071czu6.step",+ "lbr": "stm32l071czu6.lbr"+ },+ "distributor_links": {+ "lcsc": "C529425",+ "digikey": "497-STM32L071CZU6-ND",+ "mouser": "511-STM32L071CZU6"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T01:13:21Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-STM32L071CZU6-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32L071CZU6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "Main supply pin; the family supply range is 1.65 V to 3.6 V, while orderable parts without the 'D' option are specified at 1.8 V to 3.6 V with BOR enabled."+ },+ {+ "number": "2",+ "name": "PC13",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O (additional function RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2); like all I/Os it is a floating input during and after reset unless noted."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O whose additional function is OSC32_IN, the 32.768 kHz LSE oscillator input."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O whose additional function is OSC32_OUT, the 32.768 kHz LSE oscillator output."+ },+ {+ "number": "5",+ "name": "PH0-OSC_IN",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O whose additional function is OSC_IN, the 1 to 25 MHz HSE crystal oscillator input."+ },+ {+ "number": "6",+ "name": "PH1-OSC_OUT",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O whose additional function is OSC_OUT, the 1 to 25 MHz HSE crystal oscillator output."+ },+ {+ "number": "7",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with an embedded weak pull-up resistor."+ },+ {+ "number": "8",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground pin for the ADC, comparators and reference circuitry."+ },+ {+ "number": "9",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply pin for the ADC, comparators and internal reference."+ },+ {+ "number": "10",+ "name": "PA0",+ "type": "bidirectional",+ "description": "I/O with structure printed as TTa; alternate functions TIM2_CH1, USART2_CTS, TIM2_ETR, USART4_TX, COMP1_OUT; additional functions COMP1_INM, ADC_IN0, RTC_TAMP2/WKUP1."+ },+ {+ "number": "11",+ "name": "PA1",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions EVENTOUT, TIM2_CH2, USART2_RTS/USART2_DE, TIM21_ETR, USART4_RX; additional functions COMP1_INP, ADC_IN1."+ },+ {+ "number": "12",+ "name": "PA2",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TIM21_CH1, TIM2_CH3, USART2_TX, LPUART1_TX, COMP2_OUT; additional functions COMP2_INM, ADC_IN2."+ },+ {+ "number": "13",+ "name": "PA3",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TIM21_CH2, TIM2_CH4, USART2_RX, LPUART1_RX; additional functions COMP2_INP, ADC_IN3."+ },+ {+ "number": "14",+ "name": "PA4",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O; alternate functions SPI1_NSS, USART2_CK, TIM22_ETR; additional functions COMP1_INM, COMP2_INM, ADC_IN4."+ },+ {+ "number": "15",+ "name": "PA5",+ "type": "bidirectional",+ "description": "Standard 3.3 V TC I/O; alternate functions SPI1_SCK, TIM2_ETR, TIM2_CH1; additional functions COMP1_INM, COMP2_INM, ADC_IN5."+ },+ {+ "number": "16",+ "name": "PA6",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SPI1_MISO, TIM3_CH1, LPUART1_CTS, TIM22_CH1, EVENTOUT, COMP1_OUT; additional function ADC_IN6."+ },+ {+ "number": "17",+ "name": "PA7",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SPI1_MOSI, TIM3_CH2, TIM22_CH2, EVENTOUT, COMP2_OUT; additional function ADC_IN7."+ },+ {+ "number": "18",+ "name": "PB0",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions EVENTOUT, TIM3_CH3; additional functions ADC_IN8 and VREF_OUT."+ },+ {+ "number": "19",+ "name": "PB1",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TIM3_CH4, LPUART1_RTS/LPUART1_DE; additional functions ADC_IN9 and VREF_OUT."+ },+ {+ "number": "20",+ "name": "PB2",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions LPTIM1_OUT and I2C3_SMBA."+ },+ {+ "number": "21",+ "name": "PB10",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions TIM2_CH3, LPUART1_TX, SPI2_SCK, I2C2_SCL, LPUART1_RX."+ },+ {+ "number": "22",+ "name": "PB11",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions EVENTOUT, TIM2_CH4, LPUART1_RX, I2C2_SDA, LPUART1_TX."+ },+ {+ "number": "23",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin for the digital supply domain."+ },+ {+ "number": "24",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply pin; see pin 1 for the supply range."+ },+ {+ "number": "25",+ "name": "PB12",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, I2C2_SMBA, EVENTOUT."+ },+ {+ "number": "26",+ "name": "PB13",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate functions SPI2_SCK/I2S2_CK, MCO, LPUART1_CTS, I2C2_SCL, TIM21_CH1."+ },+ {+ "number": "27",+ "name": "PB14",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate functions SPI2_MISO/I2S2_MCK, RTC_OUT, LPUART1_RTS/LPUART1_DE, I2C2_SDA, TIM21_CH2."+ },+ {+ "number": "28",+ "name": "PB15",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SPI2_MOSI/I2S2_SD and RTC_REFIN."+ },+ {+ "number": "29",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate functions MCO, EVENTOUT, USART1_CK, I2C3_SCL."+ },+ {+ "number": "30",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate functions MCO, USART1_TX, I2C1_SCL, I2C3_SMBA."+ },+ {+ "number": "31",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate functions USART1_RX and I2C1_SDA."+ },+ {+ "number": "32",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O supplied by VDDIO2; alternate functions SPI1_MISO, EVENTOUT, USART1_CTS, COMP1_OUT."+ },+ {+ "number": "33",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O supplied by VDDIO2; alternate functions SPI1_MOSI, EVENTOUT, USART1_RTS/USART1_DE, COMP2_OUT."+ },+ {+ "number": "34",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SWDIO (serial wire debug data) and LPUART1_RX."+ },+ {+ "number": "35",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin for the digital supply domain."+ },+ {+ "number": "36",+ "name": "VDDIO2",+ "type": "power_in",+ "description": "Supply pin for the PA11 and PA12 I/Os, per the datasheet note on the pinout figures."+ },+ {+ "number": "37",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SWCLK (serial wire debug clock), USART2_TX, LPUART1_TX."+ },+ {+ "number": "38",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1, USART4_RTS/USART4_DE."+ },+ {+ "number": "39",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SPI1_SCK, TIM2_CH2, EVENTOUT, USART1_RTS/USART1_DE, USART5_TX; additional function COMP2_INM."+ },+ {+ "number": "40",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate functions SPI1_MISO, TIM3_CH1, TIM22_CH1, USART1_CTS, USART5_RX, I2C3_SDA; additional function COMP2_INP."+ },+ {+ "number": "41",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA, TIM3_CH2/TIM22_CH2, USART1_CK, USART5_CK, USART5_RTS/USART5_DE; additional function COMP2_INP."+ },+ {+ "number": "42",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR; additional function COMP2_INP."+ },+ {+ "number": "43",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, USART4_CTS; additional functions COMP2_INP and VREF_PVD_IN."+ },+ {+ "number": "44",+ "name": "BOOT0",+ "type": "input",+ "description": "Dedicated BOOT0 boot-mode selection pin (type I, no alternate functions listed)."+ },+ {+ "number": "45",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate function I2C1_SCL."+ },+ {+ "number": "46",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V tolerant FTf I/O (Fm+ capable); alternate functions EVENTOUT, I2C1_SDA, SPI2_NSS/I2S2_WS."+ },+ {+ "number": "47",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin for the digital supply domain."+ },+ {+ "number": "48",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital supply pin; see pin 1 for the supply range."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The UFQFPN48 package has an exposed die pad on its underside (Figure 58, note 3). It is not a number; Supply range ambiguity: the family is specified at 1.65 V to 3.6 V (features and option 'D'), but th; PA0 I/O structure is printed as 'TTa' in Table 15, which is not defined in Table 14 (legend lists FT",+ "exposed pad 49 added from the footprint"+ ],+ "pages_sent": 74,+ "cost_usd": 0.3092,+ "at": "2026-10-08T01:13:00"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886252883599360",+ "pages": 148,+ "sha256": "f413c7ce36b98e6c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32l071czu6.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32l071czu6-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "89df3b415f476981a353282ad8245f278f5d8a26b2557b70f453cb2cbb0d53bc",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}