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STM32L053R8T3

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L053R8T3 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VLCD power_in LCD power supply pin (VLCD) for the LCD controller, as described in the optional LCD power supply scheme; Table 15 classes it as a supply pin.
2 PC13 bidirectional 5 V tolerant (FT) I/O, floating input after reset; additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2.
3 PC14-OSC32_IN bidirectional 5 V tolerant (FT) I/O, reset function PC14; additional function OSC32_IN (32.768 kHz LSE oscillator input).
4 PC15-OSC32_OUT bidirectional Standard 3.3 V (TC) I/O, reset function PC15; additional function OSC32_OUT (32.768 kHz LSE oscillator output).
5 PH0-OSC_IN bidirectional Standard 3.3 V (TC) I/O, reset function PH0; additional functions OSC_IN (HSE oscillator input) and USB_CRS_SYNC.
6 PH1-OSC_OUT bidirectional Standard 3.3 V (TC) I/O, reset function PH1; additional function OSC_OUT (HSE oscillator output).
7 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
8 PC0 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LPTIM1_IN1, LCD_SEG18, EVENTOUT, TSC_G7_IO1; additional function ADC_IN10.
9 PC1 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LPTIM1_OUT, LCD_SEG19, EVENTOUT, TSC_G7_IO2; additional function ADC_IN11.
10 PC2 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LPTIM1_IN2, LCD_SEG20, SPI2_MISO/I2S2_MCK, TSC_G7_IO3; additional function ADC_IN12.
11 PC3 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LPTIM1_ETR, LCD_SEG21, SPI2_MOSI/I2S2_SD, TSC_G7_IO4; additional function ADC_IN13.
12 VSSA power_in Analog ground pin for the analog peripherals (ADC, DAC, comparators).
13 VDDA power_in Analog supply pin for the analog peripherals (ADC, DAC, comparators).
14 PA0 bidirectional Standard 3.3 V (TC) I/O, floating input after reset; alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR, COMP1_OUT; additional functions COMP1_INM6, ADC_IN0, RTC_TAMP2/WKUP1.
15 PA1 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions EVENTOUT, LCD_SEG0, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR; additional functions COMP1_INP, ADC_IN1.
16 PA2 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TIM21_CH1, LCD_SEG1, TIM2_CH3, TSC_G1_IO3, USART2_TX, COMP2_OUT; additional functions COMP2_INM6, ADC_IN2.
17 PA3 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TIM21_CH2, LCD_SEG2, TIM2_CH4, TSC_G1_IO4, USART2_RX; additional functions COMP2_INP, ADC_IN3.
18 VSS power_in Ground pin; all voltages are referenced to VSS.
19 VDD power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
20 PA4 bidirectional Standard 3.3 V (TC) I/O with reduced touch sensing sensitivity, recommended for use as sampling capacitor I/O; alternate functions SPI1_NSS, TSC_G2_IO1, USART2_CK, TIM22_ETR; additional functions COMP1_INM4, COMP2_INM4, ADC_IN4, DAC_OUT.
21 PA5 bidirectional Standard 3.3 V (TC) I/O, floating input after reset; alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2, TIM2_CH1; additional functions COMP1_INM5, COMP2_INM5, ADC_IN5.
22 PA6 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SPI1_MISO, LCD_SEG3, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT, COMP1_OUT; additional function ADC_IN6.
23 PA7 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SPI1_MOSI, LCD_SEG4, TSC_G2_IO4, TIM22_CH2, EVENTOUT, COMP2_OUT; additional function ADC_IN7.
24 PC4 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions EVENTOUT, LCD_SEG22, LPUART1_TX; additional function ADC_IN14.
25 PC5 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LCD_SEG23, LPUART1_RX, TSC_G3_IO1; additional function ADC_IN15.
26 PB0 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions EVENTOUT, LCD_SEG5, TSC_G3_IO2; additional functions LCD_VLCD3, ADC_IN8, VREF_OUT.
27 PB1 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LCD_SEG6, TSC_G3_IO3, LPUART1_RTS/LPUART1_DE; additional functions ADC_IN9, VREF_OUT.
28 PB2 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LPTIM1_OUT, TSC_G3_IO4; additional function LCD_VLCD2.
29 PB10 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LCD_SEG10, TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK, I2C2_SCL.
30 PB11 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions EVENTOUT, LCD_SEG11, TIM2_CH4, TSC_G6_IO1, LPUART1_RX, I2C2_SDA.
31 VSS power_in Ground pin; all voltages are referenced to VSS.
32 VDD power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
33 PB12 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SPI2_NSS/I2S2_WS, LCD_SEG12, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA, EVENTOUT; additional function LCD_VLCD1.
34 PB13 bidirectional 5 V tolerant Fast-mode-Plus capable (FTf) I/O, floating input after reset; alternate functions SPI2_SCK/I2S2_CK, LCD_SEG13, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL, TIM21_CH1.
35 PB14 bidirectional 5 V tolerant Fast-mode-Plus capable (FTf) I/O, floating input after reset; alternate functions SPI2_MISO/I2S2_MCK, LCD_SEG14, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA, TIM21_CH2.
36 PB15 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SPI2_MOSI/I2S2_SD, LCD_SEG15, RTC_REFIN.
37 PC6 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TIM22_CH1, LCD_SEG24, TSC_G8_IO1.
38 PC7 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TIM22_CH2, LCD_SEG25, TSC_G8_IO2.
39 PC8 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TIM22_ETR, LCD_SEG26, TSC_G8_IO3.
40 PC9 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TIM21_ETR, LCD_SEG27, USB_NOE, TSC_G8_IO4.
41 PA8 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions MCO, LCD_COM0, USB_CRS_SYNC, EVENTOUT, USART1_CK.
42 PA9 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions MCO, LCD_COM1, TSC_G4_IO1, USART1_TX.
43 PA10 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LCD_COM2, TSC_G4_IO2, USART1_RX.
44 PA11 bidirectional 5 V tolerant (FT) I/O powered by VDD_USB, floating input after reset; alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS, COMP1_OUT; additional function USB_DM.
45 PA12 bidirectional 5 V tolerant (FT) I/O powered by VDD_USB, floating input after reset; alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE, COMP2_OUT; additional function USB_DP.
46 PA13 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SWDIO and USB_NOE.
47 VSS power_in Ground pin; all voltages are referenced to VSS.
48 VDD_USB power_in Supply pin for the USB-related I/Os (PA11, PA12); for all characteristics that refer to VDD, VDD_USB must be used instead.
49 PA14 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SWCLK and USART2_TX.
50 PA15 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SPI1_NSS, LCD_SEG17, TIM2_ETR, EVENTOUT, USART2_RX, TIM2_CH1.
51 PC10 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LPUART1_TX and LCD_COM4/LCD_SEG28/LCD_SEG40.
52 PC11 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LPUART1_RX and LCD_COM5/LCD_SEG29/LCD_SEG41.
53 PC12 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate function LCD_COM6/LCD_SEG30/LCD_SEG42.
54 PD2 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions LPUART1_RTS/LPUART1_DE and LCD_COM7/LCD_SEG31/LCD_SEG43.
55 PB3 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SPI1_SCK, LCD_SEG7, TIM2_CH2, TSC_G5_IO1, EVENTOUT; additional function COMP2_INN.
56 PB4 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SPI1_MISO, LCD_SEG8, EVENTOUT, TSC_G5_IO2, TIM22_CH1; additional function COMP2_INP.
57 PB5 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions SPI1_MOSI, LCD_SEG9, LPTIM1_IN1, I2C1_SMBA, TIM22_CH2; additional function COMP2_INP.
58 PB6 bidirectional 5 V tolerant Fast-mode-Plus capable (FTf) I/O, floating input after reset; alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR, TSC_G5_IO3; additional function COMP2_INP.
59 PB7 bidirectional 5 V tolerant Fast-mode-Plus capable (FTf) I/O, floating input after reset; alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2, TSC_G5_IO4; additional functions COMP2_INP and PVD_IN.
60 BOOT0 input Dedicated BOOT0 pin used to select the boot mode; input-only pin.
61 PB8 bidirectional 5 V tolerant Fast-mode-Plus capable (FTf) I/O, floating input after reset; alternate functions LCD_SEG16, TSC_SYNC, I2C1_SCL.
62 PB9 bidirectional 5 V tolerant Fast-mode-Plus capable (FTf) I/O, floating input after reset; alternate functions LCD_COM3, EVENTOUT, I2C1_SDA, SPI2_NSS/I2S2_WS.
63 VSS power_in Ground pin; all voltages are referenced to VSS.
64 VDD power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32L053R8T3
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32l053r8t3-etched.step / stm32l053r8t3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l053r8t3.step / stm32l053r8t3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (136 pp, sha256 b30ef01e0e2d9c80, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF